clk: qcom: dispcc-sm8450: switch to parent_hws
Change several entries of parent_data to use parent_hws instead, which results in slightly more ovbious code. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230103145515.1164020-2-dmitry.baryshkov@linaro.org
This commit is contained in:
Dmitry Baryshkov
Bjorn Andersson
Родитель
6d29607197
Коммит
5c0df30cb3
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@ -694,8 +694,8 @@ static struct clk_regmap_div disp_cc_mdss_byte0_div_clk_src = {
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.width = 4,
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.clkr.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_byte0_div_clk_src",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_byte0_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_byte0_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.ops = &clk_regmap_div_ops,
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@ -708,8 +708,8 @@ static struct clk_regmap_div disp_cc_mdss_byte1_div_clk_src = {
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.width = 4,
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.clkr.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_byte1_div_clk_src",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_byte1_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_byte1_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.ops = &clk_regmap_div_ops,
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@ -722,8 +722,8 @@ static struct clk_regmap_div disp_cc_mdss_dptx0_link_div_clk_src = {
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.width = 4,
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.clkr.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dptx0_link_div_clk_src",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_dptx0_link_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_dptx0_link_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -737,8 +737,8 @@ static struct clk_regmap_div disp_cc_mdss_dptx1_link_div_clk_src = {
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.width = 4,
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.clkr.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dptx1_link_div_clk_src",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_dptx1_link_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_dptx1_link_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -752,8 +752,8 @@ static struct clk_regmap_div disp_cc_mdss_dptx2_link_div_clk_src = {
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.width = 4,
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.clkr.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dptx2_link_div_clk_src",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_dptx2_link_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_dptx2_link_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -767,8 +767,8 @@ static struct clk_regmap_div disp_cc_mdss_dptx3_link_div_clk_src = {
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.width = 4,
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.clkr.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dptx3_link_div_clk_src",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_dptx3_link_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_dptx3_link_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -784,8 +784,8 @@ static struct clk_branch disp_cc_mdss_ahb1_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_ahb1_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_ahb_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_ahb_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -802,8 +802,8 @@ static struct clk_branch disp_cc_mdss_ahb_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_ahb_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_ahb_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_ahb_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -820,8 +820,8 @@ static struct clk_branch disp_cc_mdss_byte0_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_byte0_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_byte0_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_byte0_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -838,8 +838,8 @@ static struct clk_branch disp_cc_mdss_byte0_intf_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_byte0_intf_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_byte0_div_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_byte0_div_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -856,8 +856,8 @@ static struct clk_branch disp_cc_mdss_byte1_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_byte1_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_byte1_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_byte1_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -874,8 +874,8 @@ static struct clk_branch disp_cc_mdss_byte1_intf_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_byte1_intf_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_byte1_div_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_byte1_div_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -892,8 +892,8 @@ static struct clk_branch disp_cc_mdss_dptx0_aux_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dptx0_aux_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_dptx0_aux_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_dptx0_aux_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -910,8 +910,8 @@ static struct clk_branch disp_cc_mdss_dptx0_crypto_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dptx0_crypto_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_dptx0_link_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_dptx0_link_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -928,8 +928,8 @@ static struct clk_branch disp_cc_mdss_dptx0_link_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dptx0_link_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_dptx0_link_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_dptx0_link_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -946,8 +946,8 @@ static struct clk_branch disp_cc_mdss_dptx0_link_intf_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dptx0_link_intf_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_dptx0_link_div_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_dptx0_link_div_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -964,8 +964,8 @@ static struct clk_branch disp_cc_mdss_dptx0_pixel0_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dptx0_pixel0_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_dptx0_pixel0_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_dptx0_pixel0_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -982,8 +982,8 @@ static struct clk_branch disp_cc_mdss_dptx0_pixel1_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dptx0_pixel1_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_dptx0_pixel1_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_dptx0_pixel1_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -1000,8 +1000,8 @@ static struct clk_branch disp_cc_mdss_dptx0_usb_router_link_intf_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dptx0_usb_router_link_intf_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_dptx0_link_div_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_dptx0_link_div_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -1018,8 +1018,8 @@ static struct clk_branch disp_cc_mdss_dptx1_aux_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dptx1_aux_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_dptx1_aux_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_dptx1_aux_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -1036,8 +1036,8 @@ static struct clk_branch disp_cc_mdss_dptx1_crypto_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dptx1_crypto_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_dptx1_link_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_dptx1_link_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -1054,8 +1054,8 @@ static struct clk_branch disp_cc_mdss_dptx1_link_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dptx1_link_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_dptx1_link_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_dptx1_link_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -1072,8 +1072,8 @@ static struct clk_branch disp_cc_mdss_dptx1_link_intf_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dptx1_link_intf_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_dptx1_link_div_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_dptx1_link_div_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -1090,8 +1090,8 @@ static struct clk_branch disp_cc_mdss_dptx1_pixel0_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dptx1_pixel0_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_dptx1_pixel0_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_dptx1_pixel0_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -1108,8 +1108,8 @@ static struct clk_branch disp_cc_mdss_dptx1_pixel1_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dptx1_pixel1_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_dptx1_pixel1_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_dptx1_pixel1_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -1126,8 +1126,8 @@ static struct clk_branch disp_cc_mdss_dptx1_usb_router_link_intf_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dptx1_usb_router_link_intf_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_dptx0_link_div_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_dptx0_link_div_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -1144,8 +1144,8 @@ static struct clk_branch disp_cc_mdss_dptx2_aux_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dptx2_aux_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_dptx2_aux_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_dptx2_aux_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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@ -1162,8 +1162,8 @@ static struct clk_branch disp_cc_mdss_dptx2_crypto_clk = {
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data) {
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.name = "disp_cc_mdss_dptx2_crypto_clk",
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.parent_data = &(const struct clk_parent_data) {
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.hw = &disp_cc_mdss_dptx2_link_clk_src.clkr.hw,
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.parent_hws = (const struct clk_hw*[]) {
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&disp_cc_mdss_dptx2_link_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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|
|
@ -1180,8 +1180,8 @@ static struct clk_branch disp_cc_mdss_dptx2_link_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_dptx2_link_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_dptx2_link_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_dptx2_link_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1198,8 +1198,8 @@ static struct clk_branch disp_cc_mdss_dptx2_link_intf_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_dptx2_link_intf_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_dptx2_link_div_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_dptx2_link_div_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1216,8 +1216,8 @@ static struct clk_branch disp_cc_mdss_dptx2_pixel0_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_dptx2_pixel0_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_dptx2_pixel0_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_dptx2_pixel0_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1234,8 +1234,8 @@ static struct clk_branch disp_cc_mdss_dptx2_pixel1_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_dptx2_pixel1_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_dptx2_pixel1_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_dptx2_pixel1_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1252,8 +1252,8 @@ static struct clk_branch disp_cc_mdss_dptx3_aux_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_dptx3_aux_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_dptx3_aux_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_dptx3_aux_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1270,8 +1270,8 @@ static struct clk_branch disp_cc_mdss_dptx3_crypto_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_dptx3_crypto_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_dptx3_link_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_dptx3_link_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1288,8 +1288,8 @@ static struct clk_branch disp_cc_mdss_dptx3_link_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_dptx3_link_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_dptx3_link_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_dptx3_link_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1306,8 +1306,8 @@ static struct clk_branch disp_cc_mdss_dptx3_link_intf_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_dptx3_link_intf_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_dptx3_link_div_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_dptx3_link_div_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1324,8 +1324,8 @@ static struct clk_branch disp_cc_mdss_dptx3_pixel0_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_dptx3_pixel0_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_dptx3_pixel0_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_dptx3_pixel0_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1342,8 +1342,8 @@ static struct clk_branch disp_cc_mdss_esc0_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_esc0_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_esc0_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_esc0_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1360,8 +1360,8 @@ static struct clk_branch disp_cc_mdss_esc1_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_esc1_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_esc1_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_esc1_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1378,8 +1378,8 @@ static struct clk_branch disp_cc_mdss_mdp1_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_mdp1_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_mdp_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_mdp_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1396,8 +1396,8 @@ static struct clk_branch disp_cc_mdss_mdp_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_mdp_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_mdp_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_mdp_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1414,8 +1414,8 @@ static struct clk_branch disp_cc_mdss_mdp_lut1_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_mdp_lut1_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_mdp_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_mdp_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1432,8 +1432,8 @@ static struct clk_branch disp_cc_mdss_mdp_lut_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_mdp_lut_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_mdp_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_mdp_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1450,8 +1450,8 @@ static struct clk_branch disp_cc_mdss_non_gdsc_ahb_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_non_gdsc_ahb_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_ahb_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_ahb_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1468,8 +1468,8 @@ static struct clk_branch disp_cc_mdss_pclk0_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_pclk0_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_pclk0_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_pclk0_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1486,8 +1486,8 @@ static struct clk_branch disp_cc_mdss_pclk1_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_pclk1_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_pclk1_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_pclk1_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1504,8 +1504,8 @@ static struct clk_branch disp_cc_mdss_rot1_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_rot1_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_rot_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_rot_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1522,8 +1522,8 @@ static struct clk_branch disp_cc_mdss_rot_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_rot_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_rot_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_rot_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1540,8 +1540,8 @@ static struct clk_branch disp_cc_mdss_rscc_ahb_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_rscc_ahb_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_ahb_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_ahb_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1558,8 +1558,8 @@ static struct clk_branch disp_cc_mdss_rscc_vsync_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_rscc_vsync_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_vsync_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_vsync_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1576,8 +1576,8 @@ static struct clk_branch disp_cc_mdss_vsync1_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_vsync1_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_vsync_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_vsync_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1594,8 +1594,8 @@ static struct clk_branch disp_cc_mdss_vsync_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_mdss_vsync_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_mdss_vsync_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_mdss_vsync_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1612,8 +1612,8 @@ static struct clk_branch disp_cc_sleep_clk = {
|
|||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "disp_cc_sleep_clk",
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
.hw = &disp_cc_sleep_clk_src.clkr.hw,
|
||||
.parent_hws = (const struct clk_hw*[]) {
|
||||
&disp_cc_sleep_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
|
|||
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