net: dsa: mv88e6xxx: Split monitor port configuration
Separate the configuration of the egress and ingress monitor port. This allows the port mirror functionality to do ingress and egress port mirroring to separate ports. Signed-off-by: Iwan R Timmer <irtimmer@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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2282001792
Коммит
5c74c54ce6
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@ -2390,6 +2390,13 @@ static int mv88e6xxx_setup_upstream_port(struct mv88e6xxx_chip *chip, int port)
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if (chip->info->ops->set_egress_port) {
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err = chip->info->ops->set_egress_port(chip,
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MV88E6XXX_EGRESS_DIR_INGRESS,
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upstream_port);
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if (err)
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return err;
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err = chip->info->ops->set_egress_port(chip,
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MV88E6XXX_EGRESS_DIR_EGRESS,
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upstream_port);
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if (err)
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return err;
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@ -33,6 +33,11 @@ enum mv88e6xxx_egress_mode {
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MV88E6XXX_EGRESS_MODE_ETHERTYPE,
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};
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enum mv88e6xxx_egress_direction {
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MV88E6XXX_EGRESS_DIR_INGRESS,
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MV88E6XXX_EGRESS_DIR_EGRESS,
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};
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enum mv88e6xxx_frame_mode {
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MV88E6XXX_FRAME_MODE_NORMAL,
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MV88E6XXX_FRAME_MODE_DSA,
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@ -465,7 +470,9 @@ struct mv88e6xxx_ops {
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int (*stats_get_stats)(struct mv88e6xxx_chip *chip, int port,
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uint64_t *data);
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int (*set_cpu_port)(struct mv88e6xxx_chip *chip, int port);
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int (*set_egress_port)(struct mv88e6xxx_chip *chip, int port);
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int (*set_egress_port)(struct mv88e6xxx_chip *chip,
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enum mv88e6xxx_egress_direction direction,
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int port);
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#define MV88E6XXX_CASCADE_PORT_NONE 0xe
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#define MV88E6XXX_CASCADE_PORT_MULTIPLE 0xf
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@ -263,7 +263,9 @@ int mv88e6250_g1_ieee_pri_map(struct mv88e6xxx_chip *chip)
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/* Offset 0x1a: Monitor Control */
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/* Offset 0x1a: Monitor & MGMT Control on some devices */
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int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port)
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int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip,
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enum mv88e6xxx_egress_direction direction,
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int port)
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{
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u16 reg;
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int err;
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@ -272,11 +274,20 @@ int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port)
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if (err)
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return err;
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reg &= ~(MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK |
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MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK);
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reg |= port << __bf_shf(MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK) |
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port << __bf_shf(MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK);
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switch (direction) {
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case MV88E6XXX_EGRESS_DIR_INGRESS:
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reg &= MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK;
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reg |= port <<
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__bf_shf(MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK);
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break;
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case MV88E6XXX_EGRESS_DIR_EGRESS:
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reg &= MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK;
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reg |= port <<
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__bf_shf(MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK);
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break;
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default:
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return -EINVAL;
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}
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return mv88e6xxx_g1_write(chip, MV88E6185_G1_MONITOR_CTL, reg);
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}
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@ -310,17 +321,24 @@ static int mv88e6390_g1_monitor_write(struct mv88e6xxx_chip *chip,
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return mv88e6xxx_g1_write(chip, MV88E6390_G1_MONITOR_MGMT_CTL, reg);
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}
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int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port)
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int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip,
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enum mv88e6xxx_egress_direction direction,
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int port)
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{
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u16 ptr;
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int err;
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switch (direction) {
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case MV88E6XXX_EGRESS_DIR_INGRESS:
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ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_INGRESS_DEST;
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err = mv88e6390_g1_monitor_write(chip, ptr, port);
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if (err)
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return err;
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break;
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case MV88E6XXX_EGRESS_DIR_EGRESS:
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ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_EGRESS_DEST;
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break;
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default:
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return -EINVAL;
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}
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err = mv88e6390_g1_monitor_write(chip, ptr, port);
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if (err)
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return err;
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@ -288,8 +288,12 @@ int mv88e6095_g1_stats_set_histogram(struct mv88e6xxx_chip *chip);
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int mv88e6390_g1_stats_set_histogram(struct mv88e6xxx_chip *chip);
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void mv88e6xxx_g1_stats_read(struct mv88e6xxx_chip *chip, int stat, u32 *val);
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int mv88e6xxx_g1_stats_clear(struct mv88e6xxx_chip *chip);
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int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port);
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int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port);
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int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip,
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enum mv88e6xxx_egress_direction direction,
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int port);
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int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip,
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enum mv88e6xxx_egress_direction direction,
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int port);
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int mv88e6095_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port);
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int mv88e6390_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port);
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int mv88e6390_g1_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip);
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