ARM: dts: imx: add devicetree for Tolino Vision 5
This adds a devicetree for the Tolino Vision 5 Ebook reader. It is based on boards called ¨e70k02¨. It is equipped with an imx6sl SoC. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Andreas Kemnade
Shawn Guo
Родитель
982ba1cbf5
Коммит
5cbd3a6396
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@ -635,6 +635,7 @@ dtb-$(CONFIG_SOC_IMX6SL) += \
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imx6sl-evk.dtb \
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imx6sl-tolino-shine2hd.dtb \
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imx6sl-tolino-shine3.dtb \
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imx6sl-tolino-vision5.dtb \
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imx6sl-warp.dtb
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dtb-$(CONFIG_SOC_IMX6SLL) += \
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imx6sll-evk.dtb \
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@ -0,0 +1,349 @@
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// SPDX-License-Identifier: (GPL-2.0)
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/*
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* Device tree for the Tolino Vision 5 ebook reader
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*
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* Name on mainboard is: 37NB-E70K0M+6A3
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* Serials start with: E70K02 (a number also seen in
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* vendor kernel sources)
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*
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* This mainboard seems to be equipped with different SoCs.
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* In the Tolino Vision 5 ebook reader it is a i.MX6SL
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*
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* Copyright 2021 Andreas Kemnade
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* based on works
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* Copyright 2016 Freescale Semiconductor, Inc.
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*/
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "imx6sl.dtsi"
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#include "e70k02.dtsi"
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/ {
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model = "Tolino Vision 5";
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compatible = "kobo,tolino-vision5", "fsl,imx6sl";
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};
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&gpio_keys {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_keys>;
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};
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&i2c1 {
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pinctrl-names = "default","sleep";
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pinctrl-0 = <&pinctrl_i2c1>;
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pinctrl-1 = <&pinctrl_i2c1_sleep>;
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};
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&i2c2 {
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pinctrl-names = "default","sleep";
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pinctrl-0 = <&pinctrl_i2c2>;
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pinctrl-1 = <&pinctrl_i2c2_sleep>;
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};
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&i2c3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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pinctrl_gpio_keys: gpio-keysgrp {
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fsl,pins = <
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MX6SL_PAD_FEC_CRS_DV__GPIO4_IO25 0x17059 /* PWR_SW */
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MX6SL_PAD_FEC_MDC__GPIO4_IO23 0x17059 /* HALL_EN */
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MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x17059 /* PAGE_UP */
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MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x17059 /* PAGE_DOWN */
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>;
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};
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX6SL_PAD_LCD_DAT1__GPIO2_IO21 0x79
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MX6SL_PAD_LCD_DAT4__GPIO2_IO24 0x79
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MX6SL_PAD_LCD_DAT5__GPIO2_IO25 0x79
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MX6SL_PAD_LCD_DAT6__GPIO2_IO26 0x79
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MX6SL_PAD_LCD_DAT7__GPIO2_IO27 0x79
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MX6SL_PAD_LCD_DAT8__GPIO2_IO28 0x79
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MX6SL_PAD_LCD_DAT9__GPIO2_IO29 0x79
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MX6SL_PAD_LCD_DAT10__GPIO2_IO30 0x79
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MX6SL_PAD_LCD_DAT11__GPIO2_IO31 0x79
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MX6SL_PAD_LCD_DAT12__GPIO3_IO00 0x79
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MX6SL_PAD_LCD_DAT13__GPIO3_IO01 0x79
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MX6SL_PAD_LCD_DAT14__GPIO3_IO02 0x79
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MX6SL_PAD_LCD_DAT15__GPIO3_IO03 0x79
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MX6SL_PAD_LCD_DAT16__GPIO3_IO04 0x79
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MX6SL_PAD_LCD_DAT17__GPIO3_IO05 0x79
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MX6SL_PAD_LCD_DAT18__GPIO3_IO06 0x79
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MX6SL_PAD_LCD_DAT19__GPIO3_IO07 0x79
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MX6SL_PAD_LCD_DAT20__GPIO3_IO08 0x79
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MX6SL_PAD_LCD_DAT21__GPIO3_IO09 0x79
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MX6SL_PAD_LCD_DAT22__GPIO3_IO10 0x79
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MX6SL_PAD_LCD_DAT23__GPIO3_IO11 0x79
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MX6SL_PAD_LCD_CLK__GPIO2_IO15 0x79
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MX6SL_PAD_LCD_ENABLE__GPIO2_IO16 0x79
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MX6SL_PAD_LCD_HSYNC__GPIO2_IO17 0x79
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MX6SL_PAD_LCD_VSYNC__GPIO2_IO18 0x79
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MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x79
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MX6SL_PAD_FEC_TX_CLK__GPIO4_IO21 0x79
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MX6SL_PAD_FEC_REF_CLK__GPIO4_IO26 0x79
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MX6SL_PAD_KEY_COL3__GPIO3_IO30 0x79
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MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x79
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MX6SL_PAD_ECSPI2_MOSI__GPIO4_IO13 0x79
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001f8b1
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MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001f8b1
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>;
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};
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pinctrl_i2c1_sleep: i2c1grp-sleep {
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fsl,pins = <
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MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x400108b1
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MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x400108b1
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001f8b1
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MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001f8b1
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>;
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};
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pinctrl_i2c2_sleep: i2c2grp-sleep {
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fsl,pins = <
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MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x400108b1
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MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x400108b1
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX6SL_PAD_REF_CLK_24M__I2C3_SCL 0x4001f8b1
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MX6SL_PAD_REF_CLK_32K__I2C3_SDA 0x4001f8b1
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>;
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};
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pinctrl_led: ledgrp {
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fsl,pins = <
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MX6SL_PAD_FEC_RXD0__GPIO4_IO17 0x10059
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>;
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};
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pinctrl_lm3630a_bl_gpio: lm3630a-bl-gpiogrp {
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fsl,pins = <
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MX6SL_PAD_EPDC_PWRCTRL3__GPIO2_IO10 0x10059 /* HWEN */
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>;
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};
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pinctrl_ricoh_gpio: ricoh-gpiogrp {
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fsl,pins = <
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MX6SL_PAD_FEC_MDIO__GPIO4_IO20 0x1b8b1 /* ricoh619 chg */
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MX6SL_PAD_FEC_RX_ER__GPIO4_IO19 0x1b8b1 /* ricoh619 irq */
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MX6SL_PAD_KEY_COL2__GPIO3_IO28 0x1b8b1 /* ricoh619 bat_low_int */
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1
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MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1
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>;
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};
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pinctrl_usbotg1: usbotg1grp {
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fsl,pins = <
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MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX6SL_PAD_SD1_CMD__SD1_CMD 0x17059
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MX6SL_PAD_SD1_CLK__SD1_CLK 0x17059
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MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x17059
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MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x17059
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MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x17059
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MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x17059
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MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x17059
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MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x17059
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MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x17059
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MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059
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>;
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};
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pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
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fsl,pins = <
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MX6SL_PAD_SD1_CMD__SD1_CMD 0x170b9
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MX6SL_PAD_SD1_CLK__SD1_CLK 0x170b9
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MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170b9
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MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170b9
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MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170b9
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MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170b9
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MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9
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MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9
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MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9
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MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9
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>;
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};
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pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
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fsl,pins = <
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MX6SL_PAD_SD1_CMD__SD1_CMD 0x170f9
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MX6SL_PAD_SD1_CLK__SD1_CLK 0x170f9
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MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
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MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
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MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
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MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
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MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9
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MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9
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MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9
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MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9
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>;
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};
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pinctrl_usdhc1_sleep: usdhc1-sleepgrp {
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fsl,pins = <
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MX6SL_PAD_SD1_CMD__SD1_CMD 0x10059
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MX6SL_PAD_SD1_CLK__SD1_CLK 0x10059
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MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x10059
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MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x10059
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MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x10059
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MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x10059
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MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x10059
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MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x10059
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MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x10059
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MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x10059
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX6SL_PAD_SD3_CMD__SD3_CMD 0x11059
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MX6SL_PAD_SD3_CLK__SD3_CLK 0x11059
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MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x11059
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MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x11059
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MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x11059
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MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x11059
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>;
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};
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pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
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fsl,pins = <
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MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9
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MX6SL_PAD_SD3_CLK__SD3_CLK 0x170b9
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MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
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MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
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MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
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MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
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>;
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};
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pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
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fsl,pins = <
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MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9
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MX6SL_PAD_SD3_CLK__SD3_CLK 0x170f9
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MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
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MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
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MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
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MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
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>;
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};
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pinctrl_usdhc3_sleep: usdhc3-sleepgrp {
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fsl,pins = <
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MX6SL_PAD_SD3_CMD__GPIO5_IO21 0x100c1
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MX6SL_PAD_SD3_CLK__GPIO5_IO18 0x100c1
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MX6SL_PAD_SD3_DAT0__GPIO5_IO19 0x100c1
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MX6SL_PAD_SD3_DAT1__GPIO5_IO20 0x100c1
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MX6SL_PAD_SD3_DAT2__GPIO5_IO16 0x100c1
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MX6SL_PAD_SD3_DAT3__GPIO5_IO17 0x100c1
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>;
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};
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pinctrl_wifi_power: wifi-powergrp {
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fsl,pins = <
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MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x10059 /* WIFI_3V3_ON */
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>;
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};
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pinctrl_wifi_reset: wifi-resetgrp {
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fsl,pins = <
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MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x10059 /* WIFI_RST */
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>;
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};
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};
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&leds {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_led>;
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};
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&lm3630a {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lm3630a_bl_gpio>;
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};
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®_wifi {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wifi_power>;
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};
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®_vdd1p1 {
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vin-supply = <&dcdc2_reg>;
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};
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®_vdd2p5 {
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vin-supply = <&dcdc2_reg>;
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};
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®_arm {
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vin-supply = <&dcdc3_reg>;
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};
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®_soc {
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vin-supply = <&dcdc1_reg>;
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};
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®_pu {
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vin-supply = <&dcdc1_reg>;
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};
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&ricoh619 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ricoh_gpio>;
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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};
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&usdhc1 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz","sleep";
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pinctrl-0 = <&pinctrl_usdhc1>;
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pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
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pinctrl-3 = <&pinctrl_usdhc1_sleep>;
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};
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&usdhc3 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz","sleep";
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pinctrl-0 = <&pinctrl_usdhc3>;
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pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
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pinctrl-3 = <&pinctrl_usdhc3_sleep>;
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};
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&wifi_pwrseq {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wifi_reset>;
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};
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