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rapdio/tsi721: Use PCI Express Capability accessors 

Use PCI Express Capability access functions to simplify tsi721 driver.

[bhelgaas: use word (16-bit) accesses for PCI_EXP_DEVCTL, PCI_EXP_DEVCTL2]
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Alexandre Bounine <alexandre.bounine@idt.com>
This commit is contained in:
Jiang Liu 2012-07-24 17:20:31 +08:00 коммит произвёл Bjorn Helgaas
Родитель 32195aec63
Коммит 5cdaaf8a11
1 изменённых файлов: 7 добавлений и 12 удалений
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19
drivers/rapidio/devices/tsi721.c
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@ -2212,9 +2212,8 @@ static int __devinit tsi721_probe(struct pci_dev *pdev,
const struct pci_device_id *id) const struct pci_device_id *id)
{ {
struct tsi721_device *priv; struct tsi721_device *priv;
int i, cap; int i;
int err; int err;
u32 regval;
priv = kzalloc(sizeof(struct tsi721_device), GFP_KERNEL); priv = kzalloc(sizeof(struct tsi721_device), GFP_KERNEL);
if (priv == NULL) { if (priv == NULL) {
@ -2320,20 +2319,16 @@ static int __devinit tsi721_probe(struct pci_dev *pdev,
dev_info(&pdev->dev, "Unable to set consistent DMA mask\n"); dev_info(&pdev->dev, "Unable to set consistent DMA mask\n");
} }
cap = pci_pcie_cap(pdev); BUG_ON(!pci_is_pcie(pdev));
BUG_ON(cap == 0);
/* Clear "no snoop" and "relaxed ordering" bits, use default MRRS. */ /* Clear "no snoop" and "relaxed ordering" bits, use default MRRS. */
pci_read_config_dword(pdev, cap + PCI_EXP_DEVCTL, &regval); pcie_capability_clear_and_set_word(pdev, PCI_EXP_DEVCTL,
regval &= ~(PCI_EXP_DEVCTL_READRQ | PCI_EXP_DEVCTL_RELAX_EN | PCI_EXP_DEVCTL_READRQ | PCI_EXP_DEVCTL_RELAX_EN |
PCI_EXP_DEVCTL_NOSNOOP_EN); PCI_EXP_DEVCTL_NOSNOOP_EN,
regval |= 0x2 << MAX_READ_REQUEST_SZ_SHIFT; 0x2 << MAX_READ_REQUEST_SZ_SHIFT);
pci_write_config_dword(pdev, cap + PCI_EXP_DEVCTL, regval);
/* Adjust PCIe completion timeout. */ /* Adjust PCIe completion timeout. */
pci_read_config_dword(pdev, cap + PCI_EXP_DEVCTL2, &regval); pcie_capability_clear_and_set_word(pdev, PCI_EXP_DEVCTL2, 0xf, 0x2);
regval &= ~(0x0f);
pci_write_config_dword(pdev, cap + PCI_EXP_DEVCTL2, regval | 0x2);
/* /*
* FIXUP: correct offsets of MSI-X tables in the MSI-X Capability Block * FIXUP: correct offsets of MSI-X tables in the MSI-X Capability Block