KVM: PPC: booke: add sregs support
Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Scott Wood
Avi Kivity
Родитель
eab176722f
Коммит
5ce941ee42
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@ -261,7 +261,7 @@ See KVM_GET_REGS for the data structure.
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4.13 KVM_GET_SREGS
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Capability: basic
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Architectures: x86
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Architectures: x86, ppc
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Type: vcpu ioctl
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Parameters: struct kvm_sregs (out)
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Returns: 0 on success, -1 on error
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@ -279,6 +279,8 @@ struct kvm_sregs {
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__u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
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};
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/* ppc -- see arch/powerpc/include/asm/kvm.h */
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interrupt_bitmap is a bitmap of pending external interrupts. At most
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one bit may be set. This interrupt has been acknowledged by the APIC
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but not yet injected into the cpu core.
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@ -286,7 +288,7 @@ but not yet injected into the cpu core.
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4.14 KVM_SET_SREGS
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Capability: basic
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Architectures: x86
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Architectures: x86, ppc
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Type: vcpu ioctl
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Parameters: struct kvm_sregs (in)
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Returns: 0 on success, -1 on error
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@ -45,6 +45,114 @@ struct kvm_regs {
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__u64 gpr[32];
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};
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#define KVM_SREGS_E_IMPL_NONE 0
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#define KVM_SREGS_E_IMPL_FSL 1
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#define KVM_SREGS_E_FSL_PIDn (1 << 0) /* PID1/PID2 */
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/*
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* Feature bits indicate which sections of the sregs struct are valid,
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* both in KVM_GET_SREGS and KVM_SET_SREGS. On KVM_SET_SREGS, registers
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* corresponding to unset feature bits will not be modified. This allows
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* restoring a checkpoint made without that feature, while keeping the
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* default values of the new registers.
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*
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* KVM_SREGS_E_BASE contains:
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* CSRR0/1 (refers to SRR2/3 on 40x)
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* ESR
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* DEAR
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* MCSR
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* TSR
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* TCR
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* DEC
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* TB
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* VRSAVE (USPRG0)
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*/
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#define KVM_SREGS_E_BASE (1 << 0)
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/*
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* KVM_SREGS_E_ARCH206 contains:
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*
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* PIR
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* MCSRR0/1
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* DECAR
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* IVPR
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*/
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#define KVM_SREGS_E_ARCH206 (1 << 1)
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/*
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* Contains EPCR, plus the upper half of 64-bit registers
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* that are 32-bit on 32-bit implementations.
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*/
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#define KVM_SREGS_E_64 (1 << 2)
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#define KVM_SREGS_E_SPRG8 (1 << 3)
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#define KVM_SREGS_E_MCIVPR (1 << 4)
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/*
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* IVORs are used -- contains IVOR0-15, plus additional IVORs
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* in combination with an appropriate feature bit.
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*/
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#define KVM_SREGS_E_IVOR (1 << 5)
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/*
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* Contains MAS0-4, MAS6-7, TLBnCFG, MMUCFG.
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* Also TLBnPS if MMUCFG[MAVN] = 1.
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*/
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#define KVM_SREGS_E_ARCH206_MMU (1 << 6)
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/* DBSR, DBCR, IAC, DAC, DVC */
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#define KVM_SREGS_E_DEBUG (1 << 7)
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/* Enhanced debug -- DSRR0/1, SPRG9 */
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#define KVM_SREGS_E_ED (1 << 8)
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/* Embedded Floating Point (SPE) -- IVOR32-34 if KVM_SREGS_E_IVOR */
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#define KVM_SREGS_E_SPE (1 << 9)
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/* External Proxy (EXP) -- EPR */
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#define KVM_SREGS_EXP (1 << 10)
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/* External PID (E.PD) -- EPSC/EPLC */
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#define KVM_SREGS_E_PD (1 << 11)
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/* Processor Control (E.PC) -- IVOR36-37 if KVM_SREGS_E_IVOR */
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#define KVM_SREGS_E_PC (1 << 12)
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/* Page table (E.PT) -- EPTCFG */
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#define KVM_SREGS_E_PT (1 << 13)
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/* Embedded Performance Monitor (E.PM) -- IVOR35 if KVM_SREGS_E_IVOR */
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#define KVM_SREGS_E_PM (1 << 14)
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/*
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* Special updates:
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*
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* Some registers may change even while a vcpu is not running.
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* To avoid losing these changes, by default these registers are
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* not updated by KVM_SET_SREGS. To force an update, set the bit
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* in u.e.update_special corresponding to the register to be updated.
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*
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* The update_special field is zero on return from KVM_GET_SREGS.
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*
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* When restoring a checkpoint, the caller can set update_special
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* to 0xffffffff to ensure that everything is restored, even new features
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* that the caller doesn't know about.
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*/
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#define KVM_SREGS_E_UPDATE_MCSR (1 << 0)
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#define KVM_SREGS_E_UPDATE_TSR (1 << 1)
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#define KVM_SREGS_E_UPDATE_DEC (1 << 2)
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#define KVM_SREGS_E_UPDATE_DBSR (1 << 3)
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/*
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* In KVM_SET_SREGS, reserved/pad fields must be left untouched from a
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* previous KVM_GET_REGS.
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*
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* Unless otherwise indicated, setting any register with KVM_SET_SREGS
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* directly sets its value. It does not trigger any special semantics such
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* as write-one-to-clear. Calling KVM_SET_SREGS on an unmodified struct
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* just received from KVM_GET_SREGS is always a no-op.
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*/
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struct kvm_sregs {
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__u32 pvr;
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union {
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@ -62,6 +170,82 @@ struct kvm_sregs {
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__u64 dbat[8];
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} ppc32;
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} s;
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struct {
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union {
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struct { /* KVM_SREGS_E_IMPL_FSL */
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__u32 features; /* KVM_SREGS_E_FSL_ */
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__u32 svr;
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__u64 mcar;
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__u32 hid0;
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/* KVM_SREGS_E_FSL_PIDn */
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__u32 pid1, pid2;
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} fsl;
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__u8 pad[256];
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} impl;
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__u32 features; /* KVM_SREGS_E_ */
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__u32 impl_id; /* KVM_SREGS_E_IMPL_ */
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__u32 update_special; /* KVM_SREGS_E_UPDATE_ */
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__u32 pir; /* read-only */
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__u64 sprg8;
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__u64 sprg9; /* E.ED */
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__u64 csrr0;
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__u64 dsrr0; /* E.ED */
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__u64 mcsrr0;
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__u32 csrr1;
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__u32 dsrr1; /* E.ED */
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__u32 mcsrr1;
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__u32 esr;
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__u64 dear;
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__u64 ivpr;
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__u64 mcivpr;
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__u64 mcsr; /* KVM_SREGS_E_UPDATE_MCSR */
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__u32 tsr; /* KVM_SREGS_E_UPDATE_TSR */
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__u32 tcr;
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__u32 decar;
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__u32 dec; /* KVM_SREGS_E_UPDATE_DEC */
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/*
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* Userspace can read TB directly, but the
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* value reported here is consistent with "dec".
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*
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* Read-only.
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*/
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__u64 tb;
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__u32 dbsr; /* KVM_SREGS_E_UPDATE_DBSR */
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__u32 dbcr[3];
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__u32 iac[4];
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__u32 dac[2];
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__u32 dvc[2];
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__u8 num_iac; /* read-only */
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__u8 num_dac; /* read-only */
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__u8 num_dvc; /* read-only */
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__u8 pad;
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__u32 epr; /* EXP */
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__u32 vrsave; /* a.k.a. USPRG0 */
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__u32 epcr; /* KVM_SREGS_E_64 */
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__u32 mas0;
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__u32 mas1;
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__u64 mas2;
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__u64 mas7_3;
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__u32 mas4;
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__u32 mas6;
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__u32 ivor_low[16]; /* IVOR0-15 */
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__u32 ivor_high[18]; /* IVOR32+, plus room to expand */
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__u32 mmucfg; /* read-only */
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__u32 eptcfg; /* E.PT, read-only */
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__u32 tlbcfg[4];/* read-only */
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__u32 tlbps[4]; /* read-only */
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__u32 eplc, epsc; /* E.PD */
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} e;
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__u8 pad[1020];
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} u;
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};
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@ -61,7 +61,6 @@ static inline struct kvmppc_vcpu_44x *to_44x(struct kvm_vcpu *vcpu)
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return container_of(vcpu, struct kvmppc_vcpu_44x, vcpu);
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}
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void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 new_pid);
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void kvmppc_44x_tlb_put(struct kvm_vcpu *vcpu);
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void kvmppc_44x_tlb_load(struct kvm_vcpu *vcpu);
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@ -59,6 +59,7 @@ struct kvmppc_vcpu_e500 {
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u32 hid1;
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u32 tlb0cfg;
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u32 tlb1cfg;
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u64 mcar;
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struct kvm_vcpu vcpu;
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};
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@ -233,6 +233,9 @@ struct kvm_vcpu_arch {
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ulong csrr1;
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ulong dsrr0;
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ulong dsrr1;
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ulong mcsrr0;
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ulong mcsrr1;
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ulong mcsr;
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ulong esr;
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u32 dec;
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u32 decar;
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@ -61,6 +61,7 @@ extern int kvmppc_emulate_instruction(struct kvm_run *run,
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struct kvm_vcpu *vcpu);
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extern int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu);
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extern void kvmppc_emulate_dec(struct kvm_vcpu *vcpu);
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extern u32 kvmppc_get_dec(struct kvm_vcpu *vcpu, u64 tb);
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/* Core-specific hooks */
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@ -142,4 +143,12 @@ static inline u32 kvmppc_set_field(u64 inst, int msb, int lsb, int value)
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return r;
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}
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void kvmppc_core_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
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int kvmppc_core_set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
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void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
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int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
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void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid);
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#endif /* __POWERPC_KVM_PPC_H__ */
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@ -107,6 +107,16 @@ int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,
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return 0;
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}
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void kvmppc_core_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
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{
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kvmppc_get_sregs_ivor(vcpu, sregs);
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}
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int kvmppc_core_set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
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{
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return kvmppc_set_sregs_ivor(vcpu, sregs);
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}
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struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
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{
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struct kvmppc_vcpu_44x *vcpu_44x;
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@ -569,6 +569,7 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
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kvmppc_set_msr(vcpu, regs->msr);
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vcpu->arch.shared->srr0 = regs->srr0;
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vcpu->arch.shared->srr1 = regs->srr1;
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kvmppc_set_pid(vcpu, regs->pid);
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vcpu->arch.shared->sprg0 = regs->sprg0;
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vcpu->arch.shared->sprg1 = regs->sprg1;
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vcpu->arch.shared->sprg2 = regs->sprg2;
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@ -584,16 +585,165 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
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return 0;
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}
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static void get_sregs_base(struct kvm_vcpu *vcpu,
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struct kvm_sregs *sregs)
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{
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u64 tb = get_tb();
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sregs->u.e.features |= KVM_SREGS_E_BASE;
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sregs->u.e.csrr0 = vcpu->arch.csrr0;
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sregs->u.e.csrr1 = vcpu->arch.csrr1;
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sregs->u.e.mcsr = vcpu->arch.mcsr;
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sregs->u.e.esr = vcpu->arch.esr;
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sregs->u.e.dear = vcpu->arch.shared->dar;
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sregs->u.e.tsr = vcpu->arch.tsr;
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sregs->u.e.tcr = vcpu->arch.tcr;
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sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
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sregs->u.e.tb = tb;
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sregs->u.e.vrsave = vcpu->arch.vrsave;
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}
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static int set_sregs_base(struct kvm_vcpu *vcpu,
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struct kvm_sregs *sregs)
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{
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if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
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return 0;
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vcpu->arch.csrr0 = sregs->u.e.csrr0;
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vcpu->arch.csrr1 = sregs->u.e.csrr1;
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vcpu->arch.mcsr = sregs->u.e.mcsr;
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vcpu->arch.esr = sregs->u.e.esr;
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vcpu->arch.shared->dar = sregs->u.e.dear;
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vcpu->arch.vrsave = sregs->u.e.vrsave;
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vcpu->arch.tcr = sregs->u.e.tcr;
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if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC)
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vcpu->arch.dec = sregs->u.e.dec;
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kvmppc_emulate_dec(vcpu);
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if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) {
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/*
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* FIXME: existing KVM timer handling is incomplete.
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* TSR cannot be read by the guest, and its value in
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* vcpu->arch is always zero. For now, just handle
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* the case where the caller is trying to inject a
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* decrementer interrupt.
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*/
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if ((sregs->u.e.tsr & TSR_DIS) &&
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(vcpu->arch.tcr & TCR_DIE))
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kvmppc_core_queue_dec(vcpu);
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}
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return 0;
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}
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static void get_sregs_arch206(struct kvm_vcpu *vcpu,
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struct kvm_sregs *sregs)
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{
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sregs->u.e.features |= KVM_SREGS_E_ARCH206;
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sregs->u.e.pir = 0;
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sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
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sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
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sregs->u.e.decar = vcpu->arch.decar;
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sregs->u.e.ivpr = vcpu->arch.ivpr;
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}
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static int set_sregs_arch206(struct kvm_vcpu *vcpu,
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struct kvm_sregs *sregs)
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{
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if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
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return 0;
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if (sregs->u.e.pir != 0)
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return -EINVAL;
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vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
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vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
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vcpu->arch.decar = sregs->u.e.decar;
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vcpu->arch.ivpr = sregs->u.e.ivpr;
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return 0;
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}
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void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
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{
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sregs->u.e.features |= KVM_SREGS_E_IVOR;
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sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
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sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
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sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
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sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
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sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
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sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
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sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
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sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
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sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
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sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
|
||||
sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
|
||||
sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
|
||||
sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
|
||||
sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
|
||||
sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
|
||||
sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
|
||||
}
|
||||
|
||||
int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
|
||||
{
|
||||
if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
|
||||
return 0;
|
||||
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
|
||||
struct kvm_sregs *sregs)
|
||||
{
|
||||
return -ENOTSUPP;
|
||||
sregs->pvr = vcpu->arch.pvr;
|
||||
|
||||
get_sregs_base(vcpu, sregs);
|
||||
get_sregs_arch206(vcpu, sregs);
|
||||
kvmppc_core_get_sregs(vcpu, sregs);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
|
||||
struct kvm_sregs *sregs)
|
||||
{
|
||||
return -ENOTSUPP;
|
||||
int ret;
|
||||
|
||||
if (vcpu->arch.pvr != sregs->pvr)
|
||||
return -EINVAL;
|
||||
|
||||
ret = set_sregs_base(vcpu, sregs);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = set_sregs_arch206(vcpu, sregs);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return kvmppc_core_set_sregs(vcpu, sregs);
|
||||
}
|
||||
|
||||
int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
|
||||
|
|
|
|||
|
|
@ -97,6 +97,81 @@ int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,
|
|||
return 0;
|
||||
}
|
||||
|
||||
void kvmppc_core_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
|
||||
{
|
||||
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
||||
|
||||
sregs->u.e.features |= KVM_SREGS_E_ARCH206_MMU | KVM_SREGS_E_SPE |
|
||||
KVM_SREGS_E_PM;
|
||||
sregs->u.e.impl_id = KVM_SREGS_E_IMPL_FSL;
|
||||
|
||||
sregs->u.e.impl.fsl.features = 0;
|
||||
sregs->u.e.impl.fsl.svr = vcpu_e500->svr;
|
||||
sregs->u.e.impl.fsl.hid0 = vcpu_e500->hid0;
|
||||
sregs->u.e.impl.fsl.mcar = vcpu_e500->mcar;
|
||||
|
||||
sregs->u.e.mas0 = vcpu_e500->mas0;
|
||||
sregs->u.e.mas1 = vcpu_e500->mas1;
|
||||
sregs->u.e.mas2 = vcpu_e500->mas2;
|
||||
sregs->u.e.mas7_3 = ((u64)vcpu_e500->mas7 << 32) | vcpu_e500->mas3;
|
||||
sregs->u.e.mas4 = vcpu_e500->mas4;
|
||||
sregs->u.e.mas6 = vcpu_e500->mas6;
|
||||
|
||||
sregs->u.e.mmucfg = mfspr(SPRN_MMUCFG);
|
||||
sregs->u.e.tlbcfg[0] = vcpu_e500->tlb0cfg;
|
||||
sregs->u.e.tlbcfg[1] = vcpu_e500->tlb1cfg;
|
||||
sregs->u.e.tlbcfg[2] = 0;
|
||||
sregs->u.e.tlbcfg[3] = 0;
|
||||
|
||||
sregs->u.e.ivor_high[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];
|
||||
sregs->u.e.ivor_high[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA];
|
||||
sregs->u.e.ivor_high[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND];
|
||||
sregs->u.e.ivor_high[3] =
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
|
||||
|
||||
kvmppc_get_sregs_ivor(vcpu, sregs);
|
||||
}
|
||||
|
||||
int kvmppc_core_set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
|
||||
{
|
||||
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
||||
|
||||
if (sregs->u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
|
||||
vcpu_e500->svr = sregs->u.e.impl.fsl.svr;
|
||||
vcpu_e500->hid0 = sregs->u.e.impl.fsl.hid0;
|
||||
vcpu_e500->mcar = sregs->u.e.impl.fsl.mcar;
|
||||
}
|
||||
|
||||
if (sregs->u.e.features & KVM_SREGS_E_ARCH206_MMU) {
|
||||
vcpu_e500->mas0 = sregs->u.e.mas0;
|
||||
vcpu_e500->mas1 = sregs->u.e.mas1;
|
||||
vcpu_e500->mas2 = sregs->u.e.mas2;
|
||||
vcpu_e500->mas7 = sregs->u.e.mas7_3 >> 32;
|
||||
vcpu_e500->mas3 = (u32)sregs->u.e.mas7_3;
|
||||
vcpu_e500->mas4 = sregs->u.e.mas4;
|
||||
vcpu_e500->mas6 = sregs->u.e.mas6;
|
||||
}
|
||||
|
||||
if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
|
||||
return 0;
|
||||
|
||||
if (sregs->u.e.features & KVM_SREGS_E_SPE) {
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] =
|
||||
sregs->u.e.ivor_high[0];
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] =
|
||||
sregs->u.e.ivor_high[1];
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] =
|
||||
sregs->u.e.ivor_high[2];
|
||||
}
|
||||
|
||||
if (sregs->u.e.features & KVM_SREGS_E_PM) {
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] =
|
||||
sregs->u.e.ivor_high[3];
|
||||
}
|
||||
|
||||
return kvmppc_set_sregs_ivor(vcpu, sregs);
|
||||
}
|
||||
|
||||
struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
|
||||
{
|
||||
struct kvmppc_vcpu_e500 *vcpu_e500;
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
|
||||
* Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
|
||||
*
|
||||
* Author: Yu Liu, <yu.liu@freescale.com>
|
||||
*
|
||||
|
|
@ -78,8 +78,7 @@ int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
|
|||
|
||||
switch (sprn) {
|
||||
case SPRN_PID:
|
||||
vcpu_e500->pid[0] = vcpu->arch.shadow_pid =
|
||||
vcpu->arch.pid = spr_val;
|
||||
kvmppc_set_pid(vcpu, spr_val);
|
||||
break;
|
||||
case SPRN_PID1:
|
||||
vcpu_e500->pid[1] = spr_val; break;
|
||||
|
|
|
|||
|
|
@ -675,6 +675,14 @@ int kvmppc_e500_tlb_search(struct kvm_vcpu *vcpu,
|
|||
return -1;
|
||||
}
|
||||
|
||||
void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid)
|
||||
{
|
||||
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
||||
|
||||
vcpu_e500->pid[0] = vcpu->arch.shadow_pid =
|
||||
vcpu->arch.pid = pid;
|
||||
}
|
||||
|
||||
void kvmppc_e500_tlb_setup(struct kvmppc_vcpu_e500 *vcpu_e500)
|
||||
{
|
||||
struct tlbe *tlbe;
|
||||
|
|
|
|||
|
|
@ -114,6 +114,12 @@ void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
|
|||
}
|
||||
}
|
||||
|
||||
u32 kvmppc_get_dec(struct kvm_vcpu *vcpu, u64 tb)
|
||||
{
|
||||
u64 jd = tb - vcpu->arch.dec_jiffies;
|
||||
return vcpu->arch.dec - jd;
|
||||
}
|
||||
|
||||
/* XXX to do:
|
||||
* lhax
|
||||
* lhaux
|
||||
|
|
@ -279,11 +285,8 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
|
|||
|
||||
case SPRN_DEC:
|
||||
{
|
||||
u64 jd = get_tb() - vcpu->arch.dec_jiffies;
|
||||
kvmppc_set_gpr(vcpu, rt, vcpu->arch.dec - jd);
|
||||
pr_debug("mfDEC: %x - %llx = %lx\n",
|
||||
vcpu->arch.dec, jd,
|
||||
kvmppc_get_gpr(vcpu, rt));
|
||||
kvmppc_set_gpr(vcpu, rt,
|
||||
kvmppc_get_dec(vcpu, get_tb()));
|
||||
break;
|
||||
}
|
||||
default:
|
||||
|
|
|
|||
|
|
@ -175,7 +175,11 @@ int kvm_dev_ioctl_check_extension(long ext)
|
|||
int r;
|
||||
|
||||
switch (ext) {
|
||||
#ifdef CONFIG_BOOKE
|
||||
case KVM_CAP_PPC_BOOKE_SREGS:
|
||||
#else
|
||||
case KVM_CAP_PPC_SEGSTATE:
|
||||
#endif
|
||||
case KVM_CAP_PPC_PAIRED_SINGLES:
|
||||
case KVM_CAP_PPC_UNSET_IRQ:
|
||||
case KVM_CAP_PPC_IRQ_LEVEL:
|
||||
|
|
|
|||
|
|
@ -543,6 +543,7 @@ struct kvm_ppc_pvinfo {
|
|||
#define KVM_CAP_ASYNC_PF 59
|
||||
#define KVM_CAP_TSC_CONTROL 60
|
||||
#define KVM_CAP_GET_TSC_KHZ 61
|
||||
#define KVM_CAP_PPC_BOOKE_SREGS 62
|
||||
|
||||
#ifdef KVM_CAP_IRQ_ROUTING
|
||||
|
||||
|
|
|
|||
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