mtd: spi-nor: sfdp: do not make invalid quad enable fatal
The Micron MT35XU512ABA flash does not support the quad enable bit. But instead of programming the Quad Enable Require field to 000b ("Device does not have a QE bit"), it is programmed to 111b ("Reserved"). While this is technically incorrect, it is not reason enough to abort BFPT parsing. Instead, continue BFPT parsing and let flashes set it in their fixup hooks. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200623183030.26591-12-p.yadav@ti.com
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@ -598,7 +598,8 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
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break;
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default:
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return -EINVAL;
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dev_dbg(nor->dev, "BFPT QER reserved value used\n");
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break;
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}
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/* Stop here if not JESD216 rev C or later. */
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