dt-bindings: memory: mediatek: Add a common memory header file
Put all the macros about smi larb/port togethers. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Tomasz Figa <tfiga@chromium.org> Link: https://lore.kernel.org/r/20210111111914.22211-3-yong.wu@mediatek.com Signed-off-by: Will Deacon <will@kernel.org>
This commit is contained in:
Родитель
bca2842680
Коммит
5cf482f2f7
|
@ -6,7 +6,7 @@
|
|||
#ifndef __DTS_IOMMU_PORT_MT2712_H
|
||||
#define __DTS_IOMMU_PORT_MT2712_H
|
||||
|
||||
#define MTK_M4U_ID(larb, port) (((larb) << 5) | (port))
|
||||
#include <dt-bindings/memory/mtk-memory-port.h>
|
||||
|
||||
#define M4U_LARB0_ID 0
|
||||
#define M4U_LARB1_ID 1
|
||||
|
|
|
@ -7,7 +7,7 @@
|
|||
#ifndef _DTS_IOMMU_PORT_MT6779_H_
|
||||
#define _DTS_IOMMU_PORT_MT6779_H_
|
||||
|
||||
#define MTK_M4U_ID(larb, port) (((larb) << 5) | (port))
|
||||
#include <dt-bindings/memory/mtk-memory-port.h>
|
||||
|
||||
#define M4U_LARB0_ID 0
|
||||
#define M4U_LARB1_ID 1
|
||||
|
|
|
@ -8,7 +8,7 @@
|
|||
#ifndef __DTS_IOMMU_PORT_MT8167_H
|
||||
#define __DTS_IOMMU_PORT_MT8167_H
|
||||
|
||||
#define MTK_M4U_ID(larb, port) (((larb) << 5) | (port))
|
||||
#include <dt-bindings/memory/mtk-memory-port.h>
|
||||
|
||||
#define M4U_LARB0_ID 0
|
||||
#define M4U_LARB1_ID 1
|
||||
|
|
|
@ -6,7 +6,7 @@
|
|||
#ifndef __DTS_IOMMU_PORT_MT8173_H
|
||||
#define __DTS_IOMMU_PORT_MT8173_H
|
||||
|
||||
#define MTK_M4U_ID(larb, port) (((larb) << 5) | (port))
|
||||
#include <dt-bindings/memory/mtk-memory-port.h>
|
||||
|
||||
#define M4U_LARB0_ID 0
|
||||
#define M4U_LARB1_ID 1
|
||||
|
|
|
@ -6,7 +6,7 @@
|
|||
#ifndef __DTS_IOMMU_PORT_MT8183_H
|
||||
#define __DTS_IOMMU_PORT_MT8183_H
|
||||
|
||||
#define MTK_M4U_ID(larb, port) (((larb) << 5) | (port))
|
||||
#include <dt-bindings/memory/mtk-memory-port.h>
|
||||
|
||||
#define M4U_LARB0_ID 0
|
||||
#define M4U_LARB1_ID 1
|
||||
|
|
|
@ -0,0 +1,15 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Copyright (c) 2020 MediaTek Inc.
|
||||
* Author: Yong Wu <yong.wu@mediatek.com>
|
||||
*/
|
||||
#ifndef __DT_BINDINGS_MEMORY_MTK_MEMORY_PORT_H_
|
||||
#define __DT_BINDINGS_MEMORY_MTK_MEMORY_PORT_H_
|
||||
|
||||
#define MTK_LARB_NR_MAX 16
|
||||
|
||||
#define MTK_M4U_ID(larb, port) (((larb) << 5) | (port))
|
||||
#define MTK_M4U_TO_LARB(id) (((id) >> 5) & 0xf)
|
||||
#define MTK_M4U_TO_PORT(id) ((id) & 0x1f)
|
||||
|
||||
#endif
|
Загрузка…
Ссылка в новой задаче