pinctrl: baytrail: Reuse struct intel_pinctrl in the driver
We may use now available struct intel_pinctrl in the driver. No functional change implied. Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
This commit is contained in:
Andy Shevchenko
Родитель
2c02af709b
Коммит
5d33e0eb7f
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@ -93,7 +93,7 @@
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#define BYT_DEFAULT_GPIO_MUX 0
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#define BYT_ALTER_GPIO_MUX 1
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struct byt_gpio_pin_context {
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struct intel_pad_context {
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u32 conf0;
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u32 val;
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};
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@ -105,17 +105,6 @@ struct byt_gpio_pin_context {
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.pad_map = (map),\
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}
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struct byt_gpio {
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struct device *dev;
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struct gpio_chip chip;
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struct irq_chip irqchip;
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struct pinctrl_dev *pctl_dev;
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struct pinctrl_desc pctl_desc;
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const struct intel_pinctrl_soc_data *soc_data;
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struct intel_community *communities_copy;
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struct byt_gpio_pin_context *saved_context;
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};
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/* SCORE pins, aka GPIOC_<pin_no> or GPIO_S0_SC[<pin_no>] */
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static const struct pinctrl_pin_desc byt_score_pins[] = {
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PINCTRL_PIN(0, "SATA_GP0"),
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@ -551,14 +540,14 @@ static const struct intel_pinctrl_soc_data *byt_soc_data[] = {
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static DEFINE_RAW_SPINLOCK(byt_lock);
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static struct intel_community *byt_get_community(struct byt_gpio *vg,
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static struct intel_community *byt_get_community(struct intel_pinctrl *vg,
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unsigned int pin)
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{
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struct intel_community *comm;
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int i;
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for (i = 0; i < vg->soc_data->ncommunities; i++) {
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comm = vg->communities_copy + i;
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for (i = 0; i < vg->ncommunities; i++) {
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comm = vg->communities + i;
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if (pin < comm->pin_base + comm->npins && pin >= comm->pin_base)
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return comm;
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}
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@ -566,7 +555,7 @@ static struct intel_community *byt_get_community(struct byt_gpio *vg,
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return NULL;
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}
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static void __iomem *byt_gpio_reg(struct byt_gpio *vg, unsigned int offset,
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static void __iomem *byt_gpio_reg(struct intel_pinctrl *vg, unsigned int offset,
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int reg)
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{
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struct intel_community *comm = byt_get_community(vg, offset);
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@ -593,17 +582,17 @@ static void __iomem *byt_gpio_reg(struct byt_gpio *vg, unsigned int offset,
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static int byt_get_groups_count(struct pinctrl_dev *pctldev)
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{
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struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev);
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struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
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return vg->soc_data->ngroups;
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return vg->soc->ngroups;
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}
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static const char *byt_get_group_name(struct pinctrl_dev *pctldev,
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unsigned int selector)
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{
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struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev);
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struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
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return vg->soc_data->groups[selector].name;
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return vg->soc->groups[selector].name;
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}
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static int byt_get_group_pins(struct pinctrl_dev *pctldev,
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@ -611,10 +600,10 @@ static int byt_get_group_pins(struct pinctrl_dev *pctldev,
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const unsigned int **pins,
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unsigned int *num_pins)
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{
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struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev);
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struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
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*pins = vg->soc_data->groups[selector].pins;
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*num_pins = vg->soc_data->groups[selector].npins;
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*pins = vg->soc->groups[selector].pins;
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*num_pins = vg->soc->groups[selector].npins;
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return 0;
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}
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@ -627,17 +616,17 @@ static const struct pinctrl_ops byt_pinctrl_ops = {
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static int byt_get_functions_count(struct pinctrl_dev *pctldev)
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{
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struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev);
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struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
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return vg->soc_data->nfunctions;
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return vg->soc->nfunctions;
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}
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static const char *byt_get_function_name(struct pinctrl_dev *pctldev,
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unsigned int selector)
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{
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struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev);
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struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
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return vg->soc_data->functions[selector].name;
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return vg->soc->functions[selector].name;
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}
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static int byt_get_function_groups(struct pinctrl_dev *pctldev,
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@ -645,15 +634,15 @@ static int byt_get_function_groups(struct pinctrl_dev *pctldev,
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const char * const **groups,
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unsigned int *num_groups)
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{
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struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev);
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struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
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*groups = vg->soc_data->functions[selector].groups;
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*num_groups = vg->soc_data->functions[selector].ngroups;
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*groups = vg->soc->functions[selector].groups;
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*num_groups = vg->soc->functions[selector].ngroups;
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return 0;
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}
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static void byt_set_group_simple_mux(struct byt_gpio *vg,
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static void byt_set_group_simple_mux(struct intel_pinctrl *vg,
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const struct intel_pingroup group,
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unsigned int func)
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{
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@ -683,7 +672,7 @@ static void byt_set_group_simple_mux(struct byt_gpio *vg,
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raw_spin_unlock_irqrestore(&byt_lock, flags);
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}
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static void byt_set_group_mixed_mux(struct byt_gpio *vg,
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static void byt_set_group_mixed_mux(struct intel_pinctrl *vg,
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const struct intel_pingroup group,
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const unsigned int *func)
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{
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@ -716,9 +705,9 @@ static void byt_set_group_mixed_mux(struct byt_gpio *vg,
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static int byt_set_mux(struct pinctrl_dev *pctldev, unsigned int func_selector,
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unsigned int group_selector)
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{
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struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev);
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const struct intel_function func = vg->soc_data->functions[func_selector];
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const struct intel_pingroup group = vg->soc_data->groups[group_selector];
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struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
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const struct intel_function func = vg->soc->functions[func_selector];
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const struct intel_pingroup group = vg->soc->groups[group_selector];
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if (group.modes)
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byt_set_group_mixed_mux(vg, group, group.modes);
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@ -730,22 +719,22 @@ static int byt_set_mux(struct pinctrl_dev *pctldev, unsigned int func_selector,
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return 0;
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}
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static u32 byt_get_gpio_mux(struct byt_gpio *vg, unsigned int offset)
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static u32 byt_get_gpio_mux(struct intel_pinctrl *vg, unsigned int offset)
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{
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/* SCORE pin 92-93 */
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if (!strcmp(vg->soc_data->uid, BYT_SCORE_ACPI_UID) &&
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if (!strcmp(vg->soc->uid, BYT_SCORE_ACPI_UID) &&
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offset >= 92 && offset <= 93)
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return BYT_ALTER_GPIO_MUX;
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/* SUS pin 11-21 */
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if (!strcmp(vg->soc_data->uid, BYT_SUS_ACPI_UID) &&
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if (!strcmp(vg->soc->uid, BYT_SUS_ACPI_UID) &&
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offset >= 11 && offset <= 21)
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return BYT_ALTER_GPIO_MUX;
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return BYT_DEFAULT_GPIO_MUX;
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}
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static void byt_gpio_clear_triggering(struct byt_gpio *vg, unsigned int offset)
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static void byt_gpio_clear_triggering(struct intel_pinctrl *vg, unsigned int offset)
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{
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void __iomem *reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);
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unsigned long flags;
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@ -762,7 +751,7 @@ static int byt_gpio_request_enable(struct pinctrl_dev *pctl_dev,
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struct pinctrl_gpio_range *range,
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unsigned int offset)
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{
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struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev);
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struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev);
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void __iomem *reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);
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u32 value, gpio_mux;
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unsigned long flags;
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@ -799,7 +788,7 @@ static void byt_gpio_disable_free(struct pinctrl_dev *pctl_dev,
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struct pinctrl_gpio_range *range,
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unsigned int offset)
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{
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struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev);
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struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev);
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byt_gpio_clear_triggering(vg, offset);
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pm_runtime_put(vg->dev);
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@ -810,7 +799,7 @@ static int byt_gpio_set_direction(struct pinctrl_dev *pctl_dev,
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unsigned int offset,
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bool input)
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{
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struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev);
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struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev);
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void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
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void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);
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unsigned long flags;
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@ -893,7 +882,7 @@ static int byt_set_pull_strength(u32 *reg, u16 strength)
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static int byt_pin_config_get(struct pinctrl_dev *pctl_dev, unsigned int offset,
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unsigned long *config)
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{
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struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev);
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struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev);
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enum pin_config_param param = pinconf_to_config_param(*config);
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void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);
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void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
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@ -978,7 +967,7 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev,
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unsigned long *configs,
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unsigned int num_configs)
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{
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struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev);
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struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev);
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unsigned int param, arg;
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void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);
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void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
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@ -1115,7 +1104,7 @@ static const struct pinctrl_desc byt_pinctrl_desc = {
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static int byt_gpio_get(struct gpio_chip *chip, unsigned int offset)
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{
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struct byt_gpio *vg = gpiochip_get_data(chip);
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struct intel_pinctrl *vg = gpiochip_get_data(chip);
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void __iomem *reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
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unsigned long flags;
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u32 val;
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@ -1129,7 +1118,7 @@ static int byt_gpio_get(struct gpio_chip *chip, unsigned int offset)
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static void byt_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)
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{
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struct byt_gpio *vg = gpiochip_get_data(chip);
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struct intel_pinctrl *vg = gpiochip_get_data(chip);
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void __iomem *reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
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unsigned long flags;
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u32 old_val;
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@ -1148,7 +1137,7 @@ static void byt_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)
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static int byt_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
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{
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struct byt_gpio *vg = gpiochip_get_data(chip);
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struct intel_pinctrl *vg = gpiochip_get_data(chip);
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void __iomem *reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
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unsigned long flags;
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u32 value;
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@ -1188,11 +1177,11 @@ static int byt_gpio_direction_output(struct gpio_chip *chip,
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static void byt_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
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{
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struct byt_gpio *vg = gpiochip_get_data(chip);
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struct intel_pinctrl *vg = gpiochip_get_data(chip);
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int i;
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u32 conf0, val;
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for (i = 0; i < vg->soc_data->npins; i++) {
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for (i = 0; i < vg->soc->npins; i++) {
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const struct intel_community *comm;
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const char *pull_str = NULL;
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const char *pull = NULL;
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@ -1202,7 +1191,7 @@ static void byt_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
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unsigned int pin;
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raw_spin_lock_irqsave(&byt_lock, flags);
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pin = vg->soc_data->pins[i].number;
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pin = vg->soc->pins[i].number;
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reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG);
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if (!reg) {
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seq_printf(s,
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@ -1297,7 +1286,7 @@ static const struct gpio_chip byt_gpio_chip = {
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static void byt_irq_ack(struct irq_data *d)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct byt_gpio *vg = gpiochip_get_data(gc);
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struct intel_pinctrl *vg = gpiochip_get_data(gc);
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unsigned int offset = irqd_to_hwirq(d);
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void __iomem *reg;
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@ -1313,7 +1302,7 @@ static void byt_irq_ack(struct irq_data *d)
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static void byt_irq_mask(struct irq_data *d)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct byt_gpio *vg = gpiochip_get_data(gc);
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struct intel_pinctrl *vg = gpiochip_get_data(gc);
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byt_gpio_clear_triggering(vg, irqd_to_hwirq(d));
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}
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@ -1321,7 +1310,7 @@ static void byt_irq_mask(struct irq_data *d)
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static void byt_irq_unmask(struct irq_data *d)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct byt_gpio *vg = gpiochip_get_data(gc);
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struct intel_pinctrl *vg = gpiochip_get_data(gc);
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unsigned int offset = irqd_to_hwirq(d);
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unsigned long flags;
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void __iomem *reg;
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@ -1359,7 +1348,7 @@ static void byt_irq_unmask(struct irq_data *d)
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static int byt_irq_type(struct irq_data *d, unsigned int type)
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{
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struct byt_gpio *vg = gpiochip_get_data(irq_data_get_irq_chip_data(d));
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struct intel_pinctrl *vg = gpiochip_get_data(irq_data_get_irq_chip_data(d));
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u32 offset = irqd_to_hwirq(d);
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u32 value;
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unsigned long flags;
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@ -1398,8 +1387,7 @@ static int byt_irq_type(struct irq_data *d, unsigned int type)
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static void byt_gpio_irq_handler(struct irq_desc *desc)
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{
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struct irq_data *data = irq_desc_get_irq_data(desc);
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struct byt_gpio *vg = gpiochip_get_data(
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irq_desc_get_handler_data(desc));
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struct intel_pinctrl *vg = gpiochip_get_data(irq_desc_get_handler_data(desc));
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struct irq_chip *chip = irq_data_get_irq_chip(data);
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u32 base, pin;
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void __iomem *reg;
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@ -1432,7 +1420,7 @@ static void byt_init_irq_valid_mask(struct gpio_chip *chip,
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unsigned long *valid_mask,
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unsigned int ngpios)
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{
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struct byt_gpio *vg = gpiochip_get_data(chip);
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struct intel_pinctrl *vg = gpiochip_get_data(chip);
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void __iomem *reg;
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u32 value;
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int i;
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@ -1442,8 +1430,8 @@ static void byt_init_irq_valid_mask(struct gpio_chip *chip,
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* do not use direct IRQ mode. This will prevent spurious
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* interrupts from misconfigured pins.
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*/
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for (i = 0; i < vg->soc_data->npins; i++) {
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unsigned int pin = vg->soc_data->pins[i].number;
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for (i = 0; i < vg->soc->npins; i++) {
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unsigned int pin = vg->soc->pins[i].number;
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reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG);
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if (!reg) {
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@ -1466,12 +1454,12 @@ static void byt_init_irq_valid_mask(struct gpio_chip *chip,
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static int byt_gpio_irq_init_hw(struct gpio_chip *chip)
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{
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struct byt_gpio *vg = gpiochip_get_data(chip);
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struct intel_pinctrl *vg = gpiochip_get_data(chip);
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void __iomem *reg;
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u32 base, value;
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/* clear interrupt status trigger registers */
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for (base = 0; base < vg->soc_data->npins; base += 32) {
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for (base = 0; base < vg->soc->npins; base += 32) {
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reg = byt_gpio_reg(vg, base, BYT_INT_STAT_REG);
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if (!reg) {
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@ -1496,18 +1484,18 @@ static int byt_gpio_irq_init_hw(struct gpio_chip *chip)
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static int byt_gpio_add_pin_ranges(struct gpio_chip *chip)
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{
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struct byt_gpio *vg = gpiochip_get_data(chip);
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struct intel_pinctrl *vg = gpiochip_get_data(chip);
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struct device *dev = vg->dev;
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int ret;
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ret = gpiochip_add_pin_range(chip, dev_name(dev), 0, 0, vg->soc_data->npins);
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ret = gpiochip_add_pin_range(chip, dev_name(dev), 0, 0, vg->soc->npins);
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if (ret)
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dev_err(dev, "failed to add GPIO pin range\n");
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return ret;
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}
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static int byt_gpio_probe(struct byt_gpio *vg)
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static int byt_gpio_probe(struct intel_pinctrl *vg)
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{
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struct platform_device *pdev = to_platform_device(vg->dev);
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struct gpio_chip *gc;
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@ -1522,12 +1510,12 @@ static int byt_gpio_probe(struct byt_gpio *vg)
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gc->can_sleep = false;
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gc->add_pin_ranges = byt_gpio_add_pin_ranges;
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gc->parent = vg->dev;
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gc->ngpio = vg->soc_data->npins;
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gc->ngpio = vg->soc->npins;
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#ifdef CONFIG_PM_SLEEP
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vg->saved_context = devm_kcalloc(vg->dev, gc->ngpio,
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sizeof(*vg->saved_context), GFP_KERNEL);
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if (!vg->saved_context)
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vg->context.pads = devm_kcalloc(vg->dev, gc->ngpio, sizeof(*vg->context.pads),
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GFP_KERNEL);
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if (!vg->context.pads)
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return -ENOMEM;
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#endif
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@ -1567,24 +1555,24 @@ static int byt_gpio_probe(struct byt_gpio *vg)
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return ret;
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}
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static int byt_set_soc_data(struct byt_gpio *vg,
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const struct intel_pinctrl_soc_data *soc_data)
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static int byt_set_soc_data(struct intel_pinctrl *vg,
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const struct intel_pinctrl_soc_data *soc)
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{
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struct platform_device *pdev = to_platform_device(vg->dev);
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int i;
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vg->soc_data = soc_data;
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vg->communities_copy = devm_kcalloc(vg->dev,
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soc_data->ncommunities,
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sizeof(*vg->communities_copy),
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GFP_KERNEL);
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if (!vg->communities_copy)
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vg->soc = soc;
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vg->ncommunities = vg->soc->ncommunities;
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vg->communities = devm_kcalloc(vg->dev, vg->ncommunities,
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sizeof(*vg->communities), GFP_KERNEL);
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if (!vg->communities)
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return -ENOMEM;
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for (i = 0; i < soc_data->ncommunities; i++) {
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struct intel_community *comm = vg->communities_copy + i;
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for (i = 0; i < vg->soc->ncommunities; i++) {
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struct intel_community *comm = vg->communities + i;
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*comm = vg->soc_data->communities[i];
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*comm = vg->soc->communities[i];
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comm->pad_regs = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(comm->pad_regs))
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@ -1606,7 +1594,7 @@ static int byt_pinctrl_probe(struct platform_device *pdev)
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const struct intel_pinctrl_soc_data **soc_table;
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struct device *dev = &pdev->dev;
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struct acpi_device *acpi_dev;
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struct byt_gpio *vg;
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struct intel_pinctrl *vg;
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int i, ret;
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acpi_dev = ACPI_COMPANION(dev);
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@ -1636,15 +1624,15 @@ static int byt_pinctrl_probe(struct platform_device *pdev)
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return ret;
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}
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vg->pctl_desc = byt_pinctrl_desc;
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vg->pctl_desc.name = dev_name(dev);
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vg->pctl_desc.pins = vg->soc_data->pins;
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vg->pctl_desc.npins = vg->soc_data->npins;
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vg->pctldesc = byt_pinctrl_desc;
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vg->pctldesc.name = dev_name(dev);
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vg->pctldesc.pins = vg->soc->pins;
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vg->pctldesc.npins = vg->soc->npins;
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vg->pctl_dev = devm_pinctrl_register(dev, &vg->pctl_desc, vg);
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if (IS_ERR(vg->pctl_dev)) {
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vg->pctldev = devm_pinctrl_register(dev, &vg->pctldesc, vg);
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if (IS_ERR(vg->pctldev)) {
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dev_err(dev, "failed to register pinctrl driver\n");
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return PTR_ERR(vg->pctl_dev);
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return PTR_ERR(vg->pctldev);
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}
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ret = byt_gpio_probe(vg);
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@ -1660,16 +1648,16 @@ static int byt_pinctrl_probe(struct platform_device *pdev)
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#ifdef CONFIG_PM_SLEEP
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static int byt_gpio_suspend(struct device *dev)
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{
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struct byt_gpio *vg = dev_get_drvdata(dev);
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struct intel_pinctrl *vg = dev_get_drvdata(dev);
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unsigned long flags;
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int i;
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raw_spin_lock_irqsave(&byt_lock, flags);
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for (i = 0; i < vg->soc_data->npins; i++) {
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for (i = 0; i < vg->soc->npins; i++) {
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void __iomem *reg;
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u32 value;
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unsigned int pin = vg->soc_data->pins[i].number;
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unsigned int pin = vg->soc->pins[i].number;
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reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG);
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if (!reg) {
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@ -1679,11 +1667,11 @@ static int byt_gpio_suspend(struct device *dev)
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continue;
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}
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value = readl(reg) & BYT_CONF0_RESTORE_MASK;
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vg->saved_context[i].conf0 = value;
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vg->context.pads[i].conf0 = value;
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reg = byt_gpio_reg(vg, pin, BYT_VAL_REG);
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value = readl(reg) & BYT_VAL_RESTORE_MASK;
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vg->saved_context[i].val = value;
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vg->context.pads[i].val = value;
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}
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raw_spin_unlock_irqrestore(&byt_lock, flags);
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@ -1692,16 +1680,16 @@ static int byt_gpio_suspend(struct device *dev)
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static int byt_gpio_resume(struct device *dev)
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{
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struct byt_gpio *vg = dev_get_drvdata(dev);
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struct intel_pinctrl *vg = dev_get_drvdata(dev);
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unsigned long flags;
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int i;
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raw_spin_lock_irqsave(&byt_lock, flags);
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for (i = 0; i < vg->soc_data->npins; i++) {
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for (i = 0; i < vg->soc->npins; i++) {
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void __iomem *reg;
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u32 value;
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unsigned int pin = vg->soc_data->pins[i].number;
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unsigned int pin = vg->soc->pins[i].number;
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reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG);
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if (!reg) {
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@ -1712,9 +1700,9 @@ static int byt_gpio_resume(struct device *dev)
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}
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value = readl(reg);
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if ((value & BYT_CONF0_RESTORE_MASK) !=
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vg->saved_context[i].conf0) {
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vg->context.pads[i].conf0) {
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value &= ~BYT_CONF0_RESTORE_MASK;
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value |= vg->saved_context[i].conf0;
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value |= vg->context.pads[i].conf0;
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writel(value, reg);
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dev_info(dev, "restored pin %d conf0 %#08x", i, value);
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}
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@ -1722,11 +1710,11 @@ static int byt_gpio_resume(struct device *dev)
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reg = byt_gpio_reg(vg, pin, BYT_VAL_REG);
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value = readl(reg);
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if ((value & BYT_VAL_RESTORE_MASK) !=
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vg->saved_context[i].val) {
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vg->context.pads[i].val) {
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u32 v;
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v = value & ~BYT_VAL_RESTORE_MASK;
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v |= vg->saved_context[i].val;
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v |= vg->context.pads[i].val;
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if (v != value) {
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writel(v, reg);
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dev_dbg(dev, "restored pin %d val %#08x\n",
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