Merge branch 'mv88e6xxx-fixes-for-reading-serdes-state'
Russell King says: ==================== mv88e6xxx: fixes for reading serdes state These are some low-priority fixes to the mv88e6xxx serdes code. Patch 1 fixes the reporting of an_complete, which is used in the emulation of a conventional C22 PHY. Patch from Marek. Patch 2 makes one of the error messages in patch 2 to be consistent with the other error messages in this function. Patch 3 ensures that we do not miss a link-failure event. ==================== Link: https://lore.kernel.org/r/Yp82TyoLon9jz6k3@shell.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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5d4af9c1f0
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@ -50,22 +50,25 @@ static int mv88e6390_serdes_write(struct mv88e6xxx_chip *chip,
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}
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static int mv88e6xxx_serdes_pcs_get_state(struct mv88e6xxx_chip *chip,
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u16 ctrl, u16 status, u16 lpa,
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u16 bmsr, u16 lpa, u16 status,
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struct phylink_link_state *state)
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{
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state->link = false;
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/* If the BMSR reports that the link had failed, report this to
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* phylink.
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*/
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if (!(bmsr & BMSR_LSTATUS))
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return 0;
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state->link = !!(status & MV88E6390_SGMII_PHY_STATUS_LINK);
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state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
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if (status & MV88E6390_SGMII_PHY_STATUS_SPD_DPL_VALID) {
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/* The Spped and Duplex Resolved register is 1 if AN is enabled
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* and complete, or if AN is disabled. So with disabled AN we
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* still get here on link up. But we want to set an_complete
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* only if AN was enabled, thus we look at BMCR_ANENABLE.
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* (According to 802.3-2008 section 22.2.4.2.10, we should be
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* able to get this same value from BMSR_ANEGCAPABLE, but tests
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* show that these Marvell PHYs don't conform to this part of
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* the specificaion - BMSR_ANEGCAPABLE is simply always 1.)
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* still get here on link up.
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*/
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state->an_complete = !!(ctrl & BMCR_ANENABLE);
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state->duplex = status &
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MV88E6390_SGMII_PHY_STATUS_DUPLEX_FULL ?
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DUPLEX_FULL : DUPLEX_HALF;
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@ -191,12 +194,12 @@ int mv88e6352_serdes_pcs_config(struct mv88e6xxx_chip *chip, int port,
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int mv88e6352_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,
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int lane, struct phylink_link_state *state)
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{
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u16 lpa, status, ctrl;
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u16 bmsr, lpa, status;
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int err;
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err = mv88e6352_serdes_read(chip, MII_BMCR, &ctrl);
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err = mv88e6352_serdes_read(chip, MII_BMSR, &bmsr);
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if (err) {
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dev_err(chip->dev, "can't read Serdes PHY control: %d\n", err);
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dev_err(chip->dev, "can't read Serdes PHY BMSR: %d\n", err);
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return err;
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}
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@ -212,7 +215,7 @@ int mv88e6352_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,
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return err;
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}
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return mv88e6xxx_serdes_pcs_get_state(chip, ctrl, status, lpa, state);
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return mv88e6xxx_serdes_pcs_get_state(chip, bmsr, lpa, status, state);
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}
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int mv88e6352_serdes_pcs_an_restart(struct mv88e6xxx_chip *chip, int port,
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@ -918,13 +921,13 @@ int mv88e6390_serdes_pcs_config(struct mv88e6xxx_chip *chip, int port,
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static int mv88e6390_serdes_pcs_get_state_sgmii(struct mv88e6xxx_chip *chip,
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int port, int lane, struct phylink_link_state *state)
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{
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u16 lpa, status, ctrl;
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u16 bmsr, lpa, status;
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int err;
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err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
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MV88E6390_SGMII_BMCR, &ctrl);
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MV88E6390_SGMII_BMSR, &bmsr);
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if (err) {
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dev_err(chip->dev, "can't read Serdes PHY control: %d\n", err);
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dev_err(chip->dev, "can't read Serdes PHY BMSR: %d\n", err);
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return err;
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}
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@ -942,7 +945,7 @@ static int mv88e6390_serdes_pcs_get_state_sgmii(struct mv88e6xxx_chip *chip,
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return err;
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}
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return mv88e6xxx_serdes_pcs_get_state(chip, ctrl, status, lpa, state);
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return mv88e6xxx_serdes_pcs_get_state(chip, bmsr, lpa, status, state);
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}
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static int mv88e6390_serdes_pcs_get_state_10g(struct mv88e6xxx_chip *chip,
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