pwm: pwm-samsung: Trigger manual update when disabling PWM
When duty-cycle is at full level (100%), the TCNTn and TCMPn registers needs to be flushed in order to disable the signal. The PWM manual does not say anything about this, but states that only clearing the TCON auto-reload bit should be needed, and this seems to be true when the PWM duty-cycle is not at full level. This can be observed on an Axis ARTPEC-8, by running: echo <period> > pwm/period echo <period> > pwm/duty_cycle echo 1 > pwm/enable echo 0 > pwm/enable Since the TCNTn and TCMPn registers are activated when enabling the PWM (setting TCON auto-reload bit), and are not touched when disabling the PWM, the double buffered auto-reload function seems to be still active. Lowering duty-cycle, and restoring it again in between the enabling and disabling, makes the disable work since it triggers a reload of the TCNTn and TCMPn registers. Fix this by securing a reload of the TCNTn and TCMPn registers when disabling the PWM and having a full duty-cycle. Signed-off-by: Mårten Lindahl <marten.lindahl@axis.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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@ -117,6 +117,20 @@ static inline unsigned int to_tcon_channel(unsigned int channel)
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return (channel == 0) ? 0 : (channel + 1);
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return (channel == 0) ? 0 : (channel + 1);
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}
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}
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static void __pwm_samsung_manual_update(struct samsung_pwm_chip *chip,
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struct pwm_device *pwm)
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{
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unsigned int tcon_chan = to_tcon_channel(pwm->hwpwm);
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u32 tcon;
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tcon = readl(chip->base + REG_TCON);
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tcon |= TCON_MANUALUPDATE(tcon_chan);
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writel(tcon, chip->base + REG_TCON);
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tcon &= ~TCON_MANUALUPDATE(tcon_chan);
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writel(tcon, chip->base + REG_TCON);
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}
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static void pwm_samsung_set_divisor(struct samsung_pwm_chip *pwm,
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static void pwm_samsung_set_divisor(struct samsung_pwm_chip *pwm,
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unsigned int channel, u8 divisor)
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unsigned int channel, u8 divisor)
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{
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{
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@ -276,6 +290,13 @@ static void pwm_samsung_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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tcon &= ~TCON_AUTORELOAD(tcon_chan);
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tcon &= ~TCON_AUTORELOAD(tcon_chan);
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writel(tcon, our_chip->base + REG_TCON);
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writel(tcon, our_chip->base + REG_TCON);
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/*
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* In case the PWM is at 100% duty cycle, force a manual
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* update to prevent the signal from staying high.
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*/
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if (readl(our_chip->base + REG_TCMPB(pwm->hwpwm)) == (u32)-1U)
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__pwm_samsung_manual_update(our_chip, pwm);
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our_chip->disabled_mask |= BIT(pwm->hwpwm);
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our_chip->disabled_mask |= BIT(pwm->hwpwm);
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spin_unlock_irqrestore(&samsung_pwm_lock, flags);
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spin_unlock_irqrestore(&samsung_pwm_lock, flags);
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@ -284,18 +305,11 @@ static void pwm_samsung_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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static void pwm_samsung_manual_update(struct samsung_pwm_chip *chip,
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static void pwm_samsung_manual_update(struct samsung_pwm_chip *chip,
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struct pwm_device *pwm)
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struct pwm_device *pwm)
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{
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{
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unsigned int tcon_chan = to_tcon_channel(pwm->hwpwm);
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u32 tcon;
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&samsung_pwm_lock, flags);
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spin_lock_irqsave(&samsung_pwm_lock, flags);
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tcon = readl(chip->base + REG_TCON);
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__pwm_samsung_manual_update(chip, pwm);
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tcon |= TCON_MANUALUPDATE(tcon_chan);
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writel(tcon, chip->base + REG_TCON);
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tcon &= ~TCON_MANUALUPDATE(tcon_chan);
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writel(tcon, chip->base + REG_TCON);
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spin_unlock_irqrestore(&samsung_pwm_lock, flags);
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spin_unlock_irqrestore(&samsung_pwm_lock, flags);
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}
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}
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