Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: dmatest: fix use after free in dmatest_exit ipu_idmac: fix spinlock type iop-adma, mv_xor: fix mem leak on self-test setup failure fsldma: fix off by one in dma_halt I/OAT: fail self-test if callback test reaches timeout I/OAT: update driver version and copyright dates I/OAT: list usage cleanup I/OAT: set tcp_dma_copybreak to 256k for I/OAT ver.3 I/OAT: cancel watchdog before dma remove I/OAT: fail initialization on zero channels detection I/OAT: do not set DCACTRL_CMPL_WRITE_ENABLE for I/OAT ver.3 I/OAT: add verification for proper APICID_TAG_MAP setting by BIOS dmaengine: update kerneldoc
This commit is contained in:
Коммит
5dc18f51a2
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@ -1,5 +1,5 @@
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/*
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* Copyright(c) 2007 Intel Corporation. All rights reserved.
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* Copyright(c) 2007 - 2009 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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@ -430,13 +430,15 @@ late_initcall(dmatest_init);
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static void __exit dmatest_exit(void)
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{
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struct dmatest_chan *dtc, *_dtc;
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struct dma_chan *chan;
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list_for_each_entry_safe(dtc, _dtc, &dmatest_channels, node) {
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list_del(&dtc->node);
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chan = dtc->chan;
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dmatest_cleanup_channel(dtc);
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pr_debug("dmatest: dropped channel %s\n",
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dma_chan_name(dtc->chan));
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dma_release_channel(dtc->chan);
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dma_chan_name(chan));
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dma_release_channel(chan);
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}
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}
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module_exit(dmatest_exit);
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@ -158,7 +158,8 @@ static void dma_start(struct fsl_dma_chan *fsl_chan)
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static void dma_halt(struct fsl_dma_chan *fsl_chan)
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{
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int i = 0;
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int i;
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DMA_OUT(fsl_chan, &fsl_chan->reg_base->mr,
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DMA_IN(fsl_chan, &fsl_chan->reg_base->mr, 32) | FSL_DMA_MR_CA,
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32);
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@ -166,8 +167,11 @@ static void dma_halt(struct fsl_dma_chan *fsl_chan)
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DMA_IN(fsl_chan, &fsl_chan->reg_base->mr, 32) & ~(FSL_DMA_MR_CS
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| FSL_DMA_MR_EMS_EN | FSL_DMA_MR_CA), 32);
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while (!dma_is_idle(fsl_chan) && (i++ < 100))
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for (i = 0; i < 100; i++) {
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if (dma_is_idle(fsl_chan))
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break;
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udelay(10);
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}
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if (i >= 100 && !dma_is_idle(fsl_chan))
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dev_err(fsl_chan->dev, "DMA halt timeout!\n");
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}
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@ -1,6 +1,6 @@
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/*
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* Intel I/OAT DMA Linux driver
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* Copyright(c) 2007 Intel Corporation.
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* Copyright(c) 2007 - 2009 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -1,6 +1,6 @@
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/*
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* Intel I/OAT DMA Linux driver
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* Copyright(c) 2007 Intel Corporation.
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* Copyright(c) 2007 - 2009 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -49,6 +49,23 @@
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#define DCA_TAG_MAP_MASK 0xDF
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/* expected tag map bytes for I/OAT ver.2 */
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#define DCA2_TAG_MAP_BYTE0 0x80
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#define DCA2_TAG_MAP_BYTE1 0x0
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#define DCA2_TAG_MAP_BYTE2 0x81
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#define DCA2_TAG_MAP_BYTE3 0x82
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#define DCA2_TAG_MAP_BYTE4 0x82
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/* verify if tag map matches expected values */
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static inline int dca2_tag_map_valid(u8 *tag_map)
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{
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return ((tag_map[0] == DCA2_TAG_MAP_BYTE0) &&
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(tag_map[1] == DCA2_TAG_MAP_BYTE1) &&
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(tag_map[2] == DCA2_TAG_MAP_BYTE2) &&
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(tag_map[3] == DCA2_TAG_MAP_BYTE3) &&
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(tag_map[4] == DCA2_TAG_MAP_BYTE4));
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}
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/*
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* "Legacy" DCA systems do not implement the DCA register set in the
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* I/OAT device. Software needs direct support for their tag mappings.
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@ -452,6 +469,13 @@ struct dca_provider *ioat2_dca_init(struct pci_dev *pdev, void __iomem *iobase)
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ioatdca->tag_map[i] = 0;
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}
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if (!dca2_tag_map_valid(ioatdca->tag_map)) {
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dev_err(&pdev->dev, "APICID_TAG_MAP set incorrectly by BIOS, "
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"disabling DCA\n");
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free_dca_provider(dca);
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return NULL;
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}
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err = register_dca_provider(dca, &pdev->dev);
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if (err) {
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free_dca_provider(dca);
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@ -1,6 +1,6 @@
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/*
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* Intel I/OAT DMA Linux driver
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* Copyright(c) 2004 - 2007 Intel Corporation.
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* Copyright(c) 2004 - 2009 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -189,11 +189,13 @@ static int ioat_dma_enumerate_channels(struct ioatdma_device *device)
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ioat_chan->xfercap = xfercap;
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ioat_chan->desccount = 0;
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INIT_DELAYED_WORK(&ioat_chan->work, ioat_dma_chan_reset_part2);
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if (ioat_chan->device->version != IOAT_VER_1_2) {
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writel(IOAT_DCACTRL_CMPL_WRITE_ENABLE
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| IOAT_DMA_DCA_ANY_CPU,
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ioat_chan->reg_base + IOAT_DCACTRL_OFFSET);
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}
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if (ioat_chan->device->version == IOAT_VER_2_0)
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writel(IOAT_DCACTRL_CMPL_WRITE_ENABLE |
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IOAT_DMA_DCA_ANY_CPU,
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ioat_chan->reg_base + IOAT_DCACTRL_OFFSET);
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else if (ioat_chan->device->version == IOAT_VER_3_0)
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writel(IOAT_DMA_DCA_ANY_CPU,
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ioat_chan->reg_base + IOAT_DCACTRL_OFFSET);
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spin_lock_init(&ioat_chan->cleanup_lock);
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spin_lock_init(&ioat_chan->desc_lock);
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INIT_LIST_HEAD(&ioat_chan->free_desc);
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@ -1169,9 +1171,8 @@ static void ioat_dma_memcpy_cleanup(struct ioat_dma_chan *ioat_chan)
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* up if the client is done with the descriptor
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*/
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if (async_tx_test_ack(&desc->async_tx)) {
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list_del(&desc->node);
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list_add_tail(&desc->node,
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&ioat_chan->free_desc);
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list_move_tail(&desc->node,
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&ioat_chan->free_desc);
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} else
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desc->async_tx.cookie = 0;
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} else {
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@ -1362,6 +1363,7 @@ static int ioat_dma_self_test(struct ioatdma_device *device)
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dma_cookie_t cookie;
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int err = 0;
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struct completion cmp;
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unsigned long tmo;
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src = kzalloc(sizeof(u8) * IOAT_TEST_SIZE, GFP_KERNEL);
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if (!src)
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}
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device->common.device_issue_pending(dma_chan);
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wait_for_completion_timeout(&cmp, msecs_to_jiffies(3000));
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tmo = wait_for_completion_timeout(&cmp, msecs_to_jiffies(3000));
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if (device->common.device_is_tx_complete(dma_chan, cookie, NULL, NULL)
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if (tmo == 0 ||
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device->common.device_is_tx_complete(dma_chan, cookie, NULL, NULL)
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!= DMA_SUCCESS) {
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dev_err(&device->pdev->dev,
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"Self-test copy timed out, disabling\n");
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" %d channels, device version 0x%02x, driver version %s\n",
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device->common.chancnt, device->version, IOAT_DMA_VERSION);
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if (!device->common.chancnt) {
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dev_err(&device->pdev->dev,
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"Intel(R) I/OAT DMA Engine problem found: "
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"zero channels detected\n");
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goto err_setup_interrupts;
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}
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err = ioat_dma_setup_interrupts(device);
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if (err)
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goto err_setup_interrupts;
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@ -1696,6 +1706,9 @@ void ioat_dma_remove(struct ioatdma_device *device)
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struct dma_chan *chan, *_chan;
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struct ioat_dma_chan *ioat_chan;
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if (device->version != IOAT_VER_3_0)
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cancel_delayed_work(&device->work);
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ioat_dma_remove_interrupts(device);
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dma_async_device_unregister(&device->common);
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@ -1707,10 +1720,6 @@ void ioat_dma_remove(struct ioatdma_device *device)
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pci_release_regions(device->pdev);
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pci_disable_device(device->pdev);
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if (device->version != IOAT_VER_3_0) {
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cancel_delayed_work(&device->work);
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}
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list_for_each_entry_safe(chan, _chan,
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&device->common.channels, device_node) {
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ioat_chan = to_ioat_chan(chan);
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@ -1,5 +1,5 @@
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/*
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* Copyright(c) 2004 - 2007 Intel Corporation. All rights reserved.
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* Copyright(c) 2004 - 2009 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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@ -29,7 +29,7 @@
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#include <linux/pci_ids.h>
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#include <net/tcp.h>
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#define IOAT_DMA_VERSION "3.30"
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#define IOAT_DMA_VERSION "3.64"
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enum ioat_interrupt {
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none = 0,
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@ -135,12 +135,14 @@ static inline void ioat_set_tcp_copy_break(struct ioatdma_device *dev)
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#ifdef CONFIG_NET_DMA
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switch (dev->version) {
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case IOAT_VER_1_2:
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case IOAT_VER_3_0:
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sysctl_tcp_dma_copybreak = 4096;
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break;
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case IOAT_VER_2_0:
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sysctl_tcp_dma_copybreak = 2048;
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break;
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case IOAT_VER_3_0:
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sysctl_tcp_dma_copybreak = 262144;
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break;
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}
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#endif
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}
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|
|
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@ -1,5 +1,5 @@
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/*
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* Copyright(c) 2004 - 2007 Intel Corporation. All rights reserved.
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* Copyright(c) 2004 - 2009 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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|
|
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@ -1,5 +1,5 @@
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/*
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* Copyright(c) 2004 - 2007 Intel Corporation. All rights reserved.
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* Copyright(c) 2004 - 2009 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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|
|
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@ -928,19 +928,19 @@ iop_adma_xor_zero_sum_self_test(struct iop_adma_device *device)
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for (src_idx = 0; src_idx < IOP_ADMA_NUM_SRC_TEST; src_idx++) {
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xor_srcs[src_idx] = alloc_page(GFP_KERNEL);
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if (!xor_srcs[src_idx])
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while (src_idx--) {
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if (!xor_srcs[src_idx]) {
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while (src_idx--)
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__free_page(xor_srcs[src_idx]);
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return -ENOMEM;
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}
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return -ENOMEM;
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}
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}
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dest = alloc_page(GFP_KERNEL);
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if (!dest)
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while (src_idx--) {
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if (!dest) {
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while (src_idx--)
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__free_page(xor_srcs[src_idx]);
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return -ENOMEM;
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}
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return -ENOMEM;
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}
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/* Fill in src buffers */
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for (src_idx = 0; src_idx < IOP_ADMA_NUM_SRC_TEST; src_idx++) {
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|
|
|
@ -729,7 +729,7 @@ static int ipu_init_channel_buffer(struct idmac_channel *ichan,
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|
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ichan->status = IPU_CHANNEL_READY;
|
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|
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spin_unlock_irqrestore(ipu->lock, flags);
|
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spin_unlock_irqrestore(&ipu->lock, flags);
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|
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return 0;
|
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}
|
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|
|
|
@ -1019,19 +1019,19 @@ mv_xor_xor_self_test(struct mv_xor_device *device)
|
|||
|
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for (src_idx = 0; src_idx < MV_XOR_NUM_SRC_TEST; src_idx++) {
|
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xor_srcs[src_idx] = alloc_page(GFP_KERNEL);
|
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if (!xor_srcs[src_idx])
|
||||
while (src_idx--) {
|
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if (!xor_srcs[src_idx]) {
|
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while (src_idx--)
|
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__free_page(xor_srcs[src_idx]);
|
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return -ENOMEM;
|
||||
}
|
||||
return -ENOMEM;
|
||||
}
|
||||
}
|
||||
|
||||
dest = alloc_page(GFP_KERNEL);
|
||||
if (!dest)
|
||||
while (src_idx--) {
|
||||
if (!dest) {
|
||||
while (src_idx--)
|
||||
__free_page(xor_srcs[src_idx]);
|
||||
return -ENOMEM;
|
||||
}
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/* Fill in src buffers */
|
||||
for (src_idx = 0; src_idx < MV_XOR_NUM_SRC_TEST; src_idx++) {
|
||||
|
|
|
@ -97,7 +97,6 @@ typedef struct { DECLARE_BITMAP(bits, DMA_TX_TYPE_END); } dma_cap_mask_t;
|
|||
|
||||
/**
|
||||
* struct dma_chan_percpu - the per-CPU part of struct dma_chan
|
||||
* @refcount: local_t used for open-coded "bigref" counting
|
||||
* @memcpy_count: transaction counter
|
||||
* @bytes_transferred: byte counter
|
||||
*/
|
||||
|
@ -114,9 +113,6 @@ struct dma_chan_percpu {
|
|||
* @cookie: last cookie value returned to client
|
||||
* @chan_id: channel ID for sysfs
|
||||
* @dev: class device for sysfs
|
||||
* @refcount: kref, used in "bigref" slow-mode
|
||||
* @slow_ref: indicates that the DMA channel is free
|
||||
* @rcu: the DMA channel's RCU head
|
||||
* @device_node: used to add this to the device chan list
|
||||
* @local: per-cpu pointer to a struct dma_chan_percpu
|
||||
* @client-count: how many clients are using this channel
|
||||
|
@ -213,8 +209,6 @@ struct dma_async_tx_descriptor {
|
|||
* @global_node: list_head for global dma_device_list
|
||||
* @cap_mask: one or more dma_capability flags
|
||||
* @max_xor: maximum number of xor sources, 0 if no capability
|
||||
* @refcount: reference count
|
||||
* @done: IO completion struct
|
||||
* @dev_id: unique device ID
|
||||
* @dev: struct device reference for dma mapping api
|
||||
* @device_alloc_chan_resources: allocate resources and return the
|
||||
|
@ -227,6 +221,7 @@ struct dma_async_tx_descriptor {
|
|||
* @device_prep_dma_interrupt: prepares an end of chain interrupt operation
|
||||
* @device_prep_slave_sg: prepares a slave dma operation
|
||||
* @device_terminate_all: terminate all pending operations
|
||||
* @device_is_tx_complete: poll for transaction completion
|
||||
* @device_issue_pending: push pending transactions to hardware
|
||||
*/
|
||||
struct dma_device {
|
||||
|
|
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