ARM: LPC32xx: clock.c cleanup
This patch makes use of the default macro CLKDEV_INIT() for clock registration. Signed-off-by: Roland Stigge <stigge@antcom.de>
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4de02e4a28
Коммит
5dfdb0a063
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@ -1095,49 +1095,42 @@ struct clk *clk_get_parent(struct clk *clk)
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}
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EXPORT_SYMBOL(clk_get_parent);
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#define _REGISTER_CLOCK(d, n, c) \
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{ \
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.dev_id = (d), \
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.con_id = (n), \
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.clk = &(c), \
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},
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static struct clk_lookup lookups[] = {
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_REGISTER_CLOCK(NULL, "osc_32KHz", osc_32KHz)
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_REGISTER_CLOCK(NULL, "osc_pll397", osc_pll397)
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_REGISTER_CLOCK(NULL, "osc_main", osc_main)
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_REGISTER_CLOCK(NULL, "sys_ck", clk_sys)
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_REGISTER_CLOCK(NULL, "arm_pll_ck", clk_armpll)
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_REGISTER_CLOCK(NULL, "ck_pll5", clk_usbpll)
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_REGISTER_CLOCK(NULL, "hclk_ck", clk_hclk)
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_REGISTER_CLOCK(NULL, "pclk_ck", clk_pclk)
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_REGISTER_CLOCK(NULL, "timer0_ck", clk_timer0)
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_REGISTER_CLOCK(NULL, "timer1_ck", clk_timer1)
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_REGISTER_CLOCK(NULL, "timer2_ck", clk_timer2)
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_REGISTER_CLOCK(NULL, "timer3_ck", clk_timer3)
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_REGISTER_CLOCK(NULL, "vfp9_ck", clk_vfp9)
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_REGISTER_CLOCK(NULL, "clk_dmac", clk_dma)
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_REGISTER_CLOCK("pnx4008-watchdog", NULL, clk_wdt)
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_REGISTER_CLOCK(NULL, "uart3_ck", clk_uart3)
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_REGISTER_CLOCK(NULL, "uart4_ck", clk_uart4)
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_REGISTER_CLOCK(NULL, "uart5_ck", clk_uart5)
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_REGISTER_CLOCK(NULL, "uart6_ck", clk_uart6)
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_REGISTER_CLOCK("pnx-i2c.0", NULL, clk_i2c0)
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_REGISTER_CLOCK("pnx-i2c.1", NULL, clk_i2c1)
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_REGISTER_CLOCK("pnx-i2c.2", NULL, clk_i2c2)
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_REGISTER_CLOCK("dev:ssp0", NULL, clk_ssp0)
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_REGISTER_CLOCK("dev:ssp1", NULL, clk_ssp1)
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_REGISTER_CLOCK("lpc32xx_keys.0", NULL, clk_kscan)
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_REGISTER_CLOCK("lpc32xx-nand.0", "nand_ck", clk_nand)
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_REGISTER_CLOCK("lpc32xx-adc", NULL, clk_adc)
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_REGISTER_CLOCK(NULL, "i2s0_ck", clk_i2s0)
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_REGISTER_CLOCK(NULL, "i2s1_ck", clk_i2s1)
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_REGISTER_CLOCK("ts-lpc32xx", NULL, clk_tsc)
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_REGISTER_CLOCK("dev:mmc0", NULL, clk_mmc)
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_REGISTER_CLOCK("lpc-eth.0", NULL, clk_net)
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_REGISTER_CLOCK("dev:clcd", NULL, clk_lcd)
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_REGISTER_CLOCK("lpc32xx_udc", "ck_usbd", clk_usbd)
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_REGISTER_CLOCK("lpc32xx_rtc", NULL, clk_rtc)
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CLKDEV_INIT(NULL, "osc_32KHz", &osc_32KHz),
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CLKDEV_INIT(NULL, "osc_pll397", &osc_pll397),
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CLKDEV_INIT(NULL, "osc_main", &osc_main),
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CLKDEV_INIT(NULL, "sys_ck", &clk_sys),
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CLKDEV_INIT(NULL, "arm_pll_ck", &clk_armpll),
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CLKDEV_INIT(NULL, "ck_pll5", &clk_usbpll),
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CLKDEV_INIT(NULL, "hclk_ck", &clk_hclk),
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CLKDEV_INIT(NULL, "pclk_ck", &clk_pclk),
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CLKDEV_INIT(NULL, "timer0_ck", &clk_timer0),
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CLKDEV_INIT(NULL, "timer1_ck", &clk_timer1),
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CLKDEV_INIT(NULL, "timer2_ck", &clk_timer2),
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CLKDEV_INIT(NULL, "timer3_ck", &clk_timer3),
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CLKDEV_INIT(NULL, "vfp9_ck", &clk_vfp9),
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CLKDEV_INIT(NULL, "clk_dmac", &clk_dma),
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CLKDEV_INIT("pnx4008-watchdog", NULL, &clk_wdt),
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CLKDEV_INIT(NULL, "uart3_ck", &clk_uart3),
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CLKDEV_INIT(NULL, "uart4_ck", &clk_uart4),
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CLKDEV_INIT(NULL, "uart5_ck", &clk_uart5),
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CLKDEV_INIT(NULL, "uart6_ck", &clk_uart6),
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CLKDEV_INIT("pnx-i2c.0", NULL, &clk_i2c0),
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CLKDEV_INIT("pnx-i2c.1", NULL, &clk_i2c1),
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CLKDEV_INIT("pnx-i2c.2", NULL, &clk_i2c2),
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CLKDEV_INIT("dev:ssp0", NULL, &clk_ssp0),
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CLKDEV_INIT("dev:ssp1", NULL, &clk_ssp1),
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CLKDEV_INIT("lpc32xx_keys.0", NULL, &clk_kscan),
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CLKDEV_INIT("lpc32xx-nand.0", "nand_ck", &clk_nand),
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CLKDEV_INIT("lpc32xx-adc", NULL, &clk_adc),
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CLKDEV_INIT(NULL, "i2s0_ck", &clk_i2s0),
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CLKDEV_INIT(NULL, "i2s1_ck", &clk_i2s1),
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CLKDEV_INIT("ts-lpc32xx", NULL, &clk_tsc),
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CLKDEV_INIT("dev:mmc0", NULL, &clk_mmc),
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CLKDEV_INIT("lpc-eth.0", NULL, &clk_net),
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CLKDEV_INIT("dev:clcd", NULL, &clk_lcd),
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CLKDEV_INIT("lpc32xx_udc", "ck_usbd", &clk_usbd),
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CLKDEV_INIT("lpc32xx_rtc", NULL, &clk_rtc),
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};
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static int __init clk_init(void)
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