MIPS: SEAD3: Use img-ascii-lcd driver
Probe the img-ascii-lcd driver using device tree in order to display a message on the SEAD3 board's LCD display, and remove the platform code that was formerly performing this function. This removes more platform code and moves SEAD3 further towards being entirely DT-based. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Jacek Anaszewski <j.anaszewski@samsung.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/14063/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Коммит
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@ -210,6 +210,11 @@
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mask = <0x80>;
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label = "fled7";
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};
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lcd@200 {
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compatible = "mti,sead3-lcd";
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offset = <0x200>;
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};
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};
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/* UART connected to FTDI & miniUSB socket */
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@ -8,8 +8,7 @@
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# Copyright (C) 2012 MIPS Technoligies, Inc. All rights reserved.
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# Steven J. Hill <sjhill@mips.com>
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#
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obj-y := sead3-display.o
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obj-y += sead3-dtshim.o
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obj-y := sead3-dtshim.o
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obj-y += sead3-init.o
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obj-y += sead3-int.o
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obj-y += sead3-setup.o
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@ -1,77 +0,0 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
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*/
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#include <linux/timer.h>
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#include <linux/io.h>
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#include <asm/mips-boards/generic.h>
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static unsigned int display_count;
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static unsigned int max_display_count;
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#define LCD_DISPLAY_POS_BASE 0x1f000400
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#define DISPLAY_LCDINSTRUCTION (0*2)
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#define DISPLAY_LCDDATA (1*2)
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#define DISPLAY_CPLDSTATUS (2*2)
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#define DISPLAY_CPLDDATA (3*2)
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#define LCD_SETDDRAM 0x80
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#define LCD_IR_BF 0x80
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const char display_string[] = " LINUX ON SEAD3 ";
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static void scroll_display_message(unsigned long data);
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static DEFINE_TIMER(mips_scroll_timer, scroll_display_message, HZ, 0);
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static void lcd_wait(unsigned int __iomem *display)
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{
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/* Wait for CPLD state machine to become idle. */
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do { } while (__raw_readl(display + DISPLAY_CPLDSTATUS) & 1);
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do {
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__raw_readl(display + DISPLAY_LCDINSTRUCTION);
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/* Wait for CPLD state machine to become idle. */
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do { } while (__raw_readl(display + DISPLAY_CPLDSTATUS) & 1);
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} while (__raw_readl(display + DISPLAY_CPLDDATA) & LCD_IR_BF);
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}
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void mips_display_message(const char *str)
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{
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static unsigned int __iomem *display;
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char ch;
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int i;
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if (unlikely(display == NULL))
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display = ioremap_nocache(LCD_DISPLAY_POS_BASE,
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(8 * sizeof(int)));
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for (i = 0; i < 16; i++) {
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if (*str)
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ch = *str++;
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else
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ch = ' ';
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lcd_wait(display);
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__raw_writel((LCD_SETDDRAM | i),
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(display + DISPLAY_LCDINSTRUCTION));
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lcd_wait(display);
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__raw_writel(ch, display + DISPLAY_LCDDATA);
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}
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}
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static void scroll_display_message(unsigned long data)
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{
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mips_display_message(&display_string[display_count++]);
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if (display_count == max_display_count)
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display_count = 0;
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mod_timer(&mips_scroll_timer, jiffies + HZ);
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}
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void mips_scroll_message(void)
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{
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del_timer_sync(&mips_scroll_timer);
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max_display_count = strlen(display_string) + 1 - 16;
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mod_timer(&mips_scroll_timer, jiffies + 1);
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}
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@ -94,6 +94,4 @@ void __init plat_time_init(void)
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pr_debug("CPU frequency %d.%02d MHz\n", (est_freq / 1000000),
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(est_freq % 1000000) * 100 / 1000000);
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mips_scroll_message();
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}
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