tg3: Prevent corruption at 10 / 100Mbps w CLKREQ
This patch disables CLKREQ at 10Mbps and 100Mbps to workaround a TX BD corruption issue. This problem only affects the 5784 and 5761 (and 57780 AX) ASIC revisions. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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52f4490c3b
Коммит
5e7dfd0fb9
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@ -2154,6 +2154,20 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
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tp->dev->name, state);
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return -EINVAL;
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}
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/* Restore the CLKREQ setting. */
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if (tp->tg3_flags3 & TG3_FLG3_CLKREQ_BUG) {
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u16 lnkctl;
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pci_read_config_word(tp->pdev,
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tp->pcie_cap + PCI_EXP_LNKCTL,
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&lnkctl);
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lnkctl |= PCI_EXP_LNKCTL_CLKREQ_EN;
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pci_write_config_word(tp->pdev,
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tp->pcie_cap + PCI_EXP_LNKCTL,
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lnkctl);
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}
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misc_host_ctrl = tr32(TG3PCI_MISC_HOST_CTRL);
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tw32(TG3PCI_MISC_HOST_CTRL,
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misc_host_ctrl | MISC_HOST_CTRL_MASK_PCI_INT);
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@ -2923,6 +2937,24 @@ relink:
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NIC_SRAM_FIRMWARE_MBOX_MAGIC2);
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}
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/* Prevent send BD corruption. */
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if (tp->tg3_flags3 & TG3_FLG3_CLKREQ_BUG) {
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u16 oldlnkctl, newlnkctl;
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pci_read_config_word(tp->pdev,
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tp->pcie_cap + PCI_EXP_LNKCTL,
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&oldlnkctl);
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if (tp->link_config.active_speed == SPEED_100 ||
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tp->link_config.active_speed == SPEED_10)
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newlnkctl = oldlnkctl & ~PCI_EXP_LNKCTL_CLKREQ_EN;
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else
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newlnkctl = oldlnkctl | PCI_EXP_LNKCTL_CLKREQ_EN;
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if (newlnkctl != oldlnkctl)
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pci_write_config_word(tp->pdev,
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tp->pcie_cap + PCI_EXP_LNKCTL,
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newlnkctl);
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}
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if (current_link_up != netif_carrier_ok(tp->dev)) {
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if (current_link_up)
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netif_carrier_on(tp->dev);
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@ -6016,7 +6048,7 @@ static int tg3_chip_reset(struct tg3 *tp)
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udelay(120);
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if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) {
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if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) && tp->pcie_cap) {
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if (tp->pci_chip_rev_id == CHIPREV_ID_5750_A0) {
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int i;
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u32 cfg_val;
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@ -6029,9 +6061,23 @@ static int tg3_chip_reset(struct tg3 *tp)
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pci_write_config_dword(tp->pdev, 0xc4,
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cfg_val | (1 << 15));
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}
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if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785)
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/* Set PCIE max payload size and clear error status. */
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pci_write_config_dword(tp->pdev, 0xd8, 0xf5000);
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/* Set PCIE max payload size to 128 bytes and
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* clear the "no snoop" and "relaxed ordering" bits.
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*/
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pci_write_config_word(tp->pdev,
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tp->pcie_cap + PCI_EXP_DEVCTL,
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0);
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pcie_set_readrq(tp->pdev, 4096);
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/* Clear error status */
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pci_write_config_word(tp->pdev,
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tp->pcie_cap + PCI_EXP_DEVSTA,
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PCI_EXP_DEVSTA_CED |
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PCI_EXP_DEVSTA_NFED |
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PCI_EXP_DEVSTA_FED |
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PCI_EXP_DEVSTA_URD);
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}
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tg3_restore_pci_state(tp);
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@ -11967,7 +12013,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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u32 pci_state_reg, grc_misc_cfg;
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u32 val;
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u16 pci_cmd;
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int err, pcie_cap;
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int err;
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/* Force memory write invalidate off. If we leave it on,
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* then on 5700_BX chips we have to enable a workaround.
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@ -12193,20 +12239,23 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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pci_read_config_dword(tp->pdev, TG3PCI_PCISTATE,
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&pci_state_reg);
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pcie_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_EXP);
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if (pcie_cap != 0) {
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tp->pcie_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_EXP);
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if (tp->pcie_cap != 0) {
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u16 lnkctl;
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tp->tg3_flags2 |= TG3_FLG2_PCI_EXPRESS;
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pcie_set_readrq(tp->pdev, 4096);
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
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u16 lnkctl;
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pci_read_config_word(tp->pdev,
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pcie_cap + PCI_EXP_LNKCTL,
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&lnkctl);
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if (lnkctl & PCI_EXP_LNKCTL_CLKREQ_EN)
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pci_read_config_word(tp->pdev,
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tp->pcie_cap + PCI_EXP_LNKCTL,
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&lnkctl);
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if (lnkctl & PCI_EXP_LNKCTL_CLKREQ_EN) {
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
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tp->tg3_flags2 &= ~TG3_FLG2_HW_TSO_2;
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761)
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tp->tg3_flags3 |= TG3_FLG3_CLKREQ_BUG;
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}
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} else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785) {
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tp->tg3_flags2 |= TG3_FLG2_PCI_EXPRESS;
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@ -2618,6 +2618,7 @@ struct tg3 {
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#define TG3_FLG3_RGMII_STD_IBND_DISABLE 0x00000100
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#define TG3_FLG3_RGMII_EXT_IBND_RX_EN 0x00000200
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#define TG3_FLG3_RGMII_EXT_IBND_TX_EN 0x00000400
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#define TG3_FLG3_CLKREQ_BUG 0x00000800
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struct timer_list timer;
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u16 timer_counter;
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@ -2656,7 +2657,10 @@ struct tg3 {
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int pm_cap;
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int msi_cap;
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union {
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int pcix_cap;
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int pcie_cap;
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};
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struct mii_bus *mdio_bus;
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int mdio_irq[PHY_MAX_ADDR];
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