dt-bindings: remoteproc: qcom: Convert SC7180 MSS bindings to YAML
Add a separate YAML binding to act as a superset of the PAS and non-PAS compatible for SC7180 MSS PIL. This also serves as a way to increase readability. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1657020721-24939-3-git-send-email-quic_sibis@quicinc.com
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@ -14,7 +14,6 @@ on the Qualcomm Hexagon core.
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"qcom,msm8974-mss-pil"
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"qcom,msm8996-mss-pil"
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"qcom,msm8998-mss-pil"
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"qcom,sc7180-mss-pil"
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"qcom,sdm845-mss-pil"
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- reg:
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@ -46,7 +45,6 @@ on the Qualcomm Hexagon core.
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must be "wdog", "fatal", "ready", "handover", "stop-ack"
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qcom,msm8996-mss-pil:
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qcom,msm8998-mss-pil:
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qcom,sc7180-mss-pil:
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qcom,sdm845-mss-pil:
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must be "wdog", "fatal", "ready", "handover", "stop-ack",
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"shutdown-ack"
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@ -84,9 +82,6 @@ on the Qualcomm Hexagon core.
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qcom,msm8998-mss-pil:
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must be "iface", "bus", "mem", "xo", "gpll0_mss",
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"snoc_axi", "mnoc_axi", "qdss"
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qcom,sc7180-mss-pil:
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must be "iface", "bus", "xo", "snoc_axi", "mnoc_axi",
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"nav"
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qcom,sdm845-mss-pil:
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must be "iface", "bus", "mem", "xo", "gpll0_mss",
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"snoc_axi", "mnoc_axi", "prng"
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@ -98,7 +93,7 @@ on the Qualcomm Hexagon core.
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reference to the list of 3 reset-controllers for the
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wcss sub-system
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reference to the list of 2 reset-controllers for the modem
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sub-system on SC7180, SDM845 SoCs
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sub-system on SDM845 SoCs
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- reset-names:
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Usage: required
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@ -107,7 +102,7 @@ on the Qualcomm Hexagon core.
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must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset"
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for the wcss sub-system
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must be "mss_restart", "pdc_reset" for the modem
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sub-system on SC7180, SDM845 SoCs
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sub-system on SDM845 SoCs
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For devices where the mba and mpss sub-nodes are not specified, mba/mpss region
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should be referenced as follows:
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@ -172,8 +167,6 @@ For the compatible string below the following supplies are required:
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qcom,msm8996-mss-pil:
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qcom,msm8998-mss-pil:
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must be "cx", "mx"
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qcom,sc7180-mss-pil:
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must be "cx", "mx", "mss"
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qcom,sdm845-mss-pil:
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must be "cx", "mx", "mss"
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@ -200,15 +193,6 @@ For the compatible string below the following supplies are required:
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by the three offsets within syscon for q6, modem and nc
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halt registers.
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For the compatible strings below the following phandle references are required:
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"qcom,sc7180-mss-pil"
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- qcom,spare-regs:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: a phandle reference to a syscon representing TCSR followed
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by the offset within syscon for conn_box_spare0 register
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used by the modem sub-system running on SC7180 SoC.
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The Hexagon node must contain iommus property as described in ../iommu/iommu.txt
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on platforms which do not have TrustZone.
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@ -0,0 +1,245 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/remoteproc/qcom,sc7180-mss-pil.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm SC7180 MSS Peripheral Image Loader
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maintainers:
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- Sibi Sankar <quic_sibis@quicinc.com>
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description:
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This document describes the hardware for a component that loads and boots firmware
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on the Qualcomm Technology Inc. SC7180 Modem Hexagon Core.
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properties:
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compatible:
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enum:
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- qcom,sc7180-mss-pil
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reg:
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items:
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- description: MSS QDSP6 registers
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- description: RMB registers
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reg-names:
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items:
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- const: qdsp6
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- const: rmb
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iommus:
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items:
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- description: MSA Stream 1
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- description: MSA Stream 2
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interrupts:
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items:
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- description: Watchdog interrupt
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- description: Fatal interrupt
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- description: Ready interrupt
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- description: Handover interrupt
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- description: Stop acknowledge interrupt
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- description: Shutdown acknowledge interrupt
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interrupt-names:
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items:
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- const: wdog
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- const: fatal
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- const: ready
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- const: handover
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- const: stop-ack
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- const: shutdown-ack
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clocks:
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items:
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- description: GCC MSS IFACE clock
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- description: GCC MSS BUS clock
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- description: GCC MSS NAV clock
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- description: GCC MSS SNOC_AXI clock
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- description: GCC MSS MFAB_AXIS clock
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- description: RPMH XO clock
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clock-names:
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items:
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- const: iface
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- const: bus
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- const: nav
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- const: snoc_axi
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- const: mnoc_axi
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- const: xo
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power-domains:
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items:
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- description: CX power domain
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- description: MX power domain
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- description: MSS power domain
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power-domain-names:
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items:
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- const: cx
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- const: mx
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- const: mss
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resets:
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items:
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- description: AOSS restart
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- description: PDC reset
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reset-names:
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items:
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- const: mss_restart
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- const: pdc_reset
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memory-region:
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items:
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- description: MBA reserved region
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- description: modem reserved region
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firmware-name:
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$ref: /schemas/types.yaml#/definitions/string-array
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items:
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- description: Name of MBA firmware
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- description: Name of modem firmware
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qcom,halt-regs:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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description:
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Halt registers are used to halt transactions of various sub-components
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within MSS.
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items:
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- items:
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- description: phandle to TCSR_MUTEX registers
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- description: offset to the Q6 halt register
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- description: offset to the modem halt register
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- description: offset to the nc halt register
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qcom,spare-regs:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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description:
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Spare registers are multipurpose registers used for errata
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handling.
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items:
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- items:
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- description: phandle to TCSR_MUTEX registers
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- description: offset to the conn_box_spare0 register
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qcom,qmp:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: Reference to the AOSS side-channel message RAM.
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qcom,smem-states:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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description: States used by the AP to signal the Hexagon core
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items:
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- description: Stop the modem
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qcom,smem-state-names:
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description: The names of the state bits used for SMP2P output
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const: stop
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glink-edge:
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$ref: qcom,glink-edge.yaml#
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description:
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Qualcomm G-Link subnode which represents communication edge, channels
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and devices related to the DSP.
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properties:
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interrupts:
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items:
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- description: IRQ from MSS to GLINK
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mboxes:
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items:
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- description: Mailbox for communication between APPS and MSS
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label:
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const: modem
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apr: false
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fastrpc: false
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required:
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- compatible
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- reg
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- reg-names
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- iommus
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- interrupts
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- interrupt-names
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- clocks
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- clock-names
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- power-domains
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- power-domain-names
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- resets
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- reset-names
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- qcom,halt-regs
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- qcom,spare-regs
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- memory-region
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- qcom,qmp
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- qcom,smem-states
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- qcom,smem-state-names
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- glink-edge
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-sc7180.h>
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/qcom-rpmpd.h>
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#include <dt-bindings/reset/qcom,sdm845-aoss.h>
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#include <dt-bindings/reset/qcom,sdm845-pdc.h>
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remoteproc_mpss: remoteproc@4080000 {
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compatible = "qcom,sc7180-mss-pil";
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reg = <0x04080000 0x10000>, <0x04180000 0x48>;
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reg-names = "qdsp6", "rmb";
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iommus = <&apps_smmu 0x461 0x0>, <&apps_smmu 0x444 0x3>;
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interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "wdog", "fatal", "ready", "handover",
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"stop-ack", "shutdown-ack";
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clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
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<&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
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<&gcc GCC_MSS_NAV_AXI_CLK>,
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<&gcc GCC_MSS_SNOC_AXI_CLK>,
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<&gcc GCC_MSS_MFAB_AXIS_CLK>,
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<&rpmhcc RPMH_CXO_CLK>;
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clock-names = "iface", "bus", "nav", "snoc_axi",
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"mnoc_axi", "xo";
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power-domains = <&rpmhpd SC7180_CX>,
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<&rpmhpd SC7180_MX>,
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<&rpmhpd SC7180_MSS>;
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power-domain-names = "cx", "mx", "mss";
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memory-region = <&mba_mem>, <&mpss_mem>;
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qcom,qmp = <&aoss_qmp>;
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qcom,smem-states = <&modem_smp2p_out 0>;
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qcom,smem-state-names = "stop";
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resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
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<&pdc_reset PDC_MODEM_SYNC_RESET>;
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reset-names = "mss_restart", "pdc_reset";
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qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>;
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qcom,spare-regs = <&tcsr_regs 0xb3e4>;
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glink-edge {
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interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;
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mboxes = <&apss_shared 12>;
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qcom,remote-pid = <1>;
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label = "modem";
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};
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};
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