ASoC: Fixes for v5.10
A small set of driver specific fixes, plus a new platform quirk from Hans. -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAl/A98YACgkQJNaLcl1U h9ClFggAgPr2/KIB3kRZCaKXaNgQ7oqgPdf0NNMYmwAnLaRK+t1EL0GdiyP5AxDA sU9RWjoXyCmoe+dqmlS7Iavcj2Ne+y7w2isonrreI26LFrAkO8jL2mo656NArMjx cxIhjF7sNWVbel2MYhrRSta8LkqrI8FiSV8elGW5DttGyceYHuoNXjo4AN3emnk3 V5kx9uT/kC1ef7SseLeN868VAMM5n42bZV+Eide/DJwYivlX7Hcwaqmax7FPjuYe J/n3VrNh+AjABvpzPXBD+6e7X8aiYtQWAAtBz2FZLoL+4bREiG4qWP2kW4nwnisS Bl0W0rE2LvctIKqkAey4/JUwwWCkXg== =39QE -----END PGP SIGNATURE----- Merge tag 'asoc-fix-v5.10-rc5' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus ASoC: Fixes for v5.10 A small set of driver specific fixes, plus a new platform quirk from Hans.
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5ef5bee02f
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@ -43,6 +43,7 @@ static const struct reg_sequence patch_list[] = {
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{RT5682_DAC_ADC_DIG_VOL1, 0xa020},
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{RT5682_I2C_CTRL, 0x000f},
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{RT5682_PLL2_INTERNAL, 0x8266},
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{RT5682_SAR_IL_CMD_3, 0x8365},
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};
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void rt5682_apply_patch_list(struct rt5682_priv *rt5682, struct device *dev)
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@ -1937,6 +1937,7 @@ static int wm_adsp_load(struct wm_adsp *dsp)
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mem = wm_adsp_find_region(dsp, type);
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if (!mem) {
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adsp_err(dsp, "No region of type: %x\n", type);
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ret = -EINVAL;
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goto out_fw;
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}
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@ -520,10 +520,10 @@ static const struct dmi_system_id byt_rt5640_quirk_table[] = {
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.driver_data = (void *)(BYT_RT5640_IN1_MAP |
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BYT_RT5640_MCLK_EN),
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},
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{ /* HP Pavilion x2 10-n000nd */
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{ /* HP Pavilion x2 10-k0XX, 10-n0XX */
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.matches = {
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DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
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DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "HP Pavilion x2 Detachable"),
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DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
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DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion x2 Detachable"),
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},
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.driver_data = (void *)(BYT_RT5640_DMIC1_MAP |
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BYT_RT5640_JD_SRC_JD2_IN4N |
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@ -532,6 +532,17 @@ static const struct dmi_system_id byt_rt5640_quirk_table[] = {
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BYT_RT5640_SSP0_AIF1 |
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BYT_RT5640_MCLK_EN),
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},
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{ /* HP Pavilion x2 10-p0XX */
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "HP"),
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DMI_MATCH(DMI_PRODUCT_NAME, "HP x2 Detachable 10-p0XX"),
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},
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.driver_data = (void *)(BYT_RT5640_DMIC1_MAP |
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BYT_RT5640_JD_SRC_JD1_IN4P |
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BYT_RT5640_OVCD_TH_1500UA |
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BYT_RT5640_OVCD_SF_0P75 |
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BYT_RT5640_MCLK_EN),
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},
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{ /* HP Stream 7 */
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.matches = {
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DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
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@ -263,28 +263,6 @@ static int lpass_cpu_daiops_hw_params(struct snd_pcm_substream *substream,
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return 0;
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}
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static int lpass_cpu_daiops_prepare(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
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struct lpaif_i2sctl *i2sctl = drvdata->i2sctl;
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unsigned int id = dai->driver->id;
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int ret;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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ret = regmap_fields_write(i2sctl->spken, id,
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LPAIF_I2SCTL_SPKEN_ENABLE);
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} else {
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ret = regmap_fields_write(i2sctl->micen, id,
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LPAIF_I2SCTL_MICEN_ENABLE);
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}
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if (ret)
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dev_err(dai->dev, "error writing to i2sctl enable: %d\n", ret);
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return ret;
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}
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static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream,
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int cmd, struct snd_soc_dai *dai)
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{
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@ -292,6 +270,18 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream,
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struct lpaif_i2sctl *i2sctl = drvdata->i2sctl;
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unsigned int id = dai->driver->id;
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int ret = -EINVAL;
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unsigned int val = 0;
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ret = regmap_read(drvdata->lpaif_map,
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LPAIF_I2SCTL_REG(drvdata->variant, dai->driver->id), &val);
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if (ret) {
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dev_err(dai->dev, "error reading from i2sctl reg: %d\n", ret);
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return ret;
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}
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if (val == LPAIF_I2SCTL_RESET_STATE) {
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dev_err(dai->dev, "error in i2sctl register state\n");
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return -ENOTRECOVERABLE;
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}
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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@ -308,11 +298,14 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream,
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dev_err(dai->dev, "error writing to i2sctl reg: %d\n",
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ret);
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ret = clk_enable(drvdata->mi2s_bit_clk[id]);
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if (ret) {
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dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret);
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clk_disable(drvdata->mi2s_osr_clk[id]);
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return ret;
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if (drvdata->bit_clk_state[id] == LPAIF_BIT_CLK_DISABLE) {
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ret = clk_enable(drvdata->mi2s_bit_clk[id]);
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if (ret) {
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dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret);
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clk_disable(drvdata->mi2s_osr_clk[id]);
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return ret;
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}
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drvdata->bit_clk_state[id] = LPAIF_BIT_CLK_ENABLE;
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}
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break;
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@ -329,7 +322,10 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream,
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if (ret)
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dev_err(dai->dev, "error writing to i2sctl reg: %d\n",
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ret);
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clk_disable(drvdata->mi2s_bit_clk[dai->driver->id]);
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if (drvdata->bit_clk_state[id] == LPAIF_BIT_CLK_ENABLE) {
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clk_disable(drvdata->mi2s_bit_clk[dai->driver->id]);
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drvdata->bit_clk_state[id] = LPAIF_BIT_CLK_DISABLE;
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}
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break;
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}
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@ -341,7 +337,6 @@ const struct snd_soc_dai_ops asoc_qcom_lpass_cpu_dai_ops = {
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.startup = lpass_cpu_daiops_startup,
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.shutdown = lpass_cpu_daiops_shutdown,
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.hw_params = lpass_cpu_daiops_hw_params,
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.prepare = lpass_cpu_daiops_prepare,
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.trigger = lpass_cpu_daiops_trigger,
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};
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EXPORT_SYMBOL_GPL(asoc_qcom_lpass_cpu_dai_ops);
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@ -459,16 +454,20 @@ static bool lpass_cpu_regmap_volatile(struct device *dev, unsigned int reg)
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struct lpass_variant *v = drvdata->variant;
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int i;
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for (i = 0; i < v->i2s_ports; ++i)
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if (reg == LPAIF_I2SCTL_REG(v, i))
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return true;
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for (i = 0; i < v->irq_ports; ++i)
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if (reg == LPAIF_IRQSTAT_REG(v, i))
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return true;
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for (i = 0; i < v->rdma_channels; ++i)
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if (reg == LPAIF_RDMACURR_REG(v, i))
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if (reg == LPAIF_RDMACURR_REG(v, i) || reg == LPAIF_RDMACTL_REG(v, i))
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return true;
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for (i = 0; i < v->wrdma_channels; ++i)
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if (reg == LPAIF_WRDMACURR_REG(v, i + v->wrdma_channel_start))
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if (reg == LPAIF_WRDMACURR_REG(v, i + v->wrdma_channel_start) ||
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reg == LPAIF_WRDMACTL_REG(v, i + v->wrdma_channel_start))
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return true;
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return false;
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@ -861,6 +860,7 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev)
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PTR_ERR(drvdata->mi2s_bit_clk[dai_id]));
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return PTR_ERR(drvdata->mi2s_bit_clk[dai_id]);
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}
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drvdata->bit_clk_state[dai_id] = LPAIF_BIT_CLK_DISABLE;
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}
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/* Allocation for i2sctl regmap fields */
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@ -60,6 +60,13 @@
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#define LPAIF_I2SCTL_BITWIDTH_24 1
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#define LPAIF_I2SCTL_BITWIDTH_32 2
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#define LPAIF_BIT_CLK_DISABLE 0
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#define LPAIF_BIT_CLK_ENABLE 1
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#define LPAIF_I2SCTL_RESET_STATE 0x003C0004
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#define LPAIF_DMACTL_RESET_STATE 0x00200000
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/* LPAIF IRQ */
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#define LPAIF_IRQ_REG_ADDR(v, addr, port) \
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(v->irq_reg_base + (addr) + v->irq_reg_stride * (port))
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@ -110,6 +110,7 @@ static int lpass_platform_pcmops_open(struct snd_soc_component *component,
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struct regmap *map;
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unsigned int dai_id = cpu_dai->driver->id;
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component->id = dai_id;
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data = kzalloc(sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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@ -451,19 +452,34 @@ static int lpass_platform_pcmops_trigger(struct snd_soc_component *component,
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unsigned int reg_irqclr = 0, val_irqclr = 0;
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unsigned int reg_irqen = 0, val_irqen = 0, val_mask = 0;
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unsigned int dai_id = cpu_dai->driver->id;
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unsigned int dma_ctrl_reg = 0;
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ch = pcm_data->dma_ch;
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if (dir == SNDRV_PCM_STREAM_PLAYBACK) {
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id = pcm_data->dma_ch;
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if (dai_id == LPASS_DP_RX)
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if (dai_id == LPASS_DP_RX) {
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dmactl = drvdata->hdmi_rd_dmactl;
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else
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map = drvdata->hdmiif_map;
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} else {
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dmactl = drvdata->rd_dmactl;
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map = drvdata->lpaif_map;
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}
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} else {
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dmactl = drvdata->wr_dmactl;
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id = pcm_data->dma_ch - v->wrdma_channel_start;
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map = drvdata->lpaif_map;
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}
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ret = regmap_read(map, LPAIF_DMACTL_REG(v, ch, dir, dai_id), &dma_ctrl_reg);
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if (ret) {
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dev_err(soc_runtime->dev, "error reading from rdmactl reg: %d\n", ret);
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return ret;
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}
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if (dma_ctrl_reg == LPAIF_DMACTL_RESET_STATE ||
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dma_ctrl_reg == LPAIF_DMACTL_RESET_STATE + 1) {
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dev_err(soc_runtime->dev, "error in rdmactl register state\n");
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return -ENOTRECOVERABLE;
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}
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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@ -68,6 +68,7 @@ struct lpass_data {
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unsigned int mi2s_playback_sd_mode[LPASS_MAX_MI2S_PORTS];
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unsigned int mi2s_capture_sd_mode[LPASS_MAX_MI2S_PORTS];
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int hdmi_port_enable;
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int bit_clk_state[LPASS_MAX_MI2S_PORTS];
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/* low-power audio interface (LPAIF) registers */
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void __iomem *lpaif;
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