omap: mailbox: Adds code changes to support OMAP4 mailbox
This patch adds code changes in the mailbox driver module to add support for OMAP4 mailbox. Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: C A Subramaniam <subramaniam.ca@ti.com> Signed-off-by: Ramesh Gupta G <grgupta@ti.com> Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
C A Subramaniam
Tony Lindgren
Родитель
eb18858ebd
Коммит
5f00ec64a3
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@ -18,6 +18,8 @@
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#include <plat/mailbox.h>
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#include <mach/irqs.h>
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#define DRV_NAME "omap2-mailbox"
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#define MAILBOX_REVISION 0x000
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#define MAILBOX_SYSCONFIG 0x010
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#define MAILBOX_SYSSTATUS 0x014
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@ -27,8 +29,12 @@
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#define MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u))
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#define MAILBOX_IRQENABLE(u) (0x104 + 8 * (u))
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#define MAILBOX_IRQ_NEWMSG(u) (1 << (2 * (u)))
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#define MAILBOX_IRQ_NOTFULL(u) (1 << (2 * (u) + 1))
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#define OMAP4_MAILBOX_IRQSTATUS(u) (0x104 + 10 * (u))
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#define OMAP4_MAILBOX_IRQENABLE(u) (0x108 + 10 * (u))
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#define OMAP4_MAILBOX_IRQENABLE_CLR(u) (0x10c + 10 * (u))
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#define MAILBOX_IRQ_NEWMSG(m) (1 << (2 * (m)))
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#define MAILBOX_IRQ_NOTFULL(m) (1 << (2 * (m) + 1))
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/* SYSCONFIG: register bit definition */
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#define AUTOIDLE (1 << 0)
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@ -39,7 +45,11 @@
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#define RESETDONE (1 << 0)
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#define MBOX_REG_SIZE 0x120
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#define OMAP4_MBOX_REG_SIZE 0x130
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#define MBOX_NR_REGS (MBOX_REG_SIZE / sizeof(u32))
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#define OMAP4_MBOX_NR_REGS (OMAP4_MBOX_REG_SIZE / sizeof(u32))
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static void __iomem *mbox_base;
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@ -56,7 +66,8 @@ struct omap_mbox2_priv {
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unsigned long irqstatus;
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u32 newmsg_bit;
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u32 notfull_bit;
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u32 ctx[MBOX_NR_REGS];
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u32 ctx[OMAP4_MBOX_NR_REGS];
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unsigned long irqdisable;
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};
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static struct clk *mbox_ick_handle;
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@ -82,8 +93,9 @@ static int omap2_mbox_startup(struct omap_mbox *mbox)
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mbox_ick_handle = clk_get(NULL, "mailboxes_ick");
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if (IS_ERR(mbox_ick_handle)) {
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pr_err("Can't get mailboxes_ick\n");
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return -ENODEV;
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printk(KERN_ERR "Could not get mailboxes_ick: %d\n",
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PTR_ERR(mbox_ick_handle));
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return PTR_ERR(mbox_ick_handle);
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}
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clk_enable(mbox_ick_handle);
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@ -115,6 +127,7 @@ static void omap2_mbox_shutdown(struct omap_mbox *mbox)
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{
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clk_disable(mbox_ick_handle);
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clk_put(mbox_ick_handle);
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mbox_ick_handle = NULL;
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}
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/* Mailbox FIFO handle functions */
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@ -143,7 +156,7 @@ static int omap2_mbox_fifo_full(struct omap_mbox *mbox)
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{
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struct omap_mbox2_fifo *fifo =
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&((struct omap_mbox2_priv *)mbox->priv)->tx_fifo;
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return (mbox_read_reg(fifo->fifo_stat));
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return mbox_read_reg(fifo->fifo_stat);
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}
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/* Mailbox IRQ handle functions */
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@ -163,10 +176,9 @@ static void omap2_mbox_disable_irq(struct omap_mbox *mbox,
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{
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struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv;
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u32 l, bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
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l = mbox_read_reg(p->irqenable);
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l = mbox_read_reg(p->irqdisable);
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l &= ~bit;
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mbox_write_reg(l, p->irqenable);
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mbox_write_reg(l, p->irqdisable);
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}
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static void omap2_mbox_ack_irq(struct omap_mbox *mbox,
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@ -189,15 +201,19 @@ static int omap2_mbox_is_irq(struct omap_mbox *mbox,
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u32 enable = mbox_read_reg(p->irqenable);
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u32 status = mbox_read_reg(p->irqstatus);
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return (enable & status & bit);
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return (int)(enable & status & bit);
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}
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static void omap2_mbox_save_ctx(struct omap_mbox *mbox)
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{
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int i;
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struct omap_mbox2_priv *p = mbox->priv;
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for (i = 0; i < MBOX_NR_REGS; i++) {
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int nr_regs;
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if (cpu_is_omap44xx())
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nr_regs = OMAP4_MBOX_NR_REGS;
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else
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nr_regs = MBOX_NR_REGS;
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for (i = 0; i < nr_regs; i++) {
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p->ctx[i] = mbox_read_reg(i * sizeof(u32));
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dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__,
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@ -209,8 +225,12 @@ static void omap2_mbox_restore_ctx(struct omap_mbox *mbox)
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{
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int i;
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struct omap_mbox2_priv *p = mbox->priv;
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for (i = 0; i < MBOX_NR_REGS; i++) {
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int nr_regs;
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if (cpu_is_omap44xx())
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nr_regs = OMAP4_MBOX_NR_REGS;
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else
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nr_regs = MBOX_NR_REGS;
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for (i = 0; i < nr_regs; i++) {
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mbox_write_reg(p->ctx[i], i * sizeof(u32));
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dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__,
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@ -242,7 +262,6 @@ static struct omap_mbox_ops omap2_mbox_ops = {
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*/
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/* FIXME: the following structs should be filled automatically by the user id */
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/* DSP */
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static struct omap_mbox2_priv omap2_mbox_dsp_priv = {
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.tx_fifo = {
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@ -257,8 +276,36 @@ static struct omap_mbox2_priv omap2_mbox_dsp_priv = {
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.irqstatus = MAILBOX_IRQSTATUS(0),
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.notfull_bit = MAILBOX_IRQ_NOTFULL(0),
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.newmsg_bit = MAILBOX_IRQ_NEWMSG(1),
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.irqdisable = MAILBOX_IRQENABLE(0),
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};
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/* OMAP4 specific data structure. Use the cpu_is_omap4xxx()
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to use this*/
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static struct omap_mbox2_priv omap2_mbox_1_priv = {
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.tx_fifo = {
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.msg = MAILBOX_MESSAGE(0),
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.fifo_stat = MAILBOX_FIFOSTATUS(0),
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},
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.rx_fifo = {
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.msg = MAILBOX_MESSAGE(1),
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.msg_stat = MAILBOX_MSGSTATUS(1),
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},
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.irqenable = OMAP4_MAILBOX_IRQENABLE(0),
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.irqstatus = OMAP4_MAILBOX_IRQSTATUS(0),
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.notfull_bit = MAILBOX_IRQ_NOTFULL(0),
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.newmsg_bit = MAILBOX_IRQ_NEWMSG(1),
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.irqdisable = OMAP4_MAILBOX_IRQENABLE_CLR(0),
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};
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struct omap_mbox mbox_1_info = {
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.name = "mailbox-1",
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.ops = &omap2_mbox_ops,
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.priv = &omap2_mbox_1_priv,
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};
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EXPORT_SYMBOL(mbox_1_info);
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struct omap_mbox mbox_dsp_info = {
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.name = "dsp",
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.ops = &omap2_mbox_ops,
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@ -266,6 +313,30 @@ struct omap_mbox mbox_dsp_info = {
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};
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EXPORT_SYMBOL(mbox_dsp_info);
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static struct omap_mbox2_priv omap2_mbox_2_priv = {
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.tx_fifo = {
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.msg = MAILBOX_MESSAGE(3),
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.fifo_stat = MAILBOX_FIFOSTATUS(3),
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},
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.rx_fifo = {
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.msg = MAILBOX_MESSAGE(2),
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.msg_stat = MAILBOX_MSGSTATUS(2),
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},
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.irqenable = OMAP4_MAILBOX_IRQENABLE(0),
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.irqstatus = OMAP4_MAILBOX_IRQSTATUS(0),
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.notfull_bit = MAILBOX_IRQ_NOTFULL(3),
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.newmsg_bit = MAILBOX_IRQ_NEWMSG(2),
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.irqdisable = OMAP4_MAILBOX_IRQENABLE_CLR(0),
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};
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struct omap_mbox mbox_2_info = {
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.name = "mailbox-2",
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.ops = &omap2_mbox_ops,
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.priv = &omap2_mbox_2_priv,
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};
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EXPORT_SYMBOL(mbox_2_info);
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#if defined(CONFIG_ARCH_OMAP2420) /* IVA */
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static struct omap_mbox2_priv omap2_mbox_iva_priv = {
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.tx_fifo = {
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@ -280,6 +351,7 @@ static struct omap_mbox2_priv omap2_mbox_iva_priv = {
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.irqstatus = MAILBOX_IRQSTATUS(3),
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.notfull_bit = MAILBOX_IRQ_NOTFULL(2),
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.newmsg_bit = MAILBOX_IRQ_NEWMSG(3),
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.irqdisable = MAILBOX_IRQENABLE(3),
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};
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static struct omap_mbox mbox_iva_info = {
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@ -305,17 +377,31 @@ static int __devinit omap2_mbox_probe(struct platform_device *pdev)
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return -ENOMEM;
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/* DSP or IVA2 IRQ */
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ret = platform_get_irq(pdev, 0);
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if (ret < 0) {
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res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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if (unlikely(!res)) {
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dev_err(&pdev->dev, "invalid irq resource\n");
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ret = -ENODEV;
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goto err_dsp;
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}
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mbox_dsp_info.irq = ret;
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ret = omap_mbox_register(&pdev->dev, &mbox_dsp_info);
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if (cpu_is_omap44xx()) {
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mbox_1_info.irq = res->start;
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ret = omap_mbox_register(&pdev->dev, &mbox_1_info);
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} else {
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mbox_dsp_info.irq = res->start;
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ret = omap_mbox_register(&pdev->dev, &mbox_dsp_info);
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}
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if (ret)
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goto err_dsp;
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if (cpu_is_omap44xx()) {
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mbox_2_info.irq = res->start;
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ret = omap_mbox_register(&pdev->dev, &mbox_2_info);
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if (ret) {
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omap_mbox_unregister(&mbox_1_info);
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goto err_dsp;
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}
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}
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#if defined(CONFIG_ARCH_OMAP2420) /* IVA */
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if (cpu_is_omap2420()) {
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/* IVA IRQ */
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@ -335,6 +421,7 @@ static int __devinit omap2_mbox_probe(struct platform_device *pdev)
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err_iva1:
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omap_mbox_unregister(&mbox_dsp_info);
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err_dsp:
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iounmap(mbox_base);
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return ret;
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@ -345,7 +432,12 @@ static int __devexit omap2_mbox_remove(struct platform_device *pdev)
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#if defined(CONFIG_ARCH_OMAP2420)
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omap_mbox_unregister(&mbox_iva_info);
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#endif
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omap_mbox_unregister(&mbox_dsp_info);
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if (cpu_is_omap44xx()) {
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omap_mbox_unregister(&mbox_2_info);
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omap_mbox_unregister(&mbox_1_info);
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} else
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omap_mbox_unregister(&mbox_dsp_info);
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iounmap(mbox_base);
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return 0;
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}
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@ -354,7 +446,7 @@ static struct platform_driver omap2_mbox_driver = {
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.probe = omap2_mbox_probe,
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.remove = __devexit_p(omap2_mbox_remove),
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.driver = {
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.name = "omap2-mailbox",
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.name = DRV_NAME,
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},
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};
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@ -372,6 +464,6 @@ module_init(omap2_mbox_init);
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module_exit(omap2_mbox_exit);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("omap mailbox: omap2/3 architecture specific functions");
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MODULE_DESCRIPTION("omap mailbox: omap2/3/4 architecture specific functions");
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MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>, Paul Mundt");
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MODULE_ALIAS("platform:omap2-mailbox");
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MODULE_ALIAS("platform:"DRV_NAME);
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@ -31,6 +31,8 @@
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static struct omap_mbox *mboxes;
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static DEFINE_RWLOCK(mboxes_lock);
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static int mbox_configured;
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/* Mailbox FIFO handle functions */
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static inline mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox)
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{
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@ -266,13 +268,20 @@ static void mbox_queue_free(struct omap_mbox_queue *q)
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static int omap_mbox_startup(struct omap_mbox *mbox)
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{
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int ret;
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int ret = 0;
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struct omap_mbox_queue *mq;
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if (likely(mbox->ops->startup)) {
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ret = mbox->ops->startup(mbox);
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if (unlikely(ret))
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write_lock(&mboxes_lock);
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if (!mbox_configured)
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ret = mbox->ops->startup(mbox);
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if (unlikely(ret)) {
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write_unlock(&mboxes_lock);
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return ret;
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}
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mbox_configured++;
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write_unlock(&mboxes_lock);
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}
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ret = request_irq(mbox->irq, mbox_interrupt, IRQF_DISABLED,
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@ -317,8 +326,14 @@ static void omap_mbox_fini(struct omap_mbox *mbox)
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free_irq(mbox->irq, mbox);
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if (unlikely(mbox->ops->shutdown))
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mbox->ops->shutdown(mbox);
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if (unlikely(mbox->ops->shutdown)) {
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write_lock(&mboxes_lock);
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if (mbox_configured > 0)
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mbox_configured--;
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if (!mbox_configured)
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mbox->ops->shutdown(mbox);
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write_unlock(&mboxes_lock);
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}
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}
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static struct omap_mbox **find_mboxes(const char *name)
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