diff --git a/drivers/clk/mvebu/common.c b/drivers/clk/mvebu/common.c index 354bbadb3bce..f902c18f4552 100644 --- a/drivers/clk/mvebu/common.c +++ b/drivers/clk/mvebu/common.c @@ -41,7 +41,7 @@ static struct clk_onecell_data clk_data; * chosen following the dt convention: using the first known SoC * compatible with it. */ -u32 kirkwood_fix_sscg_deviation(struct device_node *np, u32 system_clk) +u32 kirkwood_fix_sscg_deviation(u32 system_clk) { struct device_node *sscg_np = NULL; void __iomem *sscg_map; @@ -49,7 +49,7 @@ u32 kirkwood_fix_sscg_deviation(struct device_node *np, u32 system_clk) s32 low_bound, high_bound; u64 freq_swing_half; - sscg_np = of_find_node_by_name(np, "sscg"); + sscg_np = of_find_node_by_name(NULL, "sscg"); if (sscg_np == NULL) { pr_err("cannot get SSCG register node\n"); return system_clk; @@ -142,7 +142,7 @@ void __init mvebu_coreclk_setup(struct device_node *np, if (desc->is_sscg_enabled && desc->fix_sscg_deviation && desc->is_sscg_enabled(base)) - rate = desc->fix_sscg_deviation(np, rate); + rate = desc->fix_sscg_deviation(rate); clk_data.clks[1] = clk_register_fixed_rate(NULL, cpuclk_name, NULL, CLK_IS_ROOT, rate); diff --git a/drivers/clk/mvebu/common.h b/drivers/clk/mvebu/common.h index 59efaa850bde..989ab1464617 100644 --- a/drivers/clk/mvebu/common.h +++ b/drivers/clk/mvebu/common.h @@ -29,7 +29,7 @@ struct coreclk_soc_desc { u32 (*get_cpu_freq)(void __iomem *sar); void (*get_clk_ratio)(void __iomem *sar, int id, int *mult, int *div); bool (*is_sscg_enabled)(void __iomem *sar); - u32 (*fix_sscg_deviation)(struct device_node *np, u32 system_clk); + u32 (*fix_sscg_deviation)(u32 system_clk); const struct coreclk_ratio *ratios; int num_ratios; }; @@ -51,5 +51,5 @@ void __init mvebu_clk_gating_setup(struct device_node *np, * This function is shared among the Kirkwood, Armada 370, Armada XP * and Armada 375 SoC */ -u32 kirkwood_fix_sscg_deviation(struct device_node *np, u32 system_clk); +u32 kirkwood_fix_sscg_deviation(u32 system_clk); #endif