drm/amd/amdgpu: fixing read wrong pf2vf data in SRIOV
commit9a458402fb
upstream. [Why] This fixes892deb4826
("drm/amdgpu: Separate vf2pf work item init from virt data exchange"). we should read pf2vf data based at mman.fw_vram_usage_va after gmc sw_init. commit892deb4826
breaks this logic. [How] calling amdgpu_virt_exchange_data in amdgpu_virt_init_data_exchange to set the right base in the right sequence. v2: call amdgpu_virt_init_data_exchange after gmc sw_init to make data exchange workqueue run v3: clean up the code logic v4: add some comment and make the code more readable Fixes:892deb4826
("drm/amdgpu: Separate vf2pf work item init from virt data exchange") Signed-off-by: Jingwen Chen <Jingwen.Chen2@amd.com> Reviewed-by: Horace Chen <horace.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Родитель
d3a67c21b1
Коммит
5f270b61ee
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@ -2433,7 +2433,7 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev)
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}
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if (amdgpu_sriov_vf(adev))
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amdgpu_virt_exchange_data(adev);
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amdgpu_virt_init_data_exchange(adev);
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r = amdgpu_ib_pool_init(adev);
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if (r) {
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@ -618,20 +618,20 @@ void amdgpu_virt_init_data_exchange(struct amdgpu_device *adev)
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adev->virt.fw_reserve.p_vf2pf = NULL;
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adev->virt.vf2pf_update_interval_ms = 0;
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if (adev->bios != NULL) {
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adev->virt.vf2pf_update_interval_ms = 2000;
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if (adev->mman.fw_vram_usage_va != NULL) {
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/* go through this logic in ip_init and reset to init workqueue*/
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amdgpu_virt_exchange_data(adev);
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INIT_DELAYED_WORK(&adev->virt.vf2pf_work, amdgpu_virt_update_vf2pf_work_item);
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schedule_delayed_work(&(adev->virt.vf2pf_work), msecs_to_jiffies(adev->virt.vf2pf_update_interval_ms));
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} else if (adev->bios != NULL) {
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/* got through this logic in early init stage to get necessary flags, e.g. rlcg_acc related*/
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adev->virt.fw_reserve.p_pf2vf =
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(struct amd_sriov_msg_pf2vf_info_header *)
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(adev->bios + (AMD_SRIOV_MSG_PF2VF_OFFSET_KB << 10));
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amdgpu_virt_read_pf2vf_data(adev);
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}
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if (adev->virt.vf2pf_update_interval_ms != 0) {
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INIT_DELAYED_WORK(&adev->virt.vf2pf_work, amdgpu_virt_update_vf2pf_work_item);
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schedule_delayed_work(&(adev->virt.vf2pf_work), msecs_to_jiffies(adev->virt.vf2pf_update_interval_ms));
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}
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}
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@ -667,12 +667,6 @@ void amdgpu_virt_exchange_data(struct amdgpu_device *adev)
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if (adev->virt.ras_init_done)
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amdgpu_virt_add_bad_page(adev, bp_block_offset, bp_block_size);
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}
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} else if (adev->bios != NULL) {
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adev->virt.fw_reserve.p_pf2vf =
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(struct amd_sriov_msg_pf2vf_info_header *)
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(adev->bios + (AMD_SRIOV_MSG_PF2VF_OFFSET_KB << 10));
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amdgpu_virt_read_pf2vf_data(adev);
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}
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}
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