[PATCH] hpet-RTC: fix timer config register accesses
Make sure that the RTC timer is in non-periodic mode; some stupid BIOS might have initialized it to periodic mode. Furthermore, don't set the SETVAL bit in the config register. This wouldn't have any effect unless the timer was in period mode (which it isn't), and then the actual timer frequency would be half that of the desired one because incrementing the comparator in the interrupt handler would be done after the hardware has already incremented it itself. Signed-off-by: Clemens Ladisch <clemens@ladisch.de> Acked-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -309,7 +309,8 @@ int hpet_rtc_timer_init(void)
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local_irq_restore(flags);
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local_irq_restore(flags);
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cfg = hpet_readl(HPET_T1_CFG);
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cfg = hpet_readl(HPET_T1_CFG);
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cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
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cfg &= ~HPET_TN_PERIODIC;
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cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
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hpet_writel(cfg, HPET_T1_CFG);
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hpet_writel(cfg, HPET_T1_CFG);
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return 1;
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return 1;
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@ -335,12 +336,6 @@ static void hpet_rtc_timer_reinit(void)
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cnt = hpet_readl(HPET_T1_CMP);
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cnt = hpet_readl(HPET_T1_CMP);
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cnt += hpet_tick*HZ/hpet_rtc_int_freq;
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cnt += hpet_tick*HZ/hpet_rtc_int_freq;
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hpet_writel(cnt, HPET_T1_CMP);
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hpet_writel(cnt, HPET_T1_CMP);
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cfg = hpet_readl(HPET_T1_CFG);
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cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
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hpet_writel(cfg, HPET_T1_CFG);
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return;
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}
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}
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/*
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/*
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@ -1128,7 +1128,8 @@ int hpet_rtc_timer_init(void)
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local_irq_restore(flags);
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local_irq_restore(flags);
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cfg = hpet_readl(HPET_T1_CFG);
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cfg = hpet_readl(HPET_T1_CFG);
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cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
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cfg &= ~HPET_TN_PERIODIC;
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cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
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hpet_writel(cfg, HPET_T1_CFG);
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hpet_writel(cfg, HPET_T1_CFG);
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return 1;
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return 1;
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@ -1154,12 +1155,6 @@ static void hpet_rtc_timer_reinit(void)
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cnt = hpet_readl(HPET_T1_CMP);
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cnt = hpet_readl(HPET_T1_CMP);
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cnt += hpet_tick*HZ/hpet_rtc_int_freq;
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cnt += hpet_tick*HZ/hpet_rtc_int_freq;
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hpet_writel(cnt, HPET_T1_CMP);
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hpet_writel(cnt, HPET_T1_CMP);
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cfg = hpet_readl(HPET_T1_CFG);
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cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
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hpet_writel(cfg, HPET_T1_CFG);
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return;
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}
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}
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/*
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/*
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