drm/nv44/mpeg: create a copy of the nv31/nv40 impls
The nv31/nv40 impls are actually fairly nv44-specific, since they assume the presence of the instance register/context switching. Create a copy before nv31/nv40 get fixed. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ilia Mirkin
Ben Skeggs
Родитель
be4ba55046
Коммит
5fa7543041
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@ -227,6 +227,7 @@ nouveau-y += core/engine/graph/nve4.o
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nouveau-y += core/engine/graph/nvf0.o
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nouveau-y += core/engine/mpeg/nv31.o
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nouveau-y += core/engine/mpeg/nv40.o
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nouveau-y += core/engine/mpeg/nv44.o
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nouveau-y += core/engine/mpeg/nv50.o
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nouveau-y += core/engine/mpeg/nv84.o
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nouveau-y += core/engine/ppp/nv98.o
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@ -150,7 +150,7 @@ nv40_identify(struct nouveau_device *device)
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device->oclass[NVDEV_ENGINE_FIFO ] = &nv40_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = &nv40_graph_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_DISP ] = &nv04_disp_oclass;
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break;
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case 0x47:
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@ -171,7 +171,7 @@ nv40_identify(struct nouveau_device *device)
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device->oclass[NVDEV_ENGINE_FIFO ] = &nv40_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = &nv40_graph_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_DISP ] = &nv04_disp_oclass;
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break;
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case 0x49:
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@ -192,7 +192,7 @@ nv40_identify(struct nouveau_device *device)
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device->oclass[NVDEV_ENGINE_FIFO ] = &nv40_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = &nv40_graph_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_DISP ] = &nv04_disp_oclass;
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break;
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case 0x4b:
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@ -213,7 +213,7 @@ nv40_identify(struct nouveau_device *device)
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device->oclass[NVDEV_ENGINE_FIFO ] = &nv40_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = &nv40_graph_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_DISP ] = &nv04_disp_oclass;
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break;
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case 0x44:
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@ -234,7 +234,7 @@ nv40_identify(struct nouveau_device *device)
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device->oclass[NVDEV_ENGINE_FIFO ] = &nv40_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = &nv40_graph_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_DISP ] = &nv04_disp_oclass;
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break;
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case 0x46:
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@ -255,7 +255,7 @@ nv40_identify(struct nouveau_device *device)
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device->oclass[NVDEV_ENGINE_FIFO ] = &nv40_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = &nv40_graph_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_DISP ] = &nv04_disp_oclass;
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break;
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case 0x4a:
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@ -276,7 +276,7 @@ nv40_identify(struct nouveau_device *device)
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device->oclass[NVDEV_ENGINE_FIFO ] = &nv40_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = &nv40_graph_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_DISP ] = &nv04_disp_oclass;
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break;
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case 0x4c:
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@ -297,7 +297,7 @@ nv40_identify(struct nouveau_device *device)
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device->oclass[NVDEV_ENGINE_FIFO ] = &nv40_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = &nv40_graph_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_DISP ] = &nv04_disp_oclass;
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break;
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case 0x4e:
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@ -318,7 +318,7 @@ nv40_identify(struct nouveau_device *device)
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device->oclass[NVDEV_ENGINE_FIFO ] = &nv40_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = &nv40_graph_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_DISP ] = &nv04_disp_oclass;
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break;
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case 0x63:
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@ -339,7 +339,7 @@ nv40_identify(struct nouveau_device *device)
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device->oclass[NVDEV_ENGINE_FIFO ] = &nv40_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = &nv40_graph_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_DISP ] = &nv04_disp_oclass;
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break;
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case 0x67:
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@ -360,7 +360,7 @@ nv40_identify(struct nouveau_device *device)
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device->oclass[NVDEV_ENGINE_FIFO ] = &nv40_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = &nv40_graph_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_DISP ] = &nv04_disp_oclass;
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break;
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case 0x68:
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@ -381,7 +381,7 @@ nv40_identify(struct nouveau_device *device)
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device->oclass[NVDEV_ENGINE_FIFO ] = &nv40_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = &nv40_graph_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
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device->oclass[NVDEV_ENGINE_DISP ] = &nv04_disp_oclass;
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break;
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default:
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@ -0,0 +1,194 @@
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/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include <core/os.h>
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#include <core/class.h>
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#include <core/client.h>
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#include <core/engctx.h>
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#include <core/handle.h>
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#include <subdev/fb.h>
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#include <subdev/timer.h>
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#include <subdev/instmem.h>
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#include <engine/fifo.h>
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#include <engine/mpeg.h>
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struct nv44_mpeg_priv {
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struct nouveau_mpeg base;
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};
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struct nv44_mpeg_chan {
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struct nouveau_mpeg_chan base;
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};
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/*******************************************************************************
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* PMPEG context
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******************************************************************************/
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static int
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nv44_mpeg_context_ctor(struct nouveau_object *parent,
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struct nouveau_object *engine,
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struct nouveau_oclass *oclass, void *data, u32 size,
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struct nouveau_object **pobject)
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{
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struct nv44_mpeg_chan *chan;
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int ret;
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ret = nouveau_mpeg_context_create(parent, engine, oclass, NULL,
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264 * 4, 16,
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NVOBJ_FLAG_ZERO_ALLOC, &chan);
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*pobject = nv_object(chan);
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if (ret)
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return ret;
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nv_wo32(&chan->base.base, 0x78, 0x02001ec1);
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return 0;
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}
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static int
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nv44_mpeg_context_fini(struct nouveau_object *object, bool suspend)
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{
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struct nv44_mpeg_priv *priv = (void *)object->engine;
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struct nv44_mpeg_chan *chan = (void *)object;
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u32 inst = 0x80000000 | nv_gpuobj(chan)->addr >> 4;
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nv_mask(priv, 0x00b32c, 0x00000001, 0x00000000);
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if (nv_rd32(priv, 0x00b318) == inst)
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nv_mask(priv, 0x00b318, 0x80000000, 0x00000000);
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nv_mask(priv, 0x00b32c, 0x00000001, 0x00000001);
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return 0;
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}
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static struct nouveau_oclass
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nv44_mpeg_cclass = {
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.handle = NV_ENGCTX(MPEG, 0x44),
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.ofuncs = &(struct nouveau_ofuncs) {
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.ctor = nv44_mpeg_context_ctor,
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.dtor = _nouveau_mpeg_context_dtor,
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.init = _nouveau_mpeg_context_init,
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.fini = nv44_mpeg_context_fini,
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.rd32 = _nouveau_mpeg_context_rd32,
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.wr32 = _nouveau_mpeg_context_wr32,
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},
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};
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/*******************************************************************************
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* PMPEG engine/subdev functions
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******************************************************************************/
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static void
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nv44_mpeg_intr(struct nouveau_subdev *subdev)
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{
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struct nouveau_fifo *pfifo = nouveau_fifo(subdev);
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struct nouveau_engine *engine = nv_engine(subdev);
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struct nouveau_object *engctx;
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struct nouveau_handle *handle;
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struct nv44_mpeg_priv *priv = (void *)subdev;
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u32 inst = nv_rd32(priv, 0x00b318) & 0x000fffff;
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u32 stat = nv_rd32(priv, 0x00b100);
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u32 type = nv_rd32(priv, 0x00b230);
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u32 mthd = nv_rd32(priv, 0x00b234);
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u32 data = nv_rd32(priv, 0x00b238);
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u32 show = stat;
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int chid;
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engctx = nouveau_engctx_get(engine, inst);
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chid = pfifo->chid(pfifo, engctx);
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if (stat & 0x01000000) {
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/* happens on initial binding of the object */
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if (type == 0x00000020 && mthd == 0x0000) {
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nv_mask(priv, 0x00b308, 0x00000000, 0x00000000);
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show &= ~0x01000000;
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}
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if (type == 0x00000010) {
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handle = nouveau_handle_get_class(engctx, 0x3174);
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if (handle && !nv_call(handle->object, mthd, data))
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show &= ~0x01000000;
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nouveau_handle_put(handle);
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}
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}
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nv_wr32(priv, 0x00b100, stat);
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nv_wr32(priv, 0x00b230, 0x00000001);
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if (show) {
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nv_error(priv,
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"ch %d [0x%08x %s] 0x%08x 0x%08x 0x%08x 0x%08x\n",
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chid, inst << 4, nouveau_client_name(engctx), stat,
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type, mthd, data);
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}
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nouveau_engctx_put(engctx);
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}
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static void
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nv44_mpeg_me_intr(struct nouveau_subdev *subdev)
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{
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struct nv44_mpeg_priv *priv = (void *)subdev;
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u32 stat;
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if ((stat = nv_rd32(priv, 0x00b100)))
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nv44_mpeg_intr(subdev);
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if ((stat = nv_rd32(priv, 0x00b800))) {
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nv_error(priv, "PMSRCH 0x%08x\n", stat);
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nv_wr32(priv, 0x00b800, stat);
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}
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}
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static int
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nv44_mpeg_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
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struct nouveau_oclass *oclass, void *data, u32 size,
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struct nouveau_object **pobject)
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{
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struct nv44_mpeg_priv *priv;
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int ret;
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ret = nouveau_mpeg_create(parent, engine, oclass, &priv);
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*pobject = nv_object(priv);
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if (ret)
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return ret;
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nv_subdev(priv)->unit = 0x00000002;
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nv_subdev(priv)->intr = nv44_mpeg_me_intr;
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nv_engine(priv)->cclass = &nv44_mpeg_cclass;
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nv_engine(priv)->sclass = nv31_mpeg_sclass;
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nv_engine(priv)->tile_prog = nv31_mpeg_tile_prog;
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return 0;
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}
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struct nouveau_oclass
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nv44_mpeg_oclass = {
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.handle = NV_ENGINE(MPEG, 0x44),
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.ofuncs = &(struct nouveau_ofuncs) {
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.ctor = nv44_mpeg_ctor,
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.dtor = _nouveau_mpeg_dtor,
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.init = nv31_mpeg_init,
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.fini = _nouveau_mpeg_fini,
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},
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};
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@ -42,6 +42,7 @@ struct nouveau_mpeg {
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extern struct nouveau_oclass nv31_mpeg_oclass;
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extern struct nouveau_oclass nv40_mpeg_oclass;
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extern struct nouveau_oclass nv44_mpeg_oclass;
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extern struct nouveau_oclass nv50_mpeg_oclass;
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extern struct nouveau_oclass nv84_mpeg_oclass;
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