ARM: dma-mapping: Add maximum alignment order for dma iommu buffers
Alignment order for a dma iommu buffer is set by buffer size. For large buffer, it is a waste of iommu address space. So configurable parameter to limit maximum alignment order can reduce the waste. Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com> Signed-off-by: Kyungmin.park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
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@ -75,6 +75,27 @@ config ARM_DMA_USE_IOMMU
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select ARM_HAS_SG_CHAIN
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select NEED_SG_DMA_LENGTH
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if ARM_DMA_USE_IOMMU
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config ARM_DMA_IOMMU_ALIGNMENT
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int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
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range 4 9
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default 8
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help
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DMA mapping framework by default aligns all buffers to the smallest
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PAGE_SIZE order which is greater than or equal to the requested buffer
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size. This works well for buffers up to a few hundreds kilobytes, but
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for larger buffers it just a waste of address space. Drivers which has
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relatively small addressing window (like 64Mib) might run out of
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virtual space with just a few allocations.
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With this parameter you can specify the maximum PAGE_SIZE order for
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DMA IOMMU buffers. Larger buffers will be aligned only to this
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specified order. The order is expressed as a power of two multiplied
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by the PAGE_SIZE.
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endif
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config HAVE_PWM
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bool
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@ -1029,6 +1029,9 @@ static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
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unsigned int count, start;
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unsigned long flags;
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if (order > CONFIG_ARM_DMA_IOMMU_ALIGNMENT)
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order = CONFIG_ARM_DMA_IOMMU_ALIGNMENT;
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count = ((PAGE_ALIGN(size) >> PAGE_SHIFT) +
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(1 << mapping->order) - 1) >> mapping->order;
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