spi: new orion_spi driver
This adds an SPI driver for the SPI controller found in various Marvell Orion ARM SoCs. It currently supports only one slave, which must use SPI mode 0. [dbrownell@users.sourceforge.net: cleanups, meet specs, pass "sparse"] Signed-off-by: Shadi Ammouri <shadi@marvell.com> Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Shadi Ammouri
Linus Torvalds
Родитель
756fcab277
Коммит
60cadec9da
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@ -149,6 +149,12 @@ config SPI_OMAP24XX
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SPI master controller for OMAP24xx/OMAP34xx Multichannel SPI
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(McSPI) modules.
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config SPI_ORION
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tristate "Orion SPI master (EXPERIMENTAL)"
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depends on PLAT_ORION && EXPERIMENTAL
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help
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This enables using the SPI master controller on the Orion chips.
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config SPI_PXA2XX
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tristate "PXA2xx SSP SPI master"
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depends on ARCH_PXA && EXPERIMENTAL
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@ -21,6 +21,7 @@ obj-$(CONFIG_SPI_LM70_LLP) += spi_lm70llp.o
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obj-$(CONFIG_SPI_PXA2XX) += pxa2xx_spi.o
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obj-$(CONFIG_SPI_OMAP_UWIRE) += omap_uwire.o
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obj-$(CONFIG_SPI_OMAP24XX) += omap2_mcspi.o
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obj-$(CONFIG_SPI_ORION) += orion_spi.o
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obj-$(CONFIG_SPI_MPC52xx_PSC) += mpc52xx_psc_spi.o
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obj-$(CONFIG_SPI_MPC83xx) += spi_mpc83xx.o
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obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o
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@ -0,0 +1,574 @@
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/*
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* orion_spi.c -- Marvell Orion SPI controller driver
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*
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* Author: Shadi Ammouri <shadi@marvell.com>
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* Copyright (C) 2007-2008 Marvell Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/orion_spi.h>
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#include <asm/unaligned.h>
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#define DRIVER_NAME "orion_spi"
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#define ORION_NUM_CHIPSELECTS 1 /* only one slave is supported*/
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#define ORION_SPI_WAIT_RDY_MAX_LOOP 2000 /* in usec */
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#define ORION_SPI_IF_CTRL_REG 0x00
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#define ORION_SPI_IF_CONFIG_REG 0x04
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#define ORION_SPI_DATA_OUT_REG 0x08
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#define ORION_SPI_DATA_IN_REG 0x0c
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#define ORION_SPI_INT_CAUSE_REG 0x10
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#define ORION_SPI_IF_8_16_BIT_MODE (1 << 5)
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#define ORION_SPI_CLK_PRESCALE_MASK 0x1F
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struct orion_spi {
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struct work_struct work;
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/* Lock access to transfer list. */
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spinlock_t lock;
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struct list_head msg_queue;
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struct spi_master *master;
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void __iomem *base;
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unsigned int max_speed;
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unsigned int min_speed;
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struct orion_spi_info *spi_info;
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};
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static struct workqueue_struct *orion_spi_wq;
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static inline void __iomem *spi_reg(struct orion_spi *orion_spi, u32 reg)
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{
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return orion_spi->base + reg;
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}
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static inline void
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orion_spi_setbits(struct orion_spi *orion_spi, u32 reg, u32 mask)
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{
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void __iomem *reg_addr = spi_reg(orion_spi, reg);
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u32 val;
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val = readl(reg_addr);
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val |= mask;
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writel(val, reg_addr);
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}
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static inline void
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orion_spi_clrbits(struct orion_spi *orion_spi, u32 reg, u32 mask)
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{
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void __iomem *reg_addr = spi_reg(orion_spi, reg);
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u32 val;
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val = readl(reg_addr);
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val &= ~mask;
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writel(val, reg_addr);
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}
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static int orion_spi_set_transfer_size(struct orion_spi *orion_spi, int size)
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{
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if (size == 16) {
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orion_spi_setbits(orion_spi, ORION_SPI_IF_CONFIG_REG,
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ORION_SPI_IF_8_16_BIT_MODE);
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} else if (size == 8) {
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orion_spi_clrbits(orion_spi, ORION_SPI_IF_CONFIG_REG,
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ORION_SPI_IF_8_16_BIT_MODE);
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} else {
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pr_debug("Bad bits per word value %d (only 8 or 16 are "
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"allowed).\n", size);
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return -EINVAL;
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}
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return 0;
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}
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static int orion_spi_baudrate_set(struct spi_device *spi, unsigned int speed)
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{
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u32 tclk_hz;
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u32 rate;
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u32 prescale;
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u32 reg;
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struct orion_spi *orion_spi;
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orion_spi = spi_master_get_devdata(spi->master);
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tclk_hz = orion_spi->spi_info->tclk;
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/*
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* the supported rates are: 4,6,8...30
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* round up as we look for equal or less speed
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*/
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rate = DIV_ROUND_UP(tclk_hz, speed);
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rate = roundup(rate, 2);
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/* check if requested speed is too small */
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if (rate > 30)
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return -EINVAL;
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if (rate < 4)
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rate = 4;
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/* Convert the rate to SPI clock divisor value. */
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prescale = 0x10 + rate/2;
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reg = readl(spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
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reg = ((reg & ~ORION_SPI_CLK_PRESCALE_MASK) | prescale);
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writel(reg, spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
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return 0;
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}
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/*
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* called only when no transfer is active on the bus
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*/
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static int
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orion_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
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{
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struct orion_spi *orion_spi;
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unsigned int speed = spi->max_speed_hz;
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unsigned int bits_per_word = spi->bits_per_word;
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int rc;
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orion_spi = spi_master_get_devdata(spi->master);
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if ((t != NULL) && t->speed_hz)
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speed = t->speed_hz;
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if ((t != NULL) && t->bits_per_word)
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bits_per_word = t->bits_per_word;
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rc = orion_spi_baudrate_set(spi, speed);
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if (rc)
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return rc;
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return orion_spi_set_transfer_size(orion_spi, bits_per_word);
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}
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static void orion_spi_set_cs(struct orion_spi *orion_spi, int enable)
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{
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if (enable)
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orion_spi_setbits(orion_spi, ORION_SPI_IF_CTRL_REG, 0x1);
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else
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orion_spi_clrbits(orion_spi, ORION_SPI_IF_CTRL_REG, 0x1);
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}
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static inline int orion_spi_wait_till_ready(struct orion_spi *orion_spi)
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{
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int i;
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for (i = 0; i < ORION_SPI_WAIT_RDY_MAX_LOOP; i++) {
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if (readl(spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG)))
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return 1;
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else
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udelay(1);
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}
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return -1;
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}
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static inline int
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orion_spi_write_read_8bit(struct spi_device *spi,
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const u8 **tx_buf, u8 **rx_buf)
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{
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void __iomem *tx_reg, *rx_reg, *int_reg;
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struct orion_spi *orion_spi;
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orion_spi = spi_master_get_devdata(spi->master);
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tx_reg = spi_reg(orion_spi, ORION_SPI_DATA_OUT_REG);
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rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG);
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int_reg = spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG);
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/* clear the interrupt cause register */
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writel(0x0, int_reg);
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if (tx_buf && *tx_buf)
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writel(*(*tx_buf)++, tx_reg);
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else
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writel(0, tx_reg);
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if (orion_spi_wait_till_ready(orion_spi) < 0) {
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dev_err(&spi->dev, "TXS timed out\n");
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return -1;
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}
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if (rx_buf && *rx_buf)
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*(*rx_buf)++ = readl(rx_reg);
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return 1;
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}
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static inline int
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orion_spi_write_read_16bit(struct spi_device *spi,
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const u16 **tx_buf, u16 **rx_buf)
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{
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void __iomem *tx_reg, *rx_reg, *int_reg;
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struct orion_spi *orion_spi;
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orion_spi = spi_master_get_devdata(spi->master);
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tx_reg = spi_reg(orion_spi, ORION_SPI_DATA_OUT_REG);
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rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG);
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int_reg = spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG);
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/* clear the interrupt cause register */
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writel(0x0, int_reg);
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if (tx_buf && *tx_buf)
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writel(__cpu_to_le16(get_unaligned((*tx_buf)++)), tx_reg);
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else
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writel(0, tx_reg);
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if (orion_spi_wait_till_ready(orion_spi) < 0) {
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dev_err(&spi->dev, "TXS timed out\n");
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return -1;
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}
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if (rx_buf && *rx_buf)
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put_unaligned(__le16_to_cpu(readl(rx_reg)), (*rx_buf)++);
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return 1;
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}
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static unsigned int
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orion_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer)
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{
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struct orion_spi *orion_spi;
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unsigned int count;
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int word_len;
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orion_spi = spi_master_get_devdata(spi->master);
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word_len = spi->bits_per_word;
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count = xfer->len;
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if (word_len == 8) {
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const u8 *tx = xfer->tx_buf;
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u8 *rx = xfer->rx_buf;
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do {
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if (orion_spi_write_read_8bit(spi, &tx, &rx) < 0)
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goto out;
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count--;
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} while (count);
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} else if (word_len == 16) {
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const u16 *tx = xfer->tx_buf;
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u16 *rx = xfer->rx_buf;
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do {
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if (orion_spi_write_read_16bit(spi, &tx, &rx) < 0)
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goto out;
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count -= 2;
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} while (count);
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}
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out:
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return xfer->len - count;
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}
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static void orion_spi_work(struct work_struct *work)
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{
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struct orion_spi *orion_spi =
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container_of(work, struct orion_spi, work);
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spin_lock_irq(&orion_spi->lock);
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while (!list_empty(&orion_spi->msg_queue)) {
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struct spi_message *m;
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struct spi_device *spi;
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struct spi_transfer *t = NULL;
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int par_override = 0;
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int status = 0;
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int cs_active = 0;
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m = container_of(orion_spi->msg_queue.next, struct spi_message,
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queue);
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list_del_init(&m->queue);
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spin_unlock_irq(&orion_spi->lock);
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spi = m->spi;
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/* Load defaults */
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status = orion_spi_setup_transfer(spi, NULL);
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if (status < 0)
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goto msg_done;
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list_for_each_entry(t, &m->transfers, transfer_list) {
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if (par_override || t->speed_hz || t->bits_per_word) {
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par_override = 1;
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status = orion_spi_setup_transfer(spi, t);
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if (status < 0)
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break;
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if (!t->speed_hz && !t->bits_per_word)
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par_override = 0;
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}
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if (!cs_active) {
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orion_spi_set_cs(orion_spi, 1);
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cs_active = 1;
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}
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if (t->len)
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m->actual_length +=
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orion_spi_write_read(spi, t);
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if (t->delay_usecs)
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udelay(t->delay_usecs);
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if (t->cs_change) {
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orion_spi_set_cs(orion_spi, 0);
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cs_active = 0;
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}
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}
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msg_done:
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if (cs_active)
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orion_spi_set_cs(orion_spi, 0);
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m->status = status;
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m->complete(m->context);
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spin_lock_irq(&orion_spi->lock);
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}
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spin_unlock_irq(&orion_spi->lock);
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}
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static int __init orion_spi_reset(struct orion_spi *orion_spi)
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{
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/* Verify that the CS is deasserted */
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orion_spi_set_cs(orion_spi, 0);
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return 0;
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}
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static int orion_spi_setup(struct spi_device *spi)
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{
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struct orion_spi *orion_spi;
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orion_spi = spi_master_get_devdata(spi->master);
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if (spi->mode) {
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dev_err(&spi->dev, "setup: unsupported mode bits %x\n",
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spi->mode);
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return -EINVAL;
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}
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if (spi->bits_per_word == 0)
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spi->bits_per_word = 8;
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if ((spi->max_speed_hz == 0)
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|| (spi->max_speed_hz > orion_spi->max_speed))
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spi->max_speed_hz = orion_spi->max_speed;
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if (spi->max_speed_hz < orion_spi->min_speed) {
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dev_err(&spi->dev, "setup: requested speed too low %d Hz\n",
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spi->max_speed_hz);
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return -EINVAL;
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}
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/*
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* baudrate & width will be set orion_spi_setup_transfer
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*/
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return 0;
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}
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static int orion_spi_transfer(struct spi_device *spi, struct spi_message *m)
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{
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struct orion_spi *orion_spi;
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struct spi_transfer *t = NULL;
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unsigned long flags;
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m->actual_length = 0;
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m->status = 0;
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/* reject invalid messages and transfers */
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if (list_empty(&m->transfers) || !m->complete)
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return -EINVAL;
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orion_spi = spi_master_get_devdata(spi->master);
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list_for_each_entry(t, &m->transfers, transfer_list) {
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unsigned int bits_per_word = spi->bits_per_word;
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if (t->tx_buf == NULL && t->rx_buf == NULL && t->len) {
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dev_err(&spi->dev,
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"message rejected : "
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"invalid transfer data buffers\n");
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goto msg_rejected;
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}
|
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if ((t != NULL) && t->bits_per_word)
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bits_per_word = t->bits_per_word;
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if ((bits_per_word != 8) && (bits_per_word != 16)) {
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dev_err(&spi->dev,
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"message rejected : "
|
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"invalid transfer bits_per_word (%d bits)\n",
|
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bits_per_word);
|
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goto msg_rejected;
|
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}
|
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/*make sure buffer length is even when working in 16 bit mode*/
|
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if ((t != NULL) && (t->bits_per_word == 16) && (t->len & 1)) {
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dev_err(&spi->dev,
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"message rejected : "
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"odd data length (%d) while in 16 bit mode\n",
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t->len);
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goto msg_rejected;
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}
|
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if (t->speed_hz < orion_spi->min_speed) {
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dev_err(&spi->dev,
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"message rejected : "
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"device min speed (%d Hz) exceeds "
|
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"required transfer speed (%d Hz)\n",
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orion_spi->min_speed, t->speed_hz);
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goto msg_rejected;
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}
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}
|
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spin_lock_irqsave(&orion_spi->lock, flags);
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list_add_tail(&m->queue, &orion_spi->msg_queue);
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queue_work(orion_spi_wq, &orion_spi->work);
|
||||
spin_unlock_irqrestore(&orion_spi->lock, flags);
|
||||
|
||||
return 0;
|
||||
msg_rejected:
|
||||
/* Message rejected and not queued */
|
||||
m->status = -EINVAL;
|
||||
if (m->complete)
|
||||
m->complete(m->context);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
static int __init orion_spi_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct spi_master *master;
|
||||
struct orion_spi *spi;
|
||||
struct resource *r;
|
||||
struct orion_spi_info *spi_info;
|
||||
int status = 0;
|
||||
|
||||
spi_info = pdev->dev.platform_data;
|
||||
|
||||
master = spi_alloc_master(&pdev->dev, sizeof *spi);
|
||||
if (master == NULL) {
|
||||
dev_dbg(&pdev->dev, "master allocation failed\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
if (pdev->id != -1)
|
||||
master->bus_num = pdev->id;
|
||||
|
||||
master->setup = orion_spi_setup;
|
||||
master->transfer = orion_spi_transfer;
|
||||
master->num_chipselect = ORION_NUM_CHIPSELECTS;
|
||||
|
||||
dev_set_drvdata(&pdev->dev, master);
|
||||
|
||||
spi = spi_master_get_devdata(master);
|
||||
spi->master = master;
|
||||
spi->spi_info = spi_info;
|
||||
|
||||
spi->max_speed = DIV_ROUND_UP(spi_info->tclk, 4);
|
||||
spi->min_speed = DIV_ROUND_UP(spi_info->tclk, 30);
|
||||
|
||||
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (r == NULL) {
|
||||
status = -ENODEV;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (!request_mem_region(r->start, (r->end - r->start) + 1,
|
||||
pdev->dev.bus_id)) {
|
||||
status = -EBUSY;
|
||||
goto out;
|
||||
}
|
||||
spi->base = ioremap(r->start, SZ_1K);
|
||||
|
||||
INIT_WORK(&spi->work, orion_spi_work);
|
||||
|
||||
spin_lock_init(&spi->lock);
|
||||
INIT_LIST_HEAD(&spi->msg_queue);
|
||||
|
||||
if (orion_spi_reset(spi) < 0)
|
||||
goto out_rel_mem;
|
||||
|
||||
status = spi_register_master(master);
|
||||
if (status < 0)
|
||||
goto out_rel_mem;
|
||||
|
||||
return status;
|
||||
|
||||
out_rel_mem:
|
||||
release_mem_region(r->start, (r->end - r->start) + 1);
|
||||
|
||||
out:
|
||||
spi_master_put(master);
|
||||
return status;
|
||||
}
|
||||
|
||||
|
||||
static int __exit orion_spi_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct spi_master *master;
|
||||
struct orion_spi *spi;
|
||||
struct resource *r;
|
||||
|
||||
master = dev_get_drvdata(&pdev->dev);
|
||||
spi = spi_master_get_devdata(master);
|
||||
|
||||
cancel_work_sync(&spi->work);
|
||||
|
||||
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
release_mem_region(r->start, (r->end - r->start) + 1);
|
||||
|
||||
spi_unregister_master(master);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
MODULE_ALIAS("platform:" DRIVER_NAME);
|
||||
|
||||
static struct platform_driver orion_spi_driver = {
|
||||
.driver = {
|
||||
.name = DRIVER_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
.remove = __exit_p(orion_spi_remove),
|
||||
};
|
||||
|
||||
static int __init orion_spi_init(void)
|
||||
{
|
||||
orion_spi_wq = create_singlethread_workqueue(
|
||||
orion_spi_driver.driver.name);
|
||||
if (orion_spi_wq == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
return platform_driver_probe(&orion_spi_driver, orion_spi_probe);
|
||||
}
|
||||
module_init(orion_spi_init);
|
||||
|
||||
static void __exit orion_spi_exit(void)
|
||||
{
|
||||
flush_workqueue(orion_spi_wq);
|
||||
platform_driver_unregister(&orion_spi_driver);
|
||||
|
||||
destroy_workqueue(orion_spi_wq);
|
||||
}
|
||||
module_exit(orion_spi_exit);
|
||||
|
||||
MODULE_DESCRIPTION("Orion SPI driver");
|
||||
MODULE_AUTHOR("Shadi Ammouri <shadi@marvell.com>");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
/*
|
||||
* orion_spi.h
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without any
|
||||
* warranty of any kind, whether express or implied.
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_SPI_ORION_SPI_H
|
||||
#define __LINUX_SPI_ORION_SPI_H
|
||||
|
||||
struct orion_spi_info {
|
||||
u32 tclk; /* no <linux/clk.h> support yet */
|
||||
};
|
||||
|
||||
|
||||
#endif
|
||||
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