pinctrl: tegra: Add complete device tree support
Implement pinctrl_ops dt_node_to_map() and dt_free_map(). These allow complete specification of the desired pinmux configuration using device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Родитель
a3c9454e53
Коммит
60f7f5003d
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@ -23,9 +23,11 @@
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/slab.h>
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#include <mach/pinconf-tegra.h>
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@ -88,11 +90,214 @@ static void tegra_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
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seq_printf(s, " " DRIVER_NAME);
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}
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static int reserve_map(struct pinctrl_map **map, unsigned *reserved_maps,
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unsigned *num_maps, unsigned reserve)
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{
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unsigned old_num = *reserved_maps;
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unsigned new_num = *num_maps + reserve;
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struct pinctrl_map *new_map;
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if (old_num >= new_num)
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return 0;
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new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL);
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if (!new_map)
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return -ENOMEM;
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memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map));
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*map = new_map;
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*reserved_maps = new_num;
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return 0;
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}
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static int add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps,
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unsigned *num_maps, const char *group,
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const char *function)
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{
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if (*num_maps == *reserved_maps)
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return -ENOSPC;
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(*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
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(*map)[*num_maps].data.mux.group = group;
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(*map)[*num_maps].data.mux.function = function;
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(*num_maps)++;
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return 0;
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}
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static int add_map_configs(struct pinctrl_map **map, unsigned *reserved_maps,
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unsigned *num_maps, const char *group,
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unsigned long *configs, unsigned num_configs)
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{
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unsigned long *dup_configs;
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if (*num_maps == *reserved_maps)
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return -ENOSPC;
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dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
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GFP_KERNEL);
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if (!dup_configs)
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return -ENOMEM;
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(*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_GROUP;
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(*map)[*num_maps].data.configs.group_or_pin = group;
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(*map)[*num_maps].data.configs.configs = dup_configs;
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(*map)[*num_maps].data.configs.num_configs = num_configs;
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(*num_maps)++;
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return 0;
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}
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static int add_config(unsigned long **configs, unsigned *num_configs,
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unsigned long config)
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{
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unsigned old_num = *num_configs;
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unsigned new_num = old_num + 1;
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unsigned long *new_configs;
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new_configs = krealloc(*configs, sizeof(*new_configs) * new_num,
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GFP_KERNEL);
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if (!new_configs)
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return -ENOMEM;
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new_configs[old_num] = config;
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*configs = new_configs;
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*num_configs = new_num;
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return 0;
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}
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void tegra_pinctrl_dt_free_map(struct pinctrl_dev *pctldev,
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struct pinctrl_map *map, unsigned num_maps)
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{
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int i;
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for (i = 0; i < num_maps; i++)
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if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
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kfree(map[i].data.configs.configs);
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kfree(map);
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}
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static const struct cfg_param {
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const char *property;
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enum tegra_pinconf_param param;
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} cfg_params[] = {
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{"nvidia,pull", TEGRA_PINCONF_PARAM_PULL},
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{"nvidia,tristate", TEGRA_PINCONF_PARAM_TRISTATE},
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{"nvidia,enable-input", TEGRA_PINCONF_PARAM_ENABLE_INPUT},
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{"nvidia,open-drain", TEGRA_PINCONF_PARAM_OPEN_DRAIN},
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{"nvidia,lock", TEGRA_PINCONF_PARAM_LOCK},
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{"nvidia,io-reset", TEGRA_PINCONF_PARAM_IORESET},
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{"nvidia,high-speed-mode", TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE},
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{"nvidia,schmitt", TEGRA_PINCONF_PARAM_SCHMITT},
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{"nvidia,low-power-mode", TEGRA_PINCONF_PARAM_LOW_POWER_MODE},
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{"nvidia,pull-down-strength", TEGRA_PINCONF_PARAM_DRIVE_DOWN_STRENGTH},
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{"nvidia,pull-up-strength", TEGRA_PINCONF_PARAM_DRIVE_UP_STRENGTH},
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{"nvidia,slew-rate-falling", TEGRA_PINCONF_PARAM_SLEW_RATE_FALLING},
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{"nvidia,slew-rate-rising", TEGRA_PINCONF_PARAM_SLEW_RATE_RISING},
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};
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int tegra_pinctrl_dt_subnode_to_map(struct device_node *np,
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struct pinctrl_map **map,
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unsigned *reserved_maps,
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unsigned *num_maps)
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{
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int ret, i;
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const char *function;
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u32 val;
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unsigned long config;
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unsigned long *configs = NULL;
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unsigned num_configs = 0;
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unsigned reserve;
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struct property *prop;
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const char *group;
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ret = of_property_read_string(np, "nvidia,function", &function);
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if (ret < 0)
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function = NULL;
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for (i = 0; i < ARRAY_SIZE(cfg_params); i++) {
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ret = of_property_read_u32(np, cfg_params[i].property, &val);
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if (!ret) {
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config = TEGRA_PINCONF_PACK(cfg_params[i].param, val);
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ret = add_config(&configs, &num_configs, config);
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if (ret < 0)
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goto exit;
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}
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}
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reserve = 0;
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if (function != NULL)
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reserve++;
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if (num_configs)
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reserve++;
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ret = of_property_count_strings(np, "nvidia,pins");
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if (ret < 0)
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goto exit;
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reserve *= ret;
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ret = reserve_map(map, reserved_maps, num_maps, reserve);
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if (ret < 0)
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goto exit;
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of_property_for_each_string(np, "nvidia,pins", prop, group) {
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if (function) {
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ret = add_map_mux(map, reserved_maps, num_maps,
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group, function);
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if (ret < 0)
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goto exit;
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}
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if (num_configs) {
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ret = add_map_configs(map, reserved_maps, num_maps,
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group, configs, num_configs);
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if (ret < 0)
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goto exit;
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}
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}
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ret = 0;
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exit:
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kfree(configs);
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return ret;
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}
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int tegra_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
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struct device_node *np_config,
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struct pinctrl_map **map, unsigned *num_maps)
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{
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unsigned reserved_maps;
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struct device_node *np;
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int ret;
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reserved_maps = 0;
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*map = NULL;
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*num_maps = 0;
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for_each_child_of_node(np_config, np) {
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ret = tegra_pinctrl_dt_subnode_to_map(np, map, &reserved_maps,
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num_maps);
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if (ret < 0) {
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tegra_pinctrl_dt_free_map(pctldev, *map, *num_maps);
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return ret;
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}
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}
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return 0;
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}
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static struct pinctrl_ops tegra_pinctrl_ops = {
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.get_groups_count = tegra_pinctrl_get_groups_count,
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.get_group_name = tegra_pinctrl_get_group_name,
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.get_group_pins = tegra_pinctrl_get_group_pins,
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.pin_dbg_show = tegra_pinctrl_pin_dbg_show,
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.dt_node_to_map = tegra_pinctrl_dt_node_to_map,
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.dt_free_map = tegra_pinctrl_dt_free_map,
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};
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static int tegra_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
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