[PATCH] x86_64: avoid some atomic operations during address space destruction
Any architecture that has hardware updated A/D bits that require synchronization against other processors during PTE operations can benefit from doing non-atomic PTE updates during address space destruction. Originally done on i386, now ported to x86_64. Doing a read/write pair instead of an xchg() operation saves the implicit lock, which turns out to be a big win on 32-bit (esp w PAE). Signed-off-by: Zachary Amsden <zach@vmware.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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a600388d28
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61e06037e7
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@ -104,6 +104,19 @@ extern inline void pgd_clear (pgd_t * pgd)
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((unsigned long) __va(pud_val(pud) & PHYSICAL_PAGE_MASK))
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((unsigned long) __va(pud_val(pud) & PHYSICAL_PAGE_MASK))
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#define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte, 0))
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#define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte, 0))
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static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full)
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{
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pte_t pte;
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if (full) {
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pte = *ptep;
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*ptep = __pte(0);
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} else {
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pte = ptep_get_and_clear(mm, addr, ptep);
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}
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return pte;
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}
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#define pte_same(a, b) ((a).pte == (b).pte)
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#define pte_same(a, b) ((a).pte == (b).pte)
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#define PMD_SIZE (1UL << PMD_SHIFT)
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#define PMD_SIZE (1UL << PMD_SHIFT)
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@ -434,6 +447,7 @@ extern int kern_addr_valid(unsigned long addr);
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#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
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#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
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#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
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#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
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#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
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#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
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#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
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#define __HAVE_ARCH_PTEP_SET_WRPROTECT
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#define __HAVE_ARCH_PTEP_SET_WRPROTECT
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#define __HAVE_ARCH_PTE_SAME
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#define __HAVE_ARCH_PTE_SAME
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#include <asm-generic/pgtable.h>
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#include <asm-generic/pgtable.h>
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