powerpc/85xx: Add C293PCIE board support
C293PCIE board is a series of Freescale PCIe add-in cards to perform as public key crypto accelerator or secure key management module. - 512KB platform SRAM in addition to 512K L2 Cache/SRAM - 512MB soldered DDR3 32bit memory - CPLD System Logic - 64MB x16 NOR flash and 4GB x8 NAND flash - 16MB SPI flash Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Po Liu <Po.Liu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
This commit is contained in:
Mingkai Hu
Scott Wood
Родитель
2c2f036afe
Коммит
622e03eb34
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@ -0,0 +1,223 @@
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/*
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* C293 PCIE Device Tree Source
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*
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* Copyright 2013 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/include/ "fsl/c293si-pre.dtsi"
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/ {
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model = "fsl,C293PCIE";
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compatible = "fsl,C293PCIE";
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memory {
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device_type = "memory";
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};
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ifc: ifc@fffe1e000 {
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reg = <0xf 0xffe1e000 0 0x2000>;
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ranges = <0x0 0x0 0xf 0xec000000 0x04000000
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0x2 0x0 0xf 0xffdf0000 0x00010000>;
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};
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soc: soc@fffe00000 {
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ranges = <0x0 0xf 0xffe00000 0x100000>;
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};
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pci0: pcie@fffe0a000 {
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reg = <0xf 0xffe0a000 0 0x1000>;
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ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
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pcie@0 {
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ranges = <0x2000000 0x0 0x80000000
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0x2000000 0x0 0x80000000
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0x0 0x20000000
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0x1000000 0x0 0x0
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0x1000000 0x0 0x0
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0x0 0x100000>;
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};
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};
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};
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&ifc {
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nor@0,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x4000000>;
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bank-width = <2>;
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device-width = <1>;
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partition@0 {
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/* 1MB for DTB Image */
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reg = <0x0 0x00100000>;
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label = "NOR DTB Image";
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};
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partition@100000 {
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/* 8 MB for Linux Kernel Image */
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reg = <0x00100000 0x00800000>;
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label = "NOR Linux Kernel Image";
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};
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partition@900000 {
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/* 53MB for rootfs */
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reg = <0x00900000 0x03500000>;
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label = "NOR Rootfs Image";
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};
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partition@3e00000 {
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/* 1MB for blob encrypted key */
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reg = <0x03e00000 0x00100000>;
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label = "NOR blob encrypted key";
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};
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partition@3f00000 {
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/* 512KB for u-boot Bootloader Image and evn */
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reg = <0x03f00000 0x00100000>;
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label = "NOR U-Boot Image";
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read-only;
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};
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};
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nand@1,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,ifc-nand";
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reg = <0x1 0x0 0x10000>;
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partition@0 {
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/* This location must not be altered */
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/* 1MB for u-boot Bootloader Image */
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reg = <0x0 0x00100000>;
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label = "NAND U-Boot Image";
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read-only;
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};
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partition@100000 {
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/* 1MB for DTB Image */
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reg = <0x00100000 0x00100000>;
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label = "NAND DTB Image";
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};
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partition@200000 {
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/* 16MB for Linux Kernel Image */
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reg = <0x00200000 0x01000000>;
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label = "NAND Linux Kernel Image";
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};
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partition@1200000 {
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/* 4078MB for Root file System Image */
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reg = <0x00600000 0xfee00000>;
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label = "NAND RFS Image";
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};
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};
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cpld@2,0 {
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compatible = "fsl,c293pcie-cpld";
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reg = <0x2 0x0 0x20>;
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};
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};
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&soc {
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i2c@3000 {
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eeprom@50 {
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compatible = "st,24c1024";
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reg = <0x50>;
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};
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adt7461@4c {
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compatible = "adi,adt7461";
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reg = <0x4c>;
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};
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};
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spi@7000 {
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spansion,s25sl12801";
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reg = <0>;
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spi-max-frequency = <50000000>;
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partition@0 {
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/* 1MB for u-boot Bootloader Image */
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/* 1MB for Environment */
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reg = <0x0 0x00100000>;
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label = "SPI Flash U-Boot Image";
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read-only;
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};
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partition@100000 {
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/* 512KB for DTB Image */
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reg = <0x00100000 0x00080000>;
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label = "SPI Flash DTB Image";
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};
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partition@180000 {
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/* 4MB for Linux Kernel Image */
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reg = <0x00180000 0x00400000>;
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label = "SPI Flash Linux Kernel Image";
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};
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partition@580000 {
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/* 10.5MB for RFS Image */
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reg = <0x00580000 0x00a80000>;
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label = "SPI Flash RFS Image";
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};
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};
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};
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mdio@24000 {
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phy0: ethernet-phy@0 {
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interrupts = <2 1 0 0>;
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reg = <0x0>;
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};
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phy1: ethernet-phy@1 {
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interrupts = <2 1 0 0>;
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reg = <0x2>;
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};
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};
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enet0: ethernet@b0000 {
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phy-handle = <&phy0>;
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phy-connection-type = "rgmii-id";
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};
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enet1: ethernet@b1000 {
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phy-handle = <&phy1>;
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phy-connection-type = "rgmii-id";
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};
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};
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/include/ "fsl/c293si-post.dtsi"
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@ -27,6 +27,7 @@ CONFIG_MPC85xx_MDS=y
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CONFIG_MPC8536_DS=y
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CONFIG_MPC85xx_DS=y
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CONFIG_MPC85xx_RDB=y
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CONFIG_C293_PCIE=y
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CONFIG_P1010_RDB=y
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CONFIG_P1022_DS=y
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CONFIG_P1022_RDK=y
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@ -30,6 +30,7 @@ CONFIG_MPC85xx_MDS=y
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CONFIG_MPC8536_DS=y
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CONFIG_MPC85xx_DS=y
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CONFIG_MPC85xx_RDB=y
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CONFIG_C293_PCIE=y
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CONFIG_P1010_RDB=y
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CONFIG_P1022_DS=y
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CONFIG_P1022_RDK=y
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@ -32,6 +32,12 @@ config BSC9131_RDB
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StarCore SC3850 DSP
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Manufacturer : Freescale Semiconductor, Inc
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config C293_PCIE
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bool "Freescale C293PCIE"
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select DEFAULT_UIMAGE
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help
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This option enables support for the C293PCIE board
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config MPC8540_ADS
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bool "Freescale MPC8540 ADS"
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select DEFAULT_UIMAGE
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@ -6,6 +6,7 @@ obj-$(CONFIG_SMP) += smp.o
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obj-y += common.o
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obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o
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obj-$(CONFIG_C293_PCIE) += c293pcie.o
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obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
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obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
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obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
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@ -0,0 +1,75 @@
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/*
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* C293PCIE Board Setup
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*
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* Copyright 2013 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/of_platform.h>
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#include <asm/machdep.h>
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#include <asm/udbg.h>
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#include <asm/mpic.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include "mpc85xx.h"
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void __init c293_pcie_pic_init(void)
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{
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struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
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MPIC_SINGLE_DEST_CPU, 0, 256, " OpenPIC ");
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BUG_ON(mpic == NULL);
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mpic_init(mpic);
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}
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/*
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* Setup the architecture
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*/
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static void __init c293_pcie_setup_arch(void)
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{
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if (ppc_md.progress)
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ppc_md.progress("c293_pcie_setup_arch()", 0);
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fsl_pci_assign_primary();
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printk(KERN_INFO "C293 PCIE board from Freescale Semiconductor\n");
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}
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machine_arch_initcall(c293_pcie, mpc85xx_common_publish_devices);
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init c293_pcie_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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if (of_flat_dt_is_compatible(root, "fsl,C293PCIE"))
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return 1;
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return 0;
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}
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define_machine(c293_pcie) {
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.name = "C293 PCIE",
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.probe = c293_pcie_probe,
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.setup_arch = c293_pcie_setup_arch,
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.init_IRQ = c293_pcie_pic_init,
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#ifdef CONFIG_PCI
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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#endif
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.get_irq = mpic_get_irq,
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.restart = fsl_rstcr_restart,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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