spi: pxa2xx: Use LPSS prefix for defines that are Intel LPSS specific
Rename a few defines that are specific to Intel LPSS SPI private registers with LPSS prefix. It makes easier to distinguish them from common defines. Suggested-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -61,9 +61,9 @@ MODULE_ALIAS("platform:pxa2xx-spi");
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| QUARK_X1000_SSCR1_TFT \
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| SSCR1_SPH | SSCR1_SPO | SSCR1_LBM)
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#define GENERAL_REG_RXTO_HOLDOFF_DISABLE BIT(24)
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#define SPI_CS_CONTROL_SW_MODE BIT(0)
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#define SPI_CS_CONTROL_CS_HIGH BIT(1)
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#define LPSS_GENERAL_REG_RXTO_HOLDOFF_DISABLE BIT(24)
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#define LPSS_CS_CONTROL_SW_MODE BIT(0)
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#define LPSS_CS_CONTROL_CS_HIGH BIT(1)
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struct lpss_config {
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/* LPSS offset from drv_data->ioaddr */
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@ -250,8 +250,8 @@ static void lpss_ssp_setup(struct driver_data *drv_data)
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/* Enable software chip select control */
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value = __lpss_ssp_read_priv(drv_data, config->reg_cs_ctrl);
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value &= ~(SPI_CS_CONTROL_SW_MODE | SPI_CS_CONTROL_CS_HIGH);
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value |= SPI_CS_CONTROL_SW_MODE | SPI_CS_CONTROL_CS_HIGH;
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value &= ~(LPSS_CS_CONTROL_SW_MODE | LPSS_CS_CONTROL_CS_HIGH);
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value |= LPSS_CS_CONTROL_SW_MODE | LPSS_CS_CONTROL_CS_HIGH;
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__lpss_ssp_write_priv(drv_data, config->reg_cs_ctrl, value);
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/* Enable multiblock DMA transfers */
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@ -261,7 +261,7 @@ static void lpss_ssp_setup(struct driver_data *drv_data)
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if (config->reg_general >= 0) {
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value = __lpss_ssp_read_priv(drv_data,
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config->reg_general);
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value |= GENERAL_REG_RXTO_HOLDOFF_DISABLE;
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value |= LPSS_GENERAL_REG_RXTO_HOLDOFF_DISABLE;
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__lpss_ssp_write_priv(drv_data,
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config->reg_general, value);
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}
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@ -277,9 +277,9 @@ static void lpss_ssp_cs_control(struct driver_data *drv_data, bool enable)
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value = __lpss_ssp_read_priv(drv_data, config->reg_cs_ctrl);
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if (enable)
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value &= ~SPI_CS_CONTROL_CS_HIGH;
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value &= ~LPSS_CS_CONTROL_CS_HIGH;
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else
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value |= SPI_CS_CONTROL_CS_HIGH;
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value |= LPSS_CS_CONTROL_CS_HIGH;
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__lpss_ssp_write_priv(drv_data, config->reg_cs_ctrl, value);
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}
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