dmaengine: imx-sdma: use platform_device_id to identify sdma version
It might be not good to use software defined version to identify sdma device type, when hardware does not define such version. Instead, soc name is stable enough to define the device type. The patch uses platform_device_id rather than version number passed by platform data to identify sdma device type/version. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Vinod Koul <vinod.koul@intel.com>
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abfafc2d10
Коммит
62550cd7c0
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@ -308,7 +308,8 @@ static struct clk_lookup lookups[] = {
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_REGISTER_CLOCK(NULL, "audmux", audmux_clk)
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_REGISTER_CLOCK("flexcan.0", NULL, can1_clk)
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_REGISTER_CLOCK("flexcan.1", NULL, can2_clk)
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_REGISTER_CLOCK("imx-sdma", NULL, sdma_clk)
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/* i.mx25 has the i.mx35 type sdma */
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_REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)
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};
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int __init mx25_clocks_init(void)
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@ -565,7 +565,7 @@ static struct clk_lookup lookups[] = {
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_REGISTER_CLOCK(NULL, "ata", ata_clk)
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_REGISTER_CLOCK(NULL, "rtic", rtic_clk)
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_REGISTER_CLOCK(NULL, "rng", rng_clk)
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_REGISTER_CLOCK("imx-sdma", NULL, sdma_clk1)
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_REGISTER_CLOCK("imx31-sdma", NULL, sdma_clk1)
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_REGISTER_CLOCK(NULL, "sdma_ipg", sdma_clk2)
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_REGISTER_CLOCK(NULL, "mstick", mstick1_clk)
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_REGISTER_CLOCK(NULL, "mstick", mstick2_clk)
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@ -482,7 +482,7 @@ static struct clk_lookup lookups[] = {
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_REGISTER_CLOCK(NULL, "rtc", rtc_clk)
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_REGISTER_CLOCK(NULL, "rtic", rtic_clk)
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_REGISTER_CLOCK(NULL, "scc", scc_clk)
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_REGISTER_CLOCK("imx-sdma", NULL, sdma_clk)
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_REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)
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_REGISTER_CLOCK(NULL, "spba", spba_clk)
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_REGISTER_CLOCK(NULL, "spdif", spdif_clk)
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_REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
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@ -79,7 +79,6 @@ static struct sdma_script_start_addrs imx25_sdma_script __initdata = {
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};
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static struct sdma_platform_data imx25_sdma_pdata __initdata = {
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.sdma_version = 2,
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.fw_name = "sdma-imx25.bin",
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.script_addrs = &imx25_sdma_script,
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};
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@ -92,5 +91,6 @@ void __init imx25_soc_init(void)
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mxc_register_gpio("imx31-gpio", 2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0);
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mxc_register_gpio("imx31-gpio", 3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0);
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imx_add_imx_sdma(MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata);
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/* i.mx25 has the i.mx35 type sdma */
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imx_add_imx_sdma("imx35-sdma", MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata);
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}
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@ -69,7 +69,6 @@ static struct sdma_script_start_addrs imx31_to2_sdma_script __initdata = {
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};
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static struct sdma_platform_data imx31_sdma_pdata __initdata = {
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.sdma_version = 1,
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.fw_name = "sdma-imx31-to2.bin",
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.script_addrs = &imx31_to2_sdma_script,
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};
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@ -88,5 +87,5 @@ void __init imx31_soc_init(void)
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imx31_sdma_pdata.script_addrs = &imx31_to1_sdma_script;
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}
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imx_add_imx_sdma(MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
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imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
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}
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@ -86,7 +86,6 @@ static struct sdma_script_start_addrs imx35_to2_sdma_script __initdata = {
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};
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static struct sdma_platform_data imx35_sdma_pdata __initdata = {
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.sdma_version = 2,
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.fw_name = "sdma-imx35-to2.bin",
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.script_addrs = &imx35_to2_sdma_script,
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};
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@ -106,5 +105,5 @@ void __init imx35_soc_init(void)
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imx35_sdma_pdata.script_addrs = &imx35_to1_sdma_script;
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}
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imx_add_imx_sdma(MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
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imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
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}
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@ -1448,7 +1448,8 @@ static struct clk_lookup mx51_lookups[] = {
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_REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
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_REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
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_REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk)
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_REGISTER_CLOCK("imx-sdma", NULL, sdma_clk)
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/* i.mx51 has the i.mx35 type sdma */
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_REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)
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_REGISTER_CLOCK(NULL, "ckih", ckih_clk)
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_REGISTER_CLOCK(NULL, "ckih2", ckih2_clk)
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_REGISTER_CLOCK(NULL, "gpt_32k", gpt_32k_clk)
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@ -1496,7 +1497,8 @@ static struct clk_lookup mx53_lookups[] = {
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_REGISTER_CLOCK("sdhci-esdhc-imx53.3", NULL, esdhc4_mx53_clk)
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_REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk)
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_REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk)
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_REGISTER_CLOCK("imx-sdma", NULL, sdma_clk)
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/* i.mx53 has the i.mx35 type sdma */
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_REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)
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_REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
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_REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
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_REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk)
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@ -115,7 +115,6 @@ static struct sdma_script_start_addrs imx51_sdma_script __initdata = {
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};
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static struct sdma_platform_data imx51_sdma_pdata __initdata = {
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.sdma_version = 2,
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.fw_name = "sdma-imx51.bin",
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.script_addrs = &imx51_sdma_script,
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};
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@ -135,7 +134,6 @@ static struct sdma_script_start_addrs imx53_sdma_script __initdata = {
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};
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static struct sdma_platform_data imx53_sdma_pdata __initdata = {
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.sdma_version = 2,
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.fw_name = "sdma-imx53.bin",
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.script_addrs = &imx53_sdma_script,
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};
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@ -148,7 +146,8 @@ void __init imx51_soc_init(void)
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mxc_register_gpio("imx31-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH);
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mxc_register_gpio("imx31-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH);
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imx_add_imx_sdma(MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata);
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/* i.mx51 has the i.mx35 type sdma */
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imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata);
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}
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void __init imx53_soc_init(void)
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@ -162,5 +161,6 @@ void __init imx53_soc_init(void)
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mxc_register_gpio("imx31-gpio", 5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH);
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mxc_register_gpio("imx31-gpio", 6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH);
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imx_add_imx_sdma(MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata);
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/* i.mx53 has the i.mx35 type sdma */
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imx_add_imx_sdma("imx35-sdma", MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata);
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}
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@ -14,7 +14,7 @@ struct platform_device __init __maybe_unused *imx_add_imx_dma(void)
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"imx-dma", -1, NULL, 0, NULL, 0);
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}
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struct platform_device __init __maybe_unused *imx_add_imx_sdma(
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struct platform_device __init __maybe_unused *imx_add_imx_sdma(char *name,
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resource_size_t iobase, int irq, struct sdma_platform_data *pdata)
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{
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struct resource res[] = {
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@ -29,6 +29,6 @@ struct platform_device __init __maybe_unused *imx_add_imx_sdma(
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},
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};
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return platform_device_register_resndata(&mxc_ahb_bus, "imx-sdma",
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return platform_device_register_resndata(&mxc_ahb_bus, name,
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-1, res, ARRAY_SIZE(res), pdata, sizeof(*pdata));
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}
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@ -299,5 +299,5 @@ struct platform_device *__init imx_add_spi_imx(
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const struct spi_imx_master *pdata);
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struct platform_device *imx_add_imx_dma(void);
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struct platform_device *imx_add_imx_sdma(
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struct platform_device *imx_add_imx_sdma(char *name,
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resource_size_t iobase, int irq, struct sdma_platform_data *pdata);
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@ -60,7 +60,8 @@ static inline int imx_dma_is_ipu(struct dma_chan *chan)
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static inline int imx_dma_is_general_purpose(struct dma_chan *chan)
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{
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return !strcmp(dev_name(chan->device->dev), "imx-sdma") ||
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return !strcmp(dev_name(chan->device->dev), "imx31-sdma") ||
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!strcmp(dev_name(chan->device->dev), "imx35-sdma") ||
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!strcmp(dev_name(chan->device->dev), "imx-dma");
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}
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@ -48,12 +48,10 @@ struct sdma_script_start_addrs {
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/**
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* struct sdma_platform_data - platform specific data for SDMA engine
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*
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* @sdma_version The version of this SDMA engine
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* @fw_name The firmware name
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* @script_addrs SDMA scripts addresses in SDMA ROM
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*/
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struct sdma_platform_data {
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int sdma_version;
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char *fw_name;
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struct sdma_script_start_addrs *script_addrs;
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};
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@ -65,8 +65,8 @@
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#define SDMA_ONCE_RTB 0x060
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#define SDMA_XTRIG_CONF1 0x070
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#define SDMA_XTRIG_CONF2 0x074
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#define SDMA_CHNENBL0_V2 0x200
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#define SDMA_CHNENBL0_V1 0x080
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#define SDMA_CHNENBL0_IMX35 0x200
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#define SDMA_CHNENBL0_IMX31 0x080
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#define SDMA_CHNPRI_0 0x100
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/*
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u32 ram_code_size;
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};
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enum sdma_devtype {
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IMX31_SDMA, /* runs on i.mx31 */
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IMX35_SDMA, /* runs on i.mx35 and later */
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};
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struct sdma_engine {
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struct device *dev;
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struct device_dma_parameters dma_parms;
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struct sdma_channel channel[MAX_DMA_CHANNELS];
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struct sdma_channel_control *channel_control;
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void __iomem *regs;
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unsigned int version;
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enum sdma_devtype devtype;
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unsigned int num_events;
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struct sdma_context_data *context;
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dma_addr_t context_phys;
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struct sdma_script_start_addrs *script_addrs;
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};
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static struct platform_device_id sdma_devtypes[] = {
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{
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.name = "imx31-sdma",
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.driver_data = IMX31_SDMA,
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}, {
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.name = "imx35-sdma",
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.driver_data = IMX35_SDMA,
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}, {
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/* sentinel */
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}
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};
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MODULE_DEVICE_TABLE(platform, sdma_devtypes);
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#define SDMA_H_CONFIG_DSPDMA (1 << 12) /* indicates if the DSPDMA is used */
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#define SDMA_H_CONFIG_RTD_PINS (1 << 11) /* indicates if Real-Time Debug pins are enabled */
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#define SDMA_H_CONFIG_ACR (1 << 4) /* indicates if AHB freq /core freq = 2 or 1 */
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@ -321,8 +339,8 @@ struct sdma_engine {
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static inline u32 chnenbl_ofs(struct sdma_engine *sdma, unsigned int event)
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{
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u32 chnenbl0 = (sdma->version == 2 ? SDMA_CHNENBL0_V2 : SDMA_CHNENBL0_V1);
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u32 chnenbl0 = (sdma->devtype == IMX31_SDMA ? SDMA_CHNENBL0_IMX31 :
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SDMA_CHNENBL0_IMX35);
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return chnenbl0 + event * 4;
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}
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@ -1162,15 +1180,16 @@ static int __init sdma_init(struct sdma_engine *sdma)
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int i, ret;
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dma_addr_t ccb_phys;
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switch (sdma->version) {
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case 1:
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switch (sdma->devtype) {
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case IMX31_SDMA:
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sdma->num_events = 32;
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break;
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case 2:
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case IMX35_SDMA:
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sdma->num_events = 48;
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break;
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default:
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dev_err(sdma->dev, "Unknown version %d. aborting\n", sdma->version);
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dev_err(sdma->dev, "Unknown sdma type %d. aborting\n",
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sdma->devtype);
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return -ENODEV;
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}
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@ -1284,7 +1303,7 @@ static int __init sdma_probe(struct platform_device *pdev)
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if (!sdma->script_addrs)
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goto err_alloc;
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sdma->version = pdata->sdma_version;
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sdma->devtype = pdev->id_entry->driver_data;
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dma_cap_set(DMA_SLAVE, sdma->dma_device.cap_mask);
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dma_cap_set(DMA_CYCLIC, sdma->dma_device.cap_mask);
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@ -1366,6 +1385,7 @@ static struct platform_driver sdma_driver = {
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.driver = {
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.name = "imx-sdma",
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},
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.id_table = sdma_devtypes,
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.remove = __exit_p(sdma_remove),
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};
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