spi/ep93xx: add DMA support
This patch adds DMA support for the EP93xx SPI driver. By default the DMA is not enabled but it can be enabled by setting ep93xx_spi_info.use_dma to true in board configuration file. Note that the SPI driver still uses PIO for small transfers (<= 8 bytes) for performance reasons. Signed-off-by: Mika Westerberg <mika.westerberg@iki.fi> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This commit is contained in:
Mika Westerberg
Grant Likely
Родитель
71cebd7002
Коммит
626a96db11
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@ -88,6 +88,16 @@ static void __init ts72xx_init_machine(void)
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ARRAY_SIZE(ts72xx_spi_devices));
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}
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The driver can use DMA for the transfers also. In this case ts72xx_spi_info
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becomes:
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static struct ep93xx_spi_info ts72xx_spi_info = {
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.num_chipselect = ARRAY_SIZE(ts72xx_spi_devices),
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.use_dma = true;
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};
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Note that CONFIG_EP93XX_DMA should be enabled as well.
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Thanks to
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=========
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Martin Guy, H. Hartley Sweeten and others who helped me during development of
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@ -488,11 +488,15 @@ static struct resource ep93xx_spi_resources[] = {
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},
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};
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static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
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static struct platform_device ep93xx_spi_device = {
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.name = "ep93xx-spi",
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.id = 0,
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.dev = {
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.platform_data = &ep93xx_spi_master_data,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.dma_mask = &ep93xx_spi_dma_mask,
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},
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.num_resources = ARRAY_SIZE(ep93xx_spi_resources),
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.resource = ep93xx_spi_resources,
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@ -7,9 +7,11 @@ struct spi_device;
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* struct ep93xx_spi_info - EP93xx specific SPI descriptor
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* @num_chipselect: number of chip selects on this board, must be
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* at least one
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* @use_dma: use DMA for the transfers
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*/
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struct ep93xx_spi_info {
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int num_chipselect;
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bool use_dma;
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};
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/**
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@ -1,7 +1,7 @@
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/*
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* Driver for Cirrus Logic EP93xx SPI controller.
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*
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* Copyright (c) 2010 Mika Westerberg
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* Copyright (C) 2010-2011 Mika Westerberg
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*
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* Explicit FIFO handling code was inspired by amba-pl022 driver.
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*
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@ -21,13 +21,16 @@
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#include <linux/err.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/dmaengine.h>
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#include <linux/bitops.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/workqueue.h>
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#include <linux/sched.h>
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#include <linux/scatterlist.h>
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#include <linux/spi/spi.h>
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#include <mach/dma.h>
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#include <mach/ep93xx_spi.h>
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#define SSPCR0 0x0000
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@ -71,6 +74,7 @@
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* @pdev: pointer to platform device
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* @clk: clock for the controller
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* @regs_base: pointer to ioremap()'d registers
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* @sspdr_phys: physical address of the SSPDR register
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* @irq: IRQ number used by the driver
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* @min_rate: minimum clock rate (in Hz) supported by the controller
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* @max_rate: maximum clock rate (in Hz) supported by the controller
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@ -84,6 +88,14 @@
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* @rx: current byte in transfer to receive
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* @fifo_level: how full is FIFO (%0..%SPI_FIFO_SIZE - %1). Receiving one
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* frame decreases this level and sending one frame increases it.
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* @dma_rx: RX DMA channel
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* @dma_tx: TX DMA channel
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* @dma_rx_data: RX parameters passed to the DMA engine
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* @dma_tx_data: TX parameters passed to the DMA engine
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* @rx_sgt: sg table for RX transfers
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* @tx_sgt: sg table for TX transfers
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* @zeropage: dummy page used as RX buffer when only TX buffer is passed in by
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* the client
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*
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* This structure holds EP93xx SPI controller specific information. When
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* @running is %true, driver accepts transfer requests from protocol drivers.
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@ -100,6 +112,7 @@ struct ep93xx_spi {
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const struct platform_device *pdev;
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struct clk *clk;
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void __iomem *regs_base;
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unsigned long sspdr_phys;
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int irq;
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unsigned long min_rate;
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unsigned long max_rate;
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@ -112,6 +125,13 @@ struct ep93xx_spi {
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size_t tx;
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size_t rx;
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size_t fifo_level;
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struct dma_chan *dma_rx;
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struct dma_chan *dma_tx;
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struct ep93xx_dma_data dma_rx_data;
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struct ep93xx_dma_data dma_tx_data;
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struct sg_table rx_sgt;
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struct sg_table tx_sgt;
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void *zeropage;
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};
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/**
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@ -496,14 +516,195 @@ static int ep93xx_spi_read_write(struct ep93xx_spi *espi)
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espi->fifo_level++;
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}
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if (espi->rx == t->len) {
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msg->actual_length += t->len;
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if (espi->rx == t->len)
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return 0;
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}
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return -EINPROGRESS;
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}
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static void ep93xx_spi_pio_transfer(struct ep93xx_spi *espi)
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{
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/*
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* Now everything is set up for the current transfer. We prime the TX
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* FIFO, enable interrupts, and wait for the transfer to complete.
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*/
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if (ep93xx_spi_read_write(espi)) {
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ep93xx_spi_enable_interrupts(espi);
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wait_for_completion(&espi->wait);
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}
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}
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/**
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* ep93xx_spi_dma_prepare() - prepares a DMA transfer
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* @espi: ep93xx SPI controller struct
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* @dir: DMA transfer direction
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*
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* Function configures the DMA, maps the buffer and prepares the DMA
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* descriptor. Returns a valid DMA descriptor in case of success and ERR_PTR
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* in case of failure.
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*/
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static struct dma_async_tx_descriptor *
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ep93xx_spi_dma_prepare(struct ep93xx_spi *espi, enum dma_data_direction dir)
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{
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struct spi_transfer *t = espi->current_msg->state;
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struct dma_async_tx_descriptor *txd;
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enum dma_slave_buswidth buswidth;
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struct dma_slave_config conf;
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struct scatterlist *sg;
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struct sg_table *sgt;
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struct dma_chan *chan;
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const void *buf, *pbuf;
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size_t len = t->len;
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int i, ret, nents;
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if (bits_per_word(espi) > 8)
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buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES;
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else
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buswidth = DMA_SLAVE_BUSWIDTH_1_BYTE;
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memset(&conf, 0, sizeof(conf));
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conf.direction = dir;
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if (dir == DMA_FROM_DEVICE) {
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chan = espi->dma_rx;
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buf = t->rx_buf;
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sgt = &espi->rx_sgt;
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conf.src_addr = espi->sspdr_phys;
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conf.src_addr_width = buswidth;
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} else {
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chan = espi->dma_tx;
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buf = t->tx_buf;
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sgt = &espi->tx_sgt;
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conf.dst_addr = espi->sspdr_phys;
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conf.dst_addr_width = buswidth;
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}
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ret = dmaengine_slave_config(chan, &conf);
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if (ret)
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return ERR_PTR(ret);
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/*
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* We need to split the transfer into PAGE_SIZE'd chunks. This is
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* because we are using @espi->zeropage to provide a zero RX buffer
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* for the TX transfers and we have only allocated one page for that.
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*
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* For performance reasons we allocate a new sg_table only when
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* needed. Otherwise we will re-use the current one. Eventually the
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* last sg_table is released in ep93xx_spi_release_dma().
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*/
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nents = DIV_ROUND_UP(len, PAGE_SIZE);
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if (nents != sgt->nents) {
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sg_free_table(sgt);
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ret = sg_alloc_table(sgt, nents, GFP_KERNEL);
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if (ret)
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return ERR_PTR(ret);
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}
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pbuf = buf;
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for_each_sg(sgt->sgl, sg, sgt->nents, i) {
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size_t bytes = min_t(size_t, len, PAGE_SIZE);
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if (buf) {
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sg_set_page(sg, virt_to_page(pbuf), bytes,
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offset_in_page(pbuf));
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} else {
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sg_set_page(sg, virt_to_page(espi->zeropage),
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bytes, 0);
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}
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pbuf += bytes;
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len -= bytes;
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}
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if (WARN_ON(len)) {
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dev_warn(&espi->pdev->dev, "len = %d expected 0!", len);
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return ERR_PTR(-EINVAL);
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}
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nents = dma_map_sg(chan->device->dev, sgt->sgl, sgt->nents, dir);
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if (!nents)
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return ERR_PTR(-ENOMEM);
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txd = chan->device->device_prep_slave_sg(chan, sgt->sgl, nents,
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dir, DMA_CTRL_ACK);
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if (!txd) {
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dma_unmap_sg(chan->device->dev, sgt->sgl, sgt->nents, dir);
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return ERR_PTR(-ENOMEM);
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}
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return txd;
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}
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/**
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* ep93xx_spi_dma_finish() - finishes with a DMA transfer
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* @espi: ep93xx SPI controller struct
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* @dir: DMA transfer direction
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*
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* Function finishes with the DMA transfer. After this, the DMA buffer is
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* unmapped.
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*/
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static void ep93xx_spi_dma_finish(struct ep93xx_spi *espi,
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enum dma_data_direction dir)
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{
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struct dma_chan *chan;
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struct sg_table *sgt;
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if (dir == DMA_FROM_DEVICE) {
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chan = espi->dma_rx;
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sgt = &espi->rx_sgt;
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} else {
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chan = espi->dma_tx;
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sgt = &espi->tx_sgt;
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}
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dma_unmap_sg(chan->device->dev, sgt->sgl, sgt->nents, dir);
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}
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static void ep93xx_spi_dma_callback(void *callback_param)
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{
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complete(callback_param);
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}
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static void ep93xx_spi_dma_transfer(struct ep93xx_spi *espi)
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{
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struct spi_message *msg = espi->current_msg;
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struct dma_async_tx_descriptor *rxd, *txd;
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rxd = ep93xx_spi_dma_prepare(espi, DMA_FROM_DEVICE);
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if (IS_ERR(rxd)) {
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dev_err(&espi->pdev->dev, "DMA RX failed: %ld\n", PTR_ERR(rxd));
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msg->status = PTR_ERR(rxd);
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return;
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}
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txd = ep93xx_spi_dma_prepare(espi, DMA_TO_DEVICE);
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if (IS_ERR(txd)) {
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ep93xx_spi_dma_finish(espi, DMA_FROM_DEVICE);
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dev_err(&espi->pdev->dev, "DMA TX failed: %ld\n", PTR_ERR(rxd));
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msg->status = PTR_ERR(txd);
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return;
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}
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/* We are ready when RX is done */
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rxd->callback = ep93xx_spi_dma_callback;
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rxd->callback_param = &espi->wait;
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/* Now submit both descriptors and wait while they finish */
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dmaengine_submit(rxd);
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dmaengine_submit(txd);
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dma_async_issue_pending(espi->dma_rx);
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dma_async_issue_pending(espi->dma_tx);
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wait_for_completion(&espi->wait);
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ep93xx_spi_dma_finish(espi, DMA_TO_DEVICE);
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ep93xx_spi_dma_finish(espi, DMA_FROM_DEVICE);
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}
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/**
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* ep93xx_spi_process_transfer() - processes one SPI transfer
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* @espi: ep93xx SPI controller struct
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@ -556,13 +757,14 @@ static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi,
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espi->tx = 0;
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/*
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* Now everything is set up for the current transfer. We prime the TX
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* FIFO, enable interrupts, and wait for the transfer to complete.
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* There is no point of setting up DMA for the transfers which will
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* fit into the FIFO and can be transferred with a single interrupt.
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* So in these cases we will be using PIO and don't bother for DMA.
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*/
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if (ep93xx_spi_read_write(espi)) {
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ep93xx_spi_enable_interrupts(espi);
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wait_for_completion(&espi->wait);
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}
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if (espi->dma_rx && t->len > SPI_FIFO_SIZE)
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ep93xx_spi_dma_transfer(espi);
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else
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ep93xx_spi_pio_transfer(espi);
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/*
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* In case of error during transmit, we bail out from processing
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@ -571,6 +773,8 @@ static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi,
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if (msg->status)
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return;
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msg->actual_length += t->len;
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/*
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* After this transfer is finished, perform any possible
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* post-transfer actions requested by the protocol driver.
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@ -752,6 +956,75 @@ static irqreturn_t ep93xx_spi_interrupt(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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static bool ep93xx_spi_dma_filter(struct dma_chan *chan, void *filter_param)
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{
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if (ep93xx_dma_chan_is_m2p(chan))
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return false;
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chan->private = filter_param;
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return true;
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}
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static int ep93xx_spi_setup_dma(struct ep93xx_spi *espi)
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{
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dma_cap_mask_t mask;
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int ret;
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espi->zeropage = (void *)get_zeroed_page(GFP_KERNEL);
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if (!espi->zeropage)
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return -ENOMEM;
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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espi->dma_rx_data.port = EP93XX_DMA_SSP;
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espi->dma_rx_data.direction = DMA_FROM_DEVICE;
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espi->dma_rx_data.name = "ep93xx-spi-rx";
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espi->dma_rx = dma_request_channel(mask, ep93xx_spi_dma_filter,
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&espi->dma_rx_data);
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if (!espi->dma_rx) {
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ret = -ENODEV;
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goto fail_free_page;
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}
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espi->dma_tx_data.port = EP93XX_DMA_SSP;
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espi->dma_tx_data.direction = DMA_TO_DEVICE;
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espi->dma_tx_data.name = "ep93xx-spi-tx";
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espi->dma_tx = dma_request_channel(mask, ep93xx_spi_dma_filter,
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&espi->dma_tx_data);
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if (!espi->dma_tx) {
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ret = -ENODEV;
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goto fail_release_rx;
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}
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return 0;
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fail_release_rx:
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dma_release_channel(espi->dma_rx);
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espi->dma_rx = NULL;
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fail_free_page:
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free_page((unsigned long)espi->zeropage);
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return ret;
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}
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static void ep93xx_spi_release_dma(struct ep93xx_spi *espi)
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{
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if (espi->dma_rx) {
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dma_release_channel(espi->dma_rx);
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sg_free_table(&espi->rx_sgt);
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}
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if (espi->dma_tx) {
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dma_release_channel(espi->dma_tx);
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sg_free_table(&espi->tx_sgt);
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}
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if (espi->zeropage)
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free_page((unsigned long)espi->zeropage);
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}
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static int __init ep93xx_spi_probe(struct platform_device *pdev)
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{
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struct spi_master *master;
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@ -818,6 +1091,7 @@ static int __init ep93xx_spi_probe(struct platform_device *pdev)
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goto fail_put_clock;
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}
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espi->sspdr_phys = res->start + SSPDR;
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espi->regs_base = ioremap(res->start, resource_size(res));
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if (!espi->regs_base) {
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dev_err(&pdev->dev, "failed to map resources\n");
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@ -832,10 +1106,13 @@ static int __init ep93xx_spi_probe(struct platform_device *pdev)
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goto fail_unmap_regs;
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}
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if (info->use_dma && ep93xx_spi_setup_dma(espi))
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dev_warn(&pdev->dev, "DMA setup failed. Falling back to PIO\n");
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espi->wq = create_singlethread_workqueue("ep93xx_spid");
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if (!espi->wq) {
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dev_err(&pdev->dev, "unable to create workqueue\n");
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goto fail_free_irq;
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goto fail_free_dma;
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}
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INIT_WORK(&espi->msg_work, ep93xx_spi_work);
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INIT_LIST_HEAD(&espi->msg_queue);
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@ -857,7 +1134,8 @@ static int __init ep93xx_spi_probe(struct platform_device *pdev)
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fail_free_queue:
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destroy_workqueue(espi->wq);
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fail_free_irq:
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fail_free_dma:
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ep93xx_spi_release_dma(espi);
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free_irq(espi->irq, espi);
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fail_unmap_regs:
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iounmap(espi->regs_base);
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@ -901,6 +1179,7 @@ static int __exit ep93xx_spi_remove(struct platform_device *pdev)
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}
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spin_unlock_irq(&espi->lock);
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ep93xx_spi_release_dma(espi);
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free_irq(espi->irq, espi);
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iounmap(espi->regs_base);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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