drm/i915/gvt: Export intel_gvt_render_mmio_to_ring_id()
Since many emulation logic needs to convert the offset of ring registers into ring id, we export it for other caller which might need it. Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
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7d1e5cdf01
Коммит
62a6a53786
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@ -137,17 +137,26 @@ static int new_mmio_info(struct intel_gvt *gvt,
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return 0;
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}
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static int render_mmio_to_ring_id(struct intel_gvt *gvt, unsigned int reg)
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/**
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* intel_gvt_render_mmio_to_ring_id - convert a mmio offset into ring id
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* @gvt: a GVT device
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* @offset: register offset
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*
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* Returns:
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* Ring ID on success, negative error code if failed.
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*/
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int intel_gvt_render_mmio_to_ring_id(struct intel_gvt *gvt,
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unsigned int offset)
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{
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enum intel_engine_id id;
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struct intel_engine_cs *engine;
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reg &= ~GENMASK(11, 0);
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offset &= ~GENMASK(11, 0);
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for_each_engine(engine, gvt->dev_priv, id) {
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if (engine->mmio_base == reg)
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if (engine->mmio_base == offset)
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return id;
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}
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return -1;
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return -ENODEV;
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}
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#define offset_to_fence_num(offset) \
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@ -1445,7 +1454,7 @@ static int mmio_read_from_hw(struct intel_vgpu *vgpu,
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static int elsp_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
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void *p_data, unsigned int bytes)
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{
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int ring_id = render_mmio_to_ring_id(vgpu->gvt, offset);
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int ring_id = intel_gvt_render_mmio_to_ring_id(vgpu->gvt, offset);
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struct intel_vgpu_execlist *execlist;
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u32 data = *(u32 *)p_data;
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int ret = 0;
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@ -1473,7 +1482,7 @@ static int ring_mode_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
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{
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struct intel_vgpu_submission *s = &vgpu->submission;
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u32 data = *(u32 *)p_data;
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int ring_id = render_mmio_to_ring_id(vgpu->gvt, offset);
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int ring_id = intel_gvt_render_mmio_to_ring_id(vgpu->gvt, offset);
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bool enable_execlist;
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int ret;
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@ -65,6 +65,8 @@ struct intel_gvt_mmio_info {
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struct hlist_node node;
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};
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int intel_gvt_render_mmio_to_ring_id(struct intel_gvt *gvt,
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unsigned int reg);
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unsigned long intel_gvt_get_device_type(struct intel_gvt *gvt);
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bool intel_gvt_match_device(struct intel_gvt *gvt, unsigned long device);
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