ARM: sirf: enable sparse IRQ
Now that both irqchips for sirf are converted to not rely on legacy domains, let's move all of the platform over to sparse IRQ. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -427,6 +427,7 @@ config ARCH_SIRF
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select PINCTRL
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select PINCTRL_SIRF
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select USE_OF
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select SPARSE_IRQ
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help
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Support for CSR SiRFprimaII/Marco/Polo platforms
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@ -45,6 +45,7 @@ static const char *atlas6_dt_match[] __initdata = {
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DT_MACHINE_START(ATLAS6_DT, "Generic ATLAS6 (Flattened Device Tree)")
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/* Maintainer: Barry Song <baohua.song@csr.com> */
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.nr_irqs = 128,
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.map_io = sirfsoc_map_io,
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.init_irq = irqchip_init,
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.init_time = sirfsoc_prima2_timer_init,
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@ -63,6 +64,7 @@ static const char *prima2_dt_match[] __initdata = {
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DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
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/* Maintainer: Barry Song <baohua.song@csr.com> */
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.nr_irqs = 128,
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.map_io = sirfsoc_map_io,
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.init_irq = irqchip_init,
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.init_time = sirfsoc_prima2_timer_init,
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@ -1,17 +0,0 @@
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/*
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* arch/arm/mach-prima2/include/mach/irqs.h
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*
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* Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
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*
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* Licensed under GPLv2 or later.
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*/
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#ifndef __ASM_ARCH_IRQS_H
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#define __ASM_ARCH_IRQS_H
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#define SIRFSOC_INTENAL_IRQ_START 0
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#define SIRFSOC_INTENAL_IRQ_END 127
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#define SIRFSOC_GPIO_IRQ_START (SIRFSOC_INTENAL_IRQ_END + 1)
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#define NR_IRQS 288
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#endif
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