openrisc: add l.lwa/l.swa emulation
This adds an emulation layer for implementations that lack the l.lwa and l.swa instructions. It handles these instructions both in kernel space and user space. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> [shorne@gmail.com: Added delay slot pc adjust logic] Signed-off-by: Stafford Horne <shorne@gmail.com>
This commit is contained in:
Stefan Kristiansson
Stafford Horne
Родитель
8c9b7db0de
Коммит
63104c06a9
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@ -173,6 +173,11 @@ handler: ;\
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l.j _ret_from_exception ;\
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l.nop
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/* clobbers 'reg' */
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#define CLEAR_LWA_FLAG(reg) \
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l.movhi reg,hi(lwa_flag) ;\
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l.ori reg,reg,lo(lwa_flag) ;\
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l.sw 0(reg),r0
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/*
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* NOTE: one should never assume that SPR_EPC, SPR_ESR, SPR_EEAR
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* contain the same values as when exception we're handling
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@ -193,6 +198,7 @@ EXCEPTION_ENTRY(_tng_kernel_start)
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/* ---[ 0x200: BUS exception ]------------------------------------------- */
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EXCEPTION_ENTRY(_bus_fault_handler)
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CLEAR_LWA_FLAG(r3)
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/* r4: EA of fault (set by EXCEPTION_HANDLE) */
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l.jal do_bus_fault
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l.addi r3,r1,0 /* pt_regs */
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@ -202,11 +208,13 @@ EXCEPTION_ENTRY(_bus_fault_handler)
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/* ---[ 0x300: Data Page Fault exception ]------------------------------- */
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EXCEPTION_ENTRY(_dtlb_miss_page_fault_handler)
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CLEAR_LWA_FLAG(r3)
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l.and r5,r5,r0
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l.j 1f
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l.nop
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EXCEPTION_ENTRY(_data_page_fault_handler)
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CLEAR_LWA_FLAG(r3)
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/* set up parameters for do_page_fault */
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l.ori r5,r0,0x300 // exception vector
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1:
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@ -282,11 +290,13 @@ EXCEPTION_ENTRY(_data_page_fault_handler)
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/* ---[ 0x400: Insn Page Fault exception ]------------------------------- */
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EXCEPTION_ENTRY(_itlb_miss_page_fault_handler)
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CLEAR_LWA_FLAG(r3)
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l.and r5,r5,r0
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l.j 1f
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l.nop
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EXCEPTION_ENTRY(_insn_page_fault_handler)
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CLEAR_LWA_FLAG(r3)
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/* set up parameters for do_page_fault */
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l.ori r5,r0,0x400 // exception vector
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1:
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@ -304,6 +314,7 @@ EXCEPTION_ENTRY(_insn_page_fault_handler)
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/* ---[ 0x500: Timer exception ]----------------------------------------- */
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EXCEPTION_ENTRY(_timer_handler)
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CLEAR_LWA_FLAG(r3)
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l.jal timer_interrupt
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l.addi r3,r1,0 /* pt_regs */
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@ -313,6 +324,7 @@ EXCEPTION_ENTRY(_timer_handler)
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/* ---[ 0x600: Aligment exception ]-------------------------------------- */
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EXCEPTION_ENTRY(_alignment_handler)
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CLEAR_LWA_FLAG(r3)
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/* r4: EA of fault (set by EXCEPTION_HANDLE) */
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l.jal do_unaligned_access
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l.addi r3,r1,0 /* pt_regs */
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@ -509,6 +521,7 @@ EXCEPTION_ENTRY(_external_irq_handler)
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// l.sw PT_SR(r1),r4
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1:
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#endif
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CLEAR_LWA_FLAG(r3)
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l.addi r3,r1,0
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l.movhi r8,hi(do_IRQ)
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l.ori r8,r8,lo(do_IRQ)
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@ -556,8 +569,12 @@ ENTRY(_sys_call_handler)
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* they should be clobbered, otherwise
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*/
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l.sw PT_GPR3(r1),r3
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/* r4 already saved */
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/* r4 holds the EEAR address of the fault, load the original r4 */
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/*
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* r4 already saved
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* r4 holds the EEAR address of the fault, use it as screatch reg and
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* then load the original r4
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*/
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CLEAR_LWA_FLAG(r4)
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l.lwz r4,PT_GPR4(r1)
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l.sw PT_GPR5(r1),r5
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l.sw PT_GPR6(r1),r6
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@ -776,6 +793,7 @@ UNHANDLED_EXCEPTION(_vector_0xd00,0xd00)
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/* ---[ 0xe00: Trap exception ]------------------------------------------ */
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EXCEPTION_ENTRY(_trap_handler)
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CLEAR_LWA_FLAG(r3)
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/* r4: EA of fault (set by EXCEPTION_HANDLE) */
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l.jal do_trap
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l.addi r3,r1,0 /* pt_regs */
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@ -226,6 +226,7 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t * fpu)
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extern struct thread_info *_switch(struct thread_info *old_ti,
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struct thread_info *new_ti);
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extern int lwa_flag;
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struct task_struct *__switch_to(struct task_struct *old,
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struct task_struct *new)
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@ -243,6 +244,8 @@ struct task_struct *__switch_to(struct task_struct *old,
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new_ti = new->stack;
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old_ti = old->stack;
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lwa_flag = 0;
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current_thread_info_set[smp_processor_id()] = new_ti;
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last = (_switch(old_ti, new_ti))->task;
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@ -40,6 +40,8 @@
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extern char _etext, _stext;
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int kstack_depth_to_print = 0x180;
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int lwa_flag;
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unsigned long __user *lwa_addr;
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static inline int valid_stack_ptr(struct thread_info *tinfo, void *p)
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{
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@ -334,10 +336,191 @@ asmlinkage void do_bus_fault(struct pt_regs *regs, unsigned long address)
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}
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}
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static inline int in_delay_slot(struct pt_regs *regs)
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{
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#ifdef CONFIG_OPENRISC_NO_SPR_SR_DSX
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/* No delay slot flag, do the old way */
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unsigned int op, insn;
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insn = *((unsigned int *)regs->pc);
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op = insn >> 26;
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switch (op) {
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case 0x00: /* l.j */
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case 0x01: /* l.jal */
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case 0x03: /* l.bnf */
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case 0x04: /* l.bf */
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case 0x11: /* l.jr */
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case 0x12: /* l.jalr */
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return 1;
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default:
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return 0;
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}
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#else
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return regs->sr & SPR_SR_DSX;
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#endif
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}
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static inline void adjust_pc(struct pt_regs *regs, unsigned long address)
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{
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int displacement;
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unsigned int rb, op, jmp;
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if (unlikely(in_delay_slot(regs))) {
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/* In delay slot, instruction at pc is a branch, simulate it */
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jmp = *((unsigned int *)regs->pc);
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displacement = sign_extend32(((jmp) & 0x3ffffff) << 2, 27);
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rb = (jmp & 0x0000ffff) >> 11;
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op = jmp >> 26;
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switch (op) {
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case 0x00: /* l.j */
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regs->pc += displacement;
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return;
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case 0x01: /* l.jal */
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regs->pc += displacement;
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regs->gpr[9] = regs->pc + 8;
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return;
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case 0x03: /* l.bnf */
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if (regs->sr & SPR_SR_F)
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regs->pc += 8;
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else
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regs->pc += displacement;
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return;
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case 0x04: /* l.bf */
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if (regs->sr & SPR_SR_F)
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regs->pc += displacement;
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else
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regs->pc += 8;
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return;
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case 0x11: /* l.jr */
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regs->pc = regs->gpr[rb];
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return;
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case 0x12: /* l.jalr */
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regs->pc = regs->gpr[rb];
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regs->gpr[9] = regs->pc + 8;
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return;
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default:
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break;
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}
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} else {
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regs->pc += 4;
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}
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}
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static inline void simulate_lwa(struct pt_regs *regs, unsigned long address,
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unsigned int insn)
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{
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unsigned int ra, rd;
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unsigned long value;
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unsigned long orig_pc;
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long imm;
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const struct exception_table_entry *entry;
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orig_pc = regs->pc;
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adjust_pc(regs, address);
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ra = (insn >> 16) & 0x1f;
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rd = (insn >> 21) & 0x1f;
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imm = (short)insn;
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lwa_addr = (unsigned long __user *)(regs->gpr[ra] + imm);
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if ((unsigned long)lwa_addr & 0x3) {
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do_unaligned_access(regs, address);
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return;
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}
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if (get_user(value, lwa_addr)) {
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if (user_mode(regs)) {
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force_sig(SIGSEGV, current);
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return;
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}
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if ((entry = search_exception_tables(orig_pc))) {
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regs->pc = entry->fixup;
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return;
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}
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/* kernel access in kernel space, load it directly */
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value = *((unsigned long *)lwa_addr);
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}
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lwa_flag = 1;
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regs->gpr[rd] = value;
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}
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static inline void simulate_swa(struct pt_regs *regs, unsigned long address,
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unsigned int insn)
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{
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unsigned long __user *vaddr;
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unsigned long orig_pc;
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unsigned int ra, rb;
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long imm;
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const struct exception_table_entry *entry;
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orig_pc = regs->pc;
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adjust_pc(regs, address);
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ra = (insn >> 16) & 0x1f;
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rb = (insn >> 11) & 0x1f;
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imm = (short)(((insn & 0x2200000) >> 10) | (insn & 0x7ff));
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vaddr = (unsigned long __user *)(regs->gpr[ra] + imm);
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if (!lwa_flag || vaddr != lwa_addr) {
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regs->sr &= ~SPR_SR_F;
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return;
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}
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if ((unsigned long)vaddr & 0x3) {
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do_unaligned_access(regs, address);
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return;
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}
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if (put_user(regs->gpr[rb], vaddr)) {
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if (user_mode(regs)) {
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force_sig(SIGSEGV, current);
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return;
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}
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if ((entry = search_exception_tables(orig_pc))) {
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regs->pc = entry->fixup;
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return;
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}
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/* kernel access in kernel space, store it directly */
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*((unsigned long *)vaddr) = regs->gpr[rb];
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}
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lwa_flag = 0;
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regs->sr |= SPR_SR_F;
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}
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#define INSN_LWA 0x1b
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#define INSN_SWA 0x33
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asmlinkage void do_illegal_instruction(struct pt_regs *regs,
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unsigned long address)
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{
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siginfo_t info;
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unsigned int op;
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unsigned int insn = *((unsigned int *)address);
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op = insn >> 26;
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switch (op) {
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case INSN_LWA:
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simulate_lwa(regs, address, insn);
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return;
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case INSN_SWA:
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simulate_swa(regs, address, insn);
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return;
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default:
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break;
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}
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if (user_mode(regs)) {
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/* Send a SIGILL */
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