ASoC: rsnd: dvc: make sure DVC soft reset
Renesas SCU (Sampling Rate Convert Unit) includes SRC/CTU/MIX/DVC, and these have similar register. xxxRSR (Software reset Register) is one of them. These xxxRSR need be set to 1 to 0 when software reset. Current rsnd driver has src.c / dvc.c, and we will have mix.c. It is readable if these have same named function. This patch adds rsnd_dvc_soft_reset() and make sure it Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -64,6 +64,12 @@ static const char * const dvc_ramp_rate[] = {
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"0.125 dB/8192 steps", /* 10111 */
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};
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static void rsnd_dvc_soft_reset(struct rsnd_mod *mod)
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{
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rsnd_mod_write(mod, DVC_SWRSR, 0);
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rsnd_mod_write(mod, DVC_SWRSR, 1);
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}
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static void rsnd_dvc_volume_update(struct rsnd_dai_stream *io,
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struct rsnd_mod *mod)
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{
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@ -160,15 +166,14 @@ static int rsnd_dvc_init(struct rsnd_mod *dvc_mod,
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rsnd_mod_hw_start(dvc_mod);
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rsnd_dvc_soft_reset(dvc_mod);
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/*
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* fixme
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* it doesn't support CTU/MIX
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*/
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rsnd_mod_write(dvc_mod, CMD_ROUTE_SLCT, route[src_id]);
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rsnd_mod_write(dvc_mod, DVC_SWRSR, 0);
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rsnd_mod_write(dvc_mod, DVC_SWRSR, 1);
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rsnd_mod_write(dvc_mod, DVC_DVUIR, 1);
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rsnd_mod_write(dvc_mod, DVC_ADINR, rsnd_get_adinr(dvc_mod, io));
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