perf_event: x86: Optimize the constraint searching bits
Instead of copying bitmasks around, pass pointers to the constraint structure. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Stephane Eranian <eranian@google.com> LKML-Reference: <20100122155535.887853503@chello.nl> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Peter Zijlstra
Ingo Molnar
Родитель
9f41699ed0
Коммит
63b146490b
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@ -134,12 +134,14 @@ struct x86_pmu {
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u64 intel_ctrl;
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void (*enable_bts)(u64 config);
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void (*disable_bts)(void);
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void (*get_event_constraints)(struct cpu_hw_events *cpuc,
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struct perf_event *event,
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unsigned long *idxmsk);
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struct event_constraint *
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(*get_event_constraints)(struct cpu_hw_events *cpuc,
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struct perf_event *event);
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void (*put_event_constraints)(struct cpu_hw_events *cpuc,
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struct perf_event *event);
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const struct event_constraint *event_constraints;
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struct event_constraint *event_constraints;
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};
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static struct x86_pmu x86_pmu __read_mostly;
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@ -1242,17 +1244,15 @@ static int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
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{
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int i, j , w, num;
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int weight, wmax;
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unsigned long *c;
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unsigned long constraints[X86_PMC_IDX_MAX][BITS_TO_LONGS(X86_PMC_IDX_MAX)];
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struct event_constraint *c, *constraints[X86_PMC_IDX_MAX];
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unsigned long used_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
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struct hw_perf_event *hwc;
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bitmap_zero(used_mask, X86_PMC_IDX_MAX);
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for (i = 0; i < n; i++) {
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x86_pmu.get_event_constraints(cpuc,
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cpuc->event_list[i],
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constraints[i]);
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constraints[i] =
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x86_pmu.get_event_constraints(cpuc, cpuc->event_list[i]);
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}
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/*
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@ -1267,7 +1267,7 @@ static int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
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break;
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/* constraint still honored */
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if (!test_bit(hwc->idx, c))
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if (!test_bit(hwc->idx, c->idxmsk))
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break;
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/* not already used */
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@ -1320,11 +1320,11 @@ static int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
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c = constraints[i];
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hwc = &cpuc->event_list[i]->hw;
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weight = bitmap_weight(c, X86_PMC_IDX_MAX);
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weight = bitmap_weight(c->idxmsk, X86_PMC_IDX_MAX);
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if (weight != w)
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continue;
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for_each_bit(j, c, X86_PMC_IDX_MAX) {
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for_each_bit(j, c->idxmsk, X86_PMC_IDX_MAX) {
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if (!test_bit(j, used_mask))
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break;
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}
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@ -2155,11 +2155,13 @@ perf_event_nmi_handler(struct notifier_block *self,
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return NOTIFY_STOP;
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}
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static struct event_constraint unconstrained;
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static struct event_constraint bts_constraint =
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EVENT_CONSTRAINT(0, 1ULL << X86_PMC_IDX_FIXED_BTS, 0);
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static int intel_special_constraints(struct perf_event *event,
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unsigned long *idxmsk)
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static struct event_constraint *
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intel_special_constraints(struct perf_event *event)
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{
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unsigned int hw_event;
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@ -2169,46 +2171,34 @@ static int intel_special_constraints(struct perf_event *event,
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x86_pmu.event_map(PERF_COUNT_HW_BRANCH_INSTRUCTIONS)) &&
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(event->hw.sample_period == 1))) {
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bitmap_copy((unsigned long *)idxmsk,
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(unsigned long *)bts_constraint.idxmsk,
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X86_PMC_IDX_MAX);
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return 1;
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return &bts_constraint;
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}
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return 0;
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return NULL;
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}
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static void intel_get_event_constraints(struct cpu_hw_events *cpuc,
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struct perf_event *event,
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unsigned long *idxmsk)
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static struct event_constraint *
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intel_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event)
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{
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const struct event_constraint *c;
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struct event_constraint *c;
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/*
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* cleanup bitmask
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*/
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bitmap_zero(idxmsk, X86_PMC_IDX_MAX);
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if (intel_special_constraints(event, idxmsk))
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return;
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c = intel_special_constraints(event);
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if (c)
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return c;
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if (x86_pmu.event_constraints) {
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for_each_event_constraint(c, x86_pmu.event_constraints) {
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if ((event->hw.config & c->cmask) == c->code) {
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bitmap_copy(idxmsk, c->idxmsk, X86_PMC_IDX_MAX);
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return;
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}
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if ((event->hw.config & c->cmask) == c->code)
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return c;
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}
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}
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/* no constraints, means supports all generic counters */
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bitmap_fill((unsigned long *)idxmsk, x86_pmu.num_events);
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return &unconstrained;
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}
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static void amd_get_event_constraints(struct cpu_hw_events *cpuc,
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struct perf_event *event,
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unsigned long *idxmsk)
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static struct event_constraint *
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amd_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event)
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{
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/* no constraints, means supports all generic counters */
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bitmap_fill(idxmsk, x86_pmu.num_events);
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return &unconstrained;
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}
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static int x86_event_sched_in(struct perf_event *event,
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@ -2576,6 +2566,9 @@ void __init init_hw_perf_events(void)
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perf_events_lapic_init();
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register_die_notifier(&perf_event_nmi_notifier);
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unconstrained = (struct event_constraint)
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EVENT_CONSTRAINT(0, (1ULL << x86_pmu.num_events) - 1, 0);
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pr_info("... version: %d\n", x86_pmu.version);
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pr_info("... bit width: %d\n", x86_pmu.event_bits);
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pr_info("... generic registers: %d\n", x86_pmu.num_events);
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