spi/mxs: Add SPI driver for mx233/mx28
This is slightly reworked version of the SPI driver. Support for DT has been added and it's been converted to queued API. Based on previous attempt by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Chris Ball <cjb@laptop.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Marek Vasut
Mark Brown
Родитель
1308239858
Коммит
646781d332
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@ -364,6 +364,13 @@ config SPI_STMP3XXX
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help
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help
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SPI driver for Freescale STMP37xx/378x SoC SSP interface
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SPI driver for Freescale STMP37xx/378x SoC SSP interface
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config SPI_MXS
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tristate "Freescale MXS SPI controller"
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depends on ARCH_MXS
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select STMP_DEVICE
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help
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SPI driver for Freescale MXS devices.
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config SPI_TEGRA
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config SPI_TEGRA
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tristate "Nvidia Tegra SPI controller"
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tristate "Nvidia Tegra SPI controller"
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depends on ARCH_TEGRA && (TEGRA_SYSTEM_DMA || TEGRA20_APB_DMA)
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depends on ARCH_TEGRA && (TEGRA_SYSTEM_DMA || TEGRA20_APB_DMA)
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@ -36,6 +36,7 @@ obj-$(CONFIG_SPI_LM70_LLP) += spi-lm70llp.o
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obj-$(CONFIG_SPI_MPC512x_PSC) += spi-mpc512x-psc.o
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obj-$(CONFIG_SPI_MPC512x_PSC) += spi-mpc512x-psc.o
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obj-$(CONFIG_SPI_MPC52xx_PSC) += spi-mpc52xx-psc.o
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obj-$(CONFIG_SPI_MPC52xx_PSC) += spi-mpc52xx-psc.o
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obj-$(CONFIG_SPI_MPC52xx) += spi-mpc52xx.o
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obj-$(CONFIG_SPI_MPC52xx) += spi-mpc52xx.o
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obj-$(CONFIG_SPI_MXS) += spi-mxs.o
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obj-$(CONFIG_SPI_NUC900) += spi-nuc900.o
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obj-$(CONFIG_SPI_NUC900) += spi-nuc900.o
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obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o
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obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o
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obj-$(CONFIG_SPI_OMAP_UWIRE) += spi-omap-uwire.o
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obj-$(CONFIG_SPI_OMAP_UWIRE) += spi-omap-uwire.o
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@ -0,0 +1,431 @@
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/*
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* Freescale MXS SPI master driver
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*
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* Copyright 2012 DENX Software Engineering, GmbH.
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* Copyright 2012 Freescale Semiconductor, Inc.
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* Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
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*
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* Rework and transition to new API by:
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* Marek Vasut <marex@denx.de>
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*
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* Based on previous attempt by:
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* Fabio Estevam <fabio.estevam@freescale.com>
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*
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* Based on code from U-Boot bootloader by:
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* Marek Vasut <marex@denx.de>
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*
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* Based on spi-stmp.c, which is:
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* Author: Dmitry Pervushin <dimka@embeddedalley.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_gpio.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/dma-mapping.h>
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#include <linux/dmaengine.h>
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#include <linux/highmem.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/completion.h>
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#include <linux/gpio.h>
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#include <linux/regulator/consumer.h>
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#include <linux/module.h>
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#include <linux/fsl/mxs-dma.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/stmp_device.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/mxs-spi.h>
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#define DRIVER_NAME "mxs-spi"
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#define SSP_TIMEOUT 1000 /* 1000 ms */
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struct mxs_spi {
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struct mxs_ssp ssp;
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};
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static int mxs_spi_setup_transfer(struct spi_device *dev,
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struct spi_transfer *t)
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{
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struct mxs_spi *spi = spi_master_get_devdata(dev->master);
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struct mxs_ssp *ssp = &spi->ssp;
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uint8_t bits_per_word;
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uint32_t hz = 0;
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bits_per_word = dev->bits_per_word;
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if (t && t->bits_per_word)
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bits_per_word = t->bits_per_word;
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if (bits_per_word != 8) {
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dev_err(&dev->dev, "%s, unsupported bits_per_word=%d\n",
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__func__, bits_per_word);
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return -EINVAL;
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}
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hz = dev->max_speed_hz;
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if (t && t->speed_hz)
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hz = min(hz, t->speed_hz);
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if (hz == 0) {
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dev_err(&dev->dev, "Cannot continue with zero clock\n");
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return -EINVAL;
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}
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mxs_ssp_set_clk_rate(ssp, hz);
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writel(BF_SSP_CTRL1_SSP_MODE(BV_SSP_CTRL1_SSP_MODE__SPI) |
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BF_SSP_CTRL1_WORD_LENGTH
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(BV_SSP_CTRL1_WORD_LENGTH__EIGHT_BITS) |
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((dev->mode & SPI_CPOL) ? BM_SSP_CTRL1_POLARITY : 0) |
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((dev->mode & SPI_CPHA) ? BM_SSP_CTRL1_PHASE : 0),
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ssp->base + HW_SSP_CTRL1(ssp));
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writel(0x0, ssp->base + HW_SSP_CMD0);
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writel(0x0, ssp->base + HW_SSP_CMD1);
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return 0;
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}
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static int mxs_spi_setup(struct spi_device *dev)
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{
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int err = 0;
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if (!dev->bits_per_word)
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dev->bits_per_word = 8;
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if (dev->mode & ~(SPI_CPOL | SPI_CPHA))
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return -EINVAL;
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err = mxs_spi_setup_transfer(dev, NULL);
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if (err) {
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dev_err(&dev->dev,
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"Failed to setup transfer, error = %d\n", err);
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}
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return err;
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}
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static uint32_t mxs_spi_cs_to_reg(unsigned cs)
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{
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uint32_t select = 0;
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/*
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* i.MX28 Datasheet: 17.10.1: HW_SSP_CTRL0
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*
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* The bits BM_SSP_CTRL0_WAIT_FOR_CMD and BM_SSP_CTRL0_WAIT_FOR_IRQ
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* in HW_SSP_CTRL0 register do have multiple usage, please refer to
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* the datasheet for further details. In SPI mode, they are used to
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* toggle the chip-select lines (nCS pins).
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*/
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if (cs & 1)
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select |= BM_SSP_CTRL0_WAIT_FOR_CMD;
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if (cs & 2)
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select |= BM_SSP_CTRL0_WAIT_FOR_IRQ;
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return select;
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}
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static void mxs_spi_set_cs(struct mxs_spi *spi, unsigned cs)
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{
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const uint32_t mask =
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BM_SSP_CTRL0_WAIT_FOR_CMD | BM_SSP_CTRL0_WAIT_FOR_IRQ;
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uint32_t select;
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struct mxs_ssp *ssp = &spi->ssp;
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writel(mask, ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
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select = mxs_spi_cs_to_reg(cs);
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writel(select, ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
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}
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static inline void mxs_spi_enable(struct mxs_spi *spi)
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{
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struct mxs_ssp *ssp = &spi->ssp;
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writel(BM_SSP_CTRL0_LOCK_CS,
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ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
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writel(BM_SSP_CTRL0_IGNORE_CRC,
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ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
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}
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static inline void mxs_spi_disable(struct mxs_spi *spi)
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{
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struct mxs_ssp *ssp = &spi->ssp;
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writel(BM_SSP_CTRL0_LOCK_CS,
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ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
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writel(BM_SSP_CTRL0_IGNORE_CRC,
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ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
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}
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static int mxs_ssp_wait(struct mxs_spi *spi, int offset, int mask, bool set)
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{
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unsigned long timeout = jiffies + msecs_to_jiffies(SSP_TIMEOUT);
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struct mxs_ssp *ssp = &spi->ssp;
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uint32_t reg;
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while (1) {
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reg = readl_relaxed(ssp->base + offset);
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if (set && ((reg & mask) == mask))
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break;
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if (!set && ((~reg & mask) == mask))
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break;
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udelay(1);
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if (time_after(jiffies, timeout))
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return -ETIMEDOUT;
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}
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return 0;
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}
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static int mxs_spi_txrx_pio(struct mxs_spi *spi, int cs,
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unsigned char *buf, int len,
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int *first, int *last, int write)
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{
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struct mxs_ssp *ssp = &spi->ssp;
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if (*first)
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mxs_spi_enable(spi);
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mxs_spi_set_cs(spi, cs);
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while (len--) {
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if (*last && len == 0)
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mxs_spi_disable(spi);
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if (ssp->devid == IMX23_SSP) {
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writel(BM_SSP_CTRL0_XFER_COUNT,
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ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
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writel(1,
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ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
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} else {
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writel(1, ssp->base + HW_SSP_XFER_SIZE);
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}
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if (write)
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writel(BM_SSP_CTRL0_READ,
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ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
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else
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writel(BM_SSP_CTRL0_READ,
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ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
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writel(BM_SSP_CTRL0_RUN,
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ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
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if (mxs_ssp_wait(spi, HW_SSP_CTRL0, BM_SSP_CTRL0_RUN, 1))
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return -ETIMEDOUT;
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if (write)
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writel(*buf, ssp->base + HW_SSP_DATA(ssp));
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writel(BM_SSP_CTRL0_DATA_XFER,
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ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
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if (!write) {
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if (mxs_ssp_wait(spi, HW_SSP_STATUS(ssp),
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BM_SSP_STATUS_FIFO_EMPTY, 0))
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return -ETIMEDOUT;
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*buf = (readl(ssp->base + HW_SSP_DATA(ssp)) & 0xff);
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}
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if (mxs_ssp_wait(spi, HW_SSP_CTRL0, BM_SSP_CTRL0_RUN, 0))
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return -ETIMEDOUT;
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buf++;
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}
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if (len <= 0)
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return 0;
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return -ETIMEDOUT;
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}
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static int mxs_spi_transfer_one(struct spi_master *master,
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struct spi_message *m)
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{
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struct mxs_spi *spi = spi_master_get_devdata(master);
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struct mxs_ssp *ssp = &spi->ssp;
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int first, last;
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struct spi_transfer *t, *tmp_t;
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int status = 0;
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int cs;
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first = last = 0;
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cs = m->spi->chip_select;
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list_for_each_entry_safe(t, tmp_t, &m->transfers, transfer_list) {
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status = mxs_spi_setup_transfer(m->spi, t);
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if (status)
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break;
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if (&t->transfer_list == m->transfers.next)
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first = 1;
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if (&t->transfer_list == m->transfers.prev)
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last = 1;
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if (t->rx_buf && t->tx_buf) {
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dev_err(ssp->dev,
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"Cannot send and receive simultaneously\n");
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status = -EINVAL;
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break;
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}
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if (t->tx_buf)
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status = mxs_spi_txrx_pio(spi, cs, (void *)t->tx_buf,
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t->len, &first, &last, 1);
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if (t->rx_buf)
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status = mxs_spi_txrx_pio(spi, cs, t->rx_buf,
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t->len, &first, &last, 0);
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m->actual_length += t->len;
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if (status)
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break;
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first = last = 0;
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}
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m->status = 0;
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spi_finalize_current_message(master);
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return status;
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}
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static const struct of_device_id mxs_spi_dt_ids[] = {
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{ .compatible = "fsl,imx23-spi", .data = (void *) IMX23_SSP, },
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{ .compatible = "fsl,imx28-spi", .data = (void *) IMX28_SSP, },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, mxs_spi_dt_ids);
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static int __devinit mxs_spi_probe(struct platform_device *pdev)
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{
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const struct of_device_id *of_id =
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of_match_device(mxs_spi_dt_ids, &pdev->dev);
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struct device_node *np = pdev->dev.of_node;
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struct spi_master *master;
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struct mxs_spi *spi;
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struct mxs_ssp *ssp;
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struct resource *iores;
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struct pinctrl *pinctrl;
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||||||
|
struct clk *clk;
|
||||||
|
void __iomem *base;
|
||||||
|
int devid;
|
||||||
|
int ret = 0;
|
||||||
|
|
||||||
|
iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||||
|
if (!iores)
|
||||||
|
return -EINVAL;
|
||||||
|
|
||||||
|
base = devm_request_and_ioremap(&pdev->dev, iores);
|
||||||
|
if (!base)
|
||||||
|
return -EADDRNOTAVAIL;
|
||||||
|
|
||||||
|
pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
|
||||||
|
if (IS_ERR(pinctrl))
|
||||||
|
return PTR_ERR(pinctrl);
|
||||||
|
|
||||||
|
clk = devm_clk_get(&pdev->dev, NULL);
|
||||||
|
if (IS_ERR(clk))
|
||||||
|
return PTR_ERR(clk);
|
||||||
|
|
||||||
|
if (np)
|
||||||
|
devid = (enum mxs_ssp_id) of_id->data;
|
||||||
|
else
|
||||||
|
devid = pdev->id_entry->driver_data;
|
||||||
|
|
||||||
|
master = spi_alloc_master(&pdev->dev, sizeof(*spi));
|
||||||
|
if (!master)
|
||||||
|
return -ENOMEM;
|
||||||
|
|
||||||
|
master->transfer_one_message = mxs_spi_transfer_one;
|
||||||
|
master->setup = mxs_spi_setup;
|
||||||
|
master->mode_bits = SPI_CPOL | SPI_CPHA;
|
||||||
|
master->num_chipselect = 3;
|
||||||
|
master->dev.of_node = np;
|
||||||
|
master->flags = SPI_MASTER_HALF_DUPLEX;
|
||||||
|
|
||||||
|
spi = spi_master_get_devdata(master);
|
||||||
|
ssp = &spi->ssp;
|
||||||
|
ssp->dev = &pdev->dev;
|
||||||
|
ssp->clk = clk;
|
||||||
|
ssp->base = base;
|
||||||
|
ssp->devid = devid;
|
||||||
|
|
||||||
|
clk_prepare_enable(ssp->clk);
|
||||||
|
ssp->clk_rate = clk_get_rate(ssp->clk) / 1000;
|
||||||
|
|
||||||
|
stmp_reset_block(ssp->base);
|
||||||
|
|
||||||
|
platform_set_drvdata(pdev, master);
|
||||||
|
|
||||||
|
ret = spi_register_master(master);
|
||||||
|
if (ret) {
|
||||||
|
dev_err(&pdev->dev, "Cannot register SPI master, %d\n", ret);
|
||||||
|
goto out_master_free;
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
out_master_free:
|
||||||
|
platform_set_drvdata(pdev, NULL);
|
||||||
|
clk_disable_unprepare(ssp->clk);
|
||||||
|
spi_master_put(master);
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int __devexit mxs_spi_remove(struct platform_device *pdev)
|
||||||
|
{
|
||||||
|
struct spi_master *master;
|
||||||
|
struct mxs_spi *spi;
|
||||||
|
struct mxs_ssp *ssp;
|
||||||
|
|
||||||
|
master = platform_get_drvdata(pdev);
|
||||||
|
spi = spi_master_get_devdata(master);
|
||||||
|
ssp = &spi->ssp;
|
||||||
|
|
||||||
|
spi_unregister_master(master);
|
||||||
|
|
||||||
|
platform_set_drvdata(pdev, NULL);
|
||||||
|
|
||||||
|
clk_disable_unprepare(ssp->clk);
|
||||||
|
|
||||||
|
spi_master_put(master);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static struct platform_driver mxs_spi_driver = {
|
||||||
|
.probe = mxs_spi_probe,
|
||||||
|
.remove = __devexit_p(mxs_spi_remove),
|
||||||
|
.driver = {
|
||||||
|
.name = DRIVER_NAME,
|
||||||
|
.owner = THIS_MODULE,
|
||||||
|
.of_match_table = mxs_spi_dt_ids,
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
module_platform_driver(mxs_spi_driver);
|
||||||
|
|
||||||
|
MODULE_AUTHOR("Marek Vasut <marex@denx.de>");
|
||||||
|
MODULE_DESCRIPTION("MXS SPI master driver");
|
||||||
|
MODULE_LICENSE("GPL");
|
||||||
|
MODULE_ALIAS("platform:mxs-spi");
|
||||||
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