sh: Kill off now redundant local irq disabling.
on_each_cpu() takes care of IRQ and preempt handling, the localized handling in each of the called functions can be killed off. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt
Родитель
f26b2a562b
Коммит
64a6d72213
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@ -102,12 +102,10 @@ static void sh2a_flush_icache_range(void *args)
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struct flusher_data *data = args;
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unsigned long start, end;
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unsigned long v;
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unsigned long flags;
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start = data->addr1 & ~(L1_CACHE_BYTES-1);
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end = (data->addr2 + L1_CACHE_BYTES-1) & ~(L1_CACHE_BYTES-1);
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local_irq_save(flags);
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jump_to_uncached();
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for (v = start; v < end; v+=L1_CACHE_BYTES) {
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@ -122,12 +120,10 @@ static void sh2a_flush_icache_range(void *args)
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}
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}
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/* I-Cache invalidate */
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ctrl_outl(addr,
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CACHE_IC_ADDRESS_ARRAY | addr | 0x00000008);
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ctrl_outl(addr, CACHE_IC_ADDRESS_ARRAY | addr | 0x00000008);
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}
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back_to_cached();
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local_irq_restore(flags);
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}
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void __init sh2a_cache_init(void)
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@ -48,7 +48,7 @@ static void sh4_flush_icache_range(void *args)
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struct flusher_data *data = args;
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int icacheaddr;
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unsigned long start, end;
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unsigned long flags, v;
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unsigned long v;
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int i;
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start = data->addr1;
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@ -64,16 +64,13 @@ static void sh4_flush_icache_range(void *args)
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end += L1_CACHE_BYTES-1;
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end &= ~(L1_CACHE_BYTES-1);
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local_irq_save(flags);
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jump_to_uncached();
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for (v = start; v < end; v+=L1_CACHE_BYTES) {
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asm volatile("ocbwb %0"
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: /* no output */
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: "m" (__m(v)));
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__ocbwb(v);
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icacheaddr = CACHE_IC_ADDRESS_ARRAY | (
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v & cpu_data->icache.entry_mask);
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icacheaddr = CACHE_IC_ADDRESS_ARRAY |
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(v & cpu_data->icache.entry_mask);
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for (i = 0; i < cpu_data->icache.ways;
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i++, icacheaddr += cpu_data->icache.way_incr)
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@ -82,14 +79,13 @@ static void sh4_flush_icache_range(void *args)
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}
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back_to_cached();
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local_irq_restore(flags);
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}
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}
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static inline void flush_cache_4096(unsigned long start,
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unsigned long phys)
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{
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unsigned long flags, exec_offset = 0;
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unsigned long exec_offset = 0;
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/*
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* All types of SH-4 require PC to be in P2 to operate on the I-cache.
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@ -99,10 +95,8 @@ static inline void flush_cache_4096(unsigned long start,
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(start < CACHE_OC_ADDRESS_ARRAY))
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exec_offset = 0x20000000;
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local_irq_save(flags);
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__flush_cache_4096(start | SH_CACHE_ASSOC,
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P1SEGADDR(phys), exec_offset);
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local_irq_restore(flags);
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}
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/*
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@ -135,9 +129,8 @@ static void sh4_flush_dcache_page(void *page)
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/* TODO: Selective icache invalidation through IC address array.. */
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static void __uses_jump_to_uncached flush_icache_all(void)
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{
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unsigned long flags, ccr;
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unsigned long ccr;
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local_irq_save(flags);
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jump_to_uncached();
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/* Flush I-cache */
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@ -149,9 +142,7 @@ static void __uses_jump_to_uncached flush_icache_all(void)
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* back_to_cached() will take care of the barrier for us, don't add
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* another one!
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*/
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back_to_cached();
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local_irq_restore(flags);
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}
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static inline void flush_dcache_all(void)
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@ -34,28 +34,22 @@ static inline void
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sh64_setup_dtlb_cache_slot(unsigned long eaddr, unsigned long asid,
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unsigned long paddr)
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{
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local_irq_disable();
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sh64_setup_tlb_slot(dtlb_cache_slot, eaddr, asid, paddr);
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}
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static inline void sh64_teardown_dtlb_cache_slot(void)
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{
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sh64_teardown_tlb_slot(dtlb_cache_slot);
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local_irq_enable();
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}
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static inline void sh64_icache_inv_all(void)
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{
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unsigned long long addr, flag, data;
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unsigned long flags;
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addr = ICCR0;
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flag = ICCR0_ICI;
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data = 0;
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/* Make this a critical section for safety (probably not strictly necessary.) */
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local_irq_save(flags);
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/* Without %1 it gets unexplicably wrong */
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__asm__ __volatile__ (
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"getcfg %3, 0, %0\n\t"
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@ -64,8 +58,6 @@ static inline void sh64_icache_inv_all(void)
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"synci"
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: "=&r" (data)
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: "0" (data), "r" (flag), "r" (addr));
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local_irq_restore(flags);
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}
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static void sh64_icache_inv_kernel_range(unsigned long start, unsigned long end)
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@ -90,7 +82,6 @@ static void sh64_icache_inv_user_page(struct vm_area_struct *vma, unsigned long
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Also, eaddr is page-aligned. */
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unsigned int cpu = smp_processor_id();
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unsigned long long addr, end_addr;
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unsigned long flags = 0;
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unsigned long running_asid, vma_asid;
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addr = eaddr;
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end_addr = addr + PAGE_SIZE;
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@ -111,10 +102,9 @@ static void sh64_icache_inv_user_page(struct vm_area_struct *vma, unsigned long
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running_asid = get_asid();
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vma_asid = cpu_asid(cpu, vma->vm_mm);
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if (running_asid != vma_asid) {
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local_irq_save(flags);
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if (running_asid != vma_asid)
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switch_and_save_asid(vma_asid);
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}
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while (addr < end_addr) {
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/* Worth unrolling a little */
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__asm__ __volatile__("icbi %0, 0" : : "r" (addr));
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@ -123,10 +113,9 @@ static void sh64_icache_inv_user_page(struct vm_area_struct *vma, unsigned long
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__asm__ __volatile__("icbi %0, 96" : : "r" (addr));
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addr += 128;
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}
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if (running_asid != vma_asid) {
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if (running_asid != vma_asid)
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switch_and_save_asid(running_asid);
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local_irq_restore(flags);
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}
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}
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static void sh64_icache_inv_user_page_range(struct mm_struct *mm,
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@ -159,16 +148,12 @@ static void sh64_icache_inv_user_page_range(struct mm_struct *mm,
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unsigned long eaddr;
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unsigned long after_last_page_start;
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unsigned long mm_asid, current_asid;
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unsigned long flags = 0;
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mm_asid = cpu_asid(smp_processor_id(), mm);
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current_asid = get_asid();
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if (mm_asid != current_asid) {
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/* Switch ASID and run the invalidate loop under cli */
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local_irq_save(flags);
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if (mm_asid != current_asid)
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switch_and_save_asid(mm_asid);
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}
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aligned_start = start & PAGE_MASK;
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after_last_page_start = PAGE_SIZE + ((end - 1) & PAGE_MASK);
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@ -194,10 +179,8 @@ static void sh64_icache_inv_user_page_range(struct mm_struct *mm,
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aligned_start = vma->vm_end; /* Skip to start of next region */
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}
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if (mm_asid != current_asid) {
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if (mm_asid != current_asid)
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switch_and_save_asid(current_asid);
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local_irq_restore(flags);
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}
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}
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}
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@ -81,7 +81,6 @@ static void sh7705_flush_icache_range(void *args)
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static void __flush_dcache_page(unsigned long phys)
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{
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unsigned long ways, waysize, addrstart;
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unsigned long flags;
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phys |= SH_CACHE_VALID;
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@ -98,7 +97,6 @@ static void __flush_dcache_page(unsigned long phys)
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* potential cache aliasing, therefore the optimisation is probably not
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* possible.
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*/
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local_irq_save(flags);
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jump_to_uncached();
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ways = current_cpu_data.dcache.ways;
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@ -126,7 +124,6 @@ static void __flush_dcache_page(unsigned long phys)
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} while (--ways);
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back_to_cached();
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local_irq_restore(flags);
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}
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/*
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@ -145,14 +142,9 @@ static void sh7705_flush_dcache_page(void *page)
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static void sh7705_flush_cache_all(void *args)
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{
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unsigned long flags;
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local_irq_save(flags);
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jump_to_uncached();
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cache_wback_all();
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back_to_cached();
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local_irq_restore(flags);
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}
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/*
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