Merge branch 'linus' into irq/core
Reason: Pull in upstream fixes on which new patches depend on.
This commit is contained in:
Thomas Gleixner
Коммит
64c96a57b7
|
|
@ -1,60 +0,0 @@
|
|||
What: /sys/class/leds/dell::kbd_backlight/als_setting
|
||||
Date: December 2014
|
||||
KernelVersion: 3.19
|
||||
Contact: Gabriele Mazzotta <gabriele.mzt@gmail.com>,
|
||||
Pali Rohár <pali.rohar@gmail.com>
|
||||
Description:
|
||||
This file allows to control the automatic keyboard
|
||||
illumination mode on some systems that have an ambient
|
||||
light sensor. Write 1 to this file to enable the auto
|
||||
mode, 0 to disable it.
|
||||
|
||||
What: /sys/class/leds/dell::kbd_backlight/start_triggers
|
||||
Date: December 2014
|
||||
KernelVersion: 3.19
|
||||
Contact: Gabriele Mazzotta <gabriele.mzt@gmail.com>,
|
||||
Pali Rohár <pali.rohar@gmail.com>
|
||||
Description:
|
||||
This file allows to control the input triggers that
|
||||
turn on the keyboard backlight illumination that is
|
||||
disabled because of inactivity.
|
||||
Read the file to see the triggers available. The ones
|
||||
enabled are preceded by '+', those disabled by '-'.
|
||||
|
||||
To enable a trigger, write its name preceded by '+' to
|
||||
this file. To disable a trigger, write its name preceded
|
||||
by '-' instead.
|
||||
|
||||
For example, to enable the keyboard as trigger run:
|
||||
echo +keyboard > /sys/class/leds/dell::kbd_backlight/start_triggers
|
||||
To disable it:
|
||||
echo -keyboard > /sys/class/leds/dell::kbd_backlight/start_triggers
|
||||
|
||||
Note that not all the available triggers can be configured.
|
||||
|
||||
What: /sys/class/leds/dell::kbd_backlight/stop_timeout
|
||||
Date: December 2014
|
||||
KernelVersion: 3.19
|
||||
Contact: Gabriele Mazzotta <gabriele.mzt@gmail.com>,
|
||||
Pali Rohár <pali.rohar@gmail.com>
|
||||
Description:
|
||||
This file allows to specify the interval after which the
|
||||
keyboard illumination is disabled because of inactivity.
|
||||
The timeouts are expressed in seconds, minutes, hours and
|
||||
days, for which the symbols are 's', 'm', 'h' and 'd'
|
||||
respectively.
|
||||
|
||||
To configure the timeout, write to this file a value along
|
||||
with any the above units. If no unit is specified, the value
|
||||
is assumed to be expressed in seconds.
|
||||
|
||||
For example, to set the timeout to 10 minutes run:
|
||||
echo 10m > /sys/class/leds/dell::kbd_backlight/stop_timeout
|
||||
|
||||
Note that when this file is read, the returned value might be
|
||||
expressed in a different unit than the one used when the timeout
|
||||
was set.
|
||||
|
||||
Also note that only some timeouts are supported and that
|
||||
some systems might fall back to a specific timeout in case
|
||||
an invalid timeout is written to this file.
|
||||
|
|
@ -23,7 +23,7 @@ Required nodes:
|
|||
range of 0x200 bytes.
|
||||
|
||||
- syscon: the root node of the Integrator platforms must have a
|
||||
system controller node pointong to the control registers,
|
||||
system controller node pointing to the control registers,
|
||||
with the compatible string
|
||||
"arm,integrator-ap-syscon"
|
||||
"arm,integrator-cp-syscon"
|
||||
|
|
|
|||
|
|
@ -0,0 +1,72 @@
|
|||
* QEMU Firmware Configuration bindings for ARM
|
||||
|
||||
QEMU's arm-softmmu and aarch64-softmmu emulation / virtualization targets
|
||||
provide the following Firmware Configuration interface on the "virt" machine
|
||||
type:
|
||||
|
||||
- A write-only, 16-bit wide selector (or control) register,
|
||||
- a read-write, 64-bit wide data register.
|
||||
|
||||
QEMU exposes the control and data register to ARM guests as memory mapped
|
||||
registers; their location is communicated to the guest's UEFI firmware in the
|
||||
DTB that QEMU places at the bottom of the guest's DRAM.
|
||||
|
||||
The guest writes a selector value (a key) to the selector register, and then
|
||||
can read the corresponding data (produced by QEMU) via the data register. If
|
||||
the selected entry is writable, the guest can rewrite it through the data
|
||||
register.
|
||||
|
||||
The selector register takes keys in big endian byte order.
|
||||
|
||||
The data register allows accesses with 8, 16, 32 and 64-bit width (only at
|
||||
offset 0 of the register). Accesses larger than a byte are interpreted as
|
||||
arrays, bundled together only for better performance. The bytes constituting
|
||||
such a word, in increasing address order, correspond to the bytes that would
|
||||
have been transferred by byte-wide accesses in chronological order.
|
||||
|
||||
The interface allows guest firmware to download various parameters and blobs
|
||||
that affect how the firmware works and what tables it installs for the guest
|
||||
OS. For example, boot order of devices, ACPI tables, SMBIOS tables, kernel and
|
||||
initrd images for direct kernel booting, virtual machine UUID, SMP information,
|
||||
virtual NUMA topology, and so on.
|
||||
|
||||
The authoritative registry of the valid selector values and their meanings is
|
||||
the QEMU source code; the structure of the data blobs corresponding to the
|
||||
individual key values is also defined in the QEMU source code.
|
||||
|
||||
The presence of the registers can be verified by selecting the "signature" blob
|
||||
with key 0x0000, and reading four bytes from the data register. The returned
|
||||
signature is "QEMU".
|
||||
|
||||
The outermost protocol (involving the write / read sequences of the control and
|
||||
data registers) is expected to be versioned, and/or described by feature bits.
|
||||
The interface revision / feature bitmap can be retrieved with key 0x0001. The
|
||||
blob to be read from the data register has size 4, and it is to be interpreted
|
||||
as a uint32_t value in little endian byte order. The current value
|
||||
(corresponding to the above outer protocol) is zero.
|
||||
|
||||
The guest kernel is not expected to use these registers (although it is
|
||||
certainly allowed to); the device tree bindings are documented here because
|
||||
this is where device tree bindings reside in general.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: "qemu,fw-cfg-mmio".
|
||||
|
||||
- reg: the MMIO region used by the device.
|
||||
* Bytes 0x0 to 0x7 cover the data register.
|
||||
* Bytes 0x8 to 0x9 cover the selector register.
|
||||
* Further registers may be appended to the region in case of future interface
|
||||
revisions / feature bits.
|
||||
|
||||
Example:
|
||||
|
||||
/ {
|
||||
#size-cells = <0x2>;
|
||||
#address-cells = <0x2>;
|
||||
|
||||
fw-cfg@9020000 {
|
||||
compatible = "qemu,fw-cfg-mmio";
|
||||
reg = <0x0 0x9020000 0x0 0xa>;
|
||||
};
|
||||
};
|
||||
|
|
@ -19,7 +19,7 @@ type of the connections, they just map their existence. Specific properties
|
|||
may be described by specialized bindings depending on the type of connection.
|
||||
|
||||
To see how this binding applies to video pipelines, for example, see
|
||||
Documentation/device-tree/bindings/media/video-interfaces.txt.
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt.
|
||||
Here the ports describe data interfaces, and the links between them are
|
||||
the connecting data buses. A single port with multiple connections can
|
||||
correspond to multiple devices being connected to the same physical bus.
|
||||
|
|
|
|||
|
|
@ -4,7 +4,8 @@ This file provides information, what the device node
|
|||
for the davinci_emac interface contains.
|
||||
|
||||
Required properties:
|
||||
- compatible: "ti,davinci-dm6467-emac" or "ti,am3517-emac"
|
||||
- compatible: "ti,davinci-dm6467-emac", "ti,am3517-emac" or
|
||||
"ti,dm816-emac"
|
||||
- reg: Offset and length of the register set for the device
|
||||
- ti,davinci-ctrl-reg-offset: offset to control register
|
||||
- ti,davinci-ctrl-mod-reg-offset: offset to control module register
|
||||
|
|
|
|||
|
|
@ -9,7 +9,6 @@ ad Avionic Design GmbH
|
|||
adapteva Adapteva, Inc.
|
||||
adi Analog Devices, Inc.
|
||||
aeroflexgaisler Aeroflex Gaisler AB
|
||||
ak Asahi Kasei Corp.
|
||||
allwinner Allwinner Technology Co., Ltd.
|
||||
altr Altera Corp.
|
||||
amcc Applied Micro Circuits Corporation (APM, formally AMCC)
|
||||
|
|
@ -20,6 +19,7 @@ amstaos AMS-Taos Inc.
|
|||
apm Applied Micro Circuits Corporation (APM)
|
||||
arm ARM Ltd.
|
||||
armadeus ARMadeus Systems SARL
|
||||
asahi-kasei Asahi Kasei Corp.
|
||||
atmel Atmel Corporation
|
||||
auo AU Optronics Corporation
|
||||
avago Avago Technologies
|
||||
|
|
@ -127,6 +127,7 @@ pixcir PIXCIR MICROELECTRONICS Co., Ltd
|
|||
powervr PowerVR (deprecated, use img)
|
||||
qca Qualcomm Atheros, Inc.
|
||||
qcom Qualcomm Technologies, Inc
|
||||
qemu QEMU, a generic and open source machine emulator and virtualizer
|
||||
qnap QNAP Systems, Inc.
|
||||
radxa Radxa
|
||||
raidsonic RaidSonic Technology GmbH
|
||||
|
|
@ -168,6 +169,7 @@ usi Universal Scientific Industrial Co., Ltd.
|
|||
v3 V3 Semiconductor
|
||||
variscite Variscite Ltd.
|
||||
via VIA Technologies, Inc.
|
||||
virtio Virtual I/O Device Specification, developed by the OASIS consortium
|
||||
voipac Voipac Technologies s.r.o.
|
||||
winbond Winbond Electronics corp.
|
||||
wlf Wolfson Microelectronics
|
||||
|
|
|
|||
|
|
@ -1277,6 +1277,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
i8042.notimeout [HW] Ignore timeout condition signalled by controller
|
||||
i8042.reset [HW] Reset the controller during init and cleanup
|
||||
i8042.unlock [HW] Unlock (ignore) the keylock
|
||||
i8042.kbdreset [HW] Reset device connected to KBD port
|
||||
|
||||
i810= [HW,DRM]
|
||||
|
||||
|
|
|
|||
96
MAINTAINERS
96
MAINTAINERS
|
|
@ -754,13 +754,6 @@ L: linux-media@vger.kernel.org
|
|||
S: Maintained
|
||||
F: drivers/media/i2c/aptina-pll.*
|
||||
|
||||
ARASAN COMPACT FLASH PATA CONTROLLER
|
||||
M: Viresh Kumar <viresh.linux@gmail.com>
|
||||
L: linux-ide@vger.kernel.org
|
||||
S: Maintained
|
||||
F: include/linux/pata_arasan_cf_data.h
|
||||
F: drivers/ata/pata_arasan_cf.c
|
||||
|
||||
ARC FRAMEBUFFER DRIVER
|
||||
M: Jaya Kumar <jayalk@intworks.biz>
|
||||
S: Maintained
|
||||
|
|
@ -2346,7 +2339,8 @@ CAN NETWORK LAYER
|
|||
M: Oliver Hartkopp <socketcan@hartkopp.net>
|
||||
L: linux-can@vger.kernel.org
|
||||
W: http://gitorious.org/linux-can
|
||||
T: git git://gitorious.org/linux-can/linux-can-next.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next.git
|
||||
S: Maintained
|
||||
F: Documentation/networking/can.txt
|
||||
F: net/can/
|
||||
|
|
@ -2361,7 +2355,8 @@ M: Wolfgang Grandegger <wg@grandegger.com>
|
|||
M: Marc Kleine-Budde <mkl@pengutronix.de>
|
||||
L: linux-can@vger.kernel.org
|
||||
W: http://gitorious.org/linux-can
|
||||
T: git git://gitorious.org/linux-can/linux-can-next.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next.git
|
||||
S: Maintained
|
||||
F: drivers/net/can/
|
||||
F: include/linux/can/dev.h
|
||||
|
|
@ -4755,14 +4750,14 @@ S: Supported
|
|||
F: drivers/net/ethernet/ibm/ibmveth.*
|
||||
|
||||
IBM Power Virtual SCSI Device Drivers
|
||||
M: Nathan Fontenot <nfont@linux.vnet.ibm.com>
|
||||
M: Tyrel Datwyler <tyreld@linux.vnet.ibm.com>
|
||||
L: linux-scsi@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/scsi/ibmvscsi/ibmvscsi*
|
||||
F: drivers/scsi/ibmvscsi/viosrp.h
|
||||
|
||||
IBM Power Virtual FC Device Drivers
|
||||
M: Brian King <brking@linux.vnet.ibm.com>
|
||||
M: Tyrel Datwyler <tyreld@linux.vnet.ibm.com>
|
||||
L: linux-scsi@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/scsi/ibmvscsi/ibmvfc*
|
||||
|
|
@ -4930,7 +4925,6 @@ F: include/uapi/linux/inotify.h
|
|||
|
||||
INPUT (KEYBOARD, MOUSE, JOYSTICK, TOUCHSCREEN) DRIVERS
|
||||
M: Dmitry Torokhov <dmitry.torokhov@gmail.com>
|
||||
M: Dmitry Torokhov <dtor@mail.ru>
|
||||
L: linux-input@vger.kernel.org
|
||||
Q: http://patchwork.kernel.org/project/linux-input/list/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input.git
|
||||
|
|
@ -4952,7 +4946,6 @@ K: \b(ABS|SYN)_MT_
|
|||
INTEL C600 SERIES SAS CONTROLLER DRIVER
|
||||
M: Intel SCU Linux support <intel-linux-scu@intel.com>
|
||||
M: Artur Paszkiewicz <artur.paszkiewicz@intel.com>
|
||||
M: Dave Jiang <dave.jiang@intel.com>
|
||||
L: linux-scsi@vger.kernel.org
|
||||
T: git git://git.code.sf.net/p/intel-sas/isci
|
||||
S: Supported
|
||||
|
|
@ -5703,6 +5696,49 @@ F: drivers/lguest/
|
|||
F: include/linux/lguest*.h
|
||||
F: tools/lguest/
|
||||
|
||||
LIBATA SUBSYSTEM (Serial and Parallel ATA drivers)
|
||||
M: Tejun Heo <tj@kernel.org>
|
||||
L: linux-ide@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
|
||||
S: Maintained
|
||||
F: drivers/ata/
|
||||
F: include/linux/ata.h
|
||||
F: include/linux/libata.h
|
||||
|
||||
LIBATA PATA ARASAN COMPACT FLASH CONTROLLER
|
||||
M: Viresh Kumar <viresh.linux@gmail.com>
|
||||
L: linux-ide@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
|
||||
S: Maintained
|
||||
F: include/linux/pata_arasan_cf_data.h
|
||||
F: drivers/ata/pata_arasan_cf.c
|
||||
|
||||
LIBATA PATA DRIVERS
|
||||
M: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
|
||||
M: Tejun Heo <tj@kernel.org>
|
||||
L: linux-ide@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
|
||||
S: Maintained
|
||||
F: drivers/ata/pata_*.c
|
||||
F: drivers/ata/ata_generic.c
|
||||
|
||||
LIBATA SATA AHCI PLATFORM devices support
|
||||
M: Hans de Goede <hdegoede@redhat.com>
|
||||
M: Tejun Heo <tj@kernel.org>
|
||||
L: linux-ide@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
|
||||
S: Maintained
|
||||
F: drivers/ata/ahci_platform.c
|
||||
F: drivers/ata/libahci_platform.c
|
||||
F: include/linux/ahci_platform.h
|
||||
|
||||
LIBATA SATA PROMISE TX2/TX4 CONTROLLER DRIVER
|
||||
M: Mikael Pettersson <mikpelinux@gmail.com>
|
||||
L: linux-ide@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
|
||||
S: Maintained
|
||||
F: drivers/ata/sata_promise.*
|
||||
|
||||
LIBLOCKDEP
|
||||
M: Sasha Levin <sasha.levin@oracle.com>
|
||||
S: Maintained
|
||||
|
|
@ -6987,14 +7023,12 @@ OPEN FIRMWARE AND FLATTENED DEVICE TREE
|
|||
M: Grant Likely <grant.likely@linaro.org>
|
||||
M: Rob Herring <robh+dt@kernel.org>
|
||||
L: devicetree@vger.kernel.org
|
||||
W: http://fdt.secretlab.ca
|
||||
T: git git://git.secretlab.ca/git/linux-2.6.git
|
||||
W: http://www.devicetree.org/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux.git
|
||||
S: Maintained
|
||||
F: drivers/of/
|
||||
F: include/linux/of*.h
|
||||
F: scripts/dtc/
|
||||
K: of_get_property
|
||||
K: of_match_table
|
||||
|
||||
OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
|
||||
M: Rob Herring <robh+dt@kernel.org>
|
||||
|
|
@ -7239,7 +7273,7 @@ S: Maintained
|
|||
F: drivers/pci/host/*layerscape*
|
||||
|
||||
PCI DRIVER FOR IMX6
|
||||
M: Richard Zhu <r65037@freescale.com>
|
||||
M: Richard Zhu <Richard.Zhu@freescale.com>
|
||||
M: Lucas Stach <l.stach@pengutronix.de>
|
||||
L: linux-pci@vger.kernel.org
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
|
|
@ -7409,6 +7443,7 @@ F: drivers/crypto/picoxcell*
|
|||
PIN CONTROL SUBSYSTEM
|
||||
M: Linus Walleij <linus.walleij@linaro.org>
|
||||
L: linux-gpio@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git
|
||||
S: Maintained
|
||||
F: drivers/pinctrl/
|
||||
F: include/linux/pinctrl/
|
||||
|
|
@ -7576,12 +7611,6 @@ W: http://wireless.kernel.org/en/users/Drivers/p54
|
|||
S: Obsolete
|
||||
F: drivers/net/wireless/prism54/
|
||||
|
||||
PROMISE SATA TX2/TX4 CONTROLLER LIBATA DRIVER
|
||||
M: Mikael Pettersson <mikpelinux@gmail.com>
|
||||
L: linux-ide@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/ata/sata_promise.*
|
||||
|
||||
PS3 NETWORK SUPPORT
|
||||
M: Geoff Levand <geoff@infradead.org>
|
||||
L: netdev@vger.kernel.org
|
||||
|
|
@ -8555,25 +8584,6 @@ S: Maintained
|
|||
F: drivers/misc/phantom.c
|
||||
F: include/uapi/linux/phantom.h
|
||||
|
||||
SERIAL ATA (SATA) SUBSYSTEM
|
||||
M: Tejun Heo <tj@kernel.org>
|
||||
L: linux-ide@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
|
||||
S: Supported
|
||||
F: drivers/ata/
|
||||
F: include/linux/ata.h
|
||||
F: include/linux/libata.h
|
||||
|
||||
SERIAL ATA AHCI PLATFORM devices support
|
||||
M: Hans de Goede <hdegoede@redhat.com>
|
||||
M: Tejun Heo <tj@kernel.org>
|
||||
L: linux-ide@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
|
||||
S: Supported
|
||||
F: drivers/ata/ahci_platform.c
|
||||
F: drivers/ata/libahci_platform.c
|
||||
F: include/linux/ahci_platform.h
|
||||
|
||||
SERVER ENGINES 10Gbps iSCSI - BladeEngine 2 DRIVER
|
||||
M: Jayamohan Kallickal <jayamohan.kallickal@emulex.com>
|
||||
L: linux-scsi@vger.kernel.org
|
||||
|
|
|
|||
2
Makefile
2
Makefile
|
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 19
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc5
|
||||
EXTRAVERSION = -rc6
|
||||
NAME = Diseased Newt
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
|||
|
|
@ -285,8 +285,12 @@ pcibios_claim_one_bus(struct pci_bus *b)
|
|||
if (r->parent || !r->start || !r->flags)
|
||||
continue;
|
||||
if (pci_has_flag(PCI_PROBE_ONLY) ||
|
||||
(r->flags & IORESOURCE_PCI_FIXED))
|
||||
pci_claim_resource(dev, i);
|
||||
(r->flags & IORESOURCE_PCI_FIXED)) {
|
||||
if (pci_claim_resource(dev, i) == 0)
|
||||
continue;
|
||||
|
||||
pci_claim_bridge_resource(dev, i);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1257,6 +1257,8 @@
|
|||
tx-fifo-resize;
|
||||
maximum-speed = "super-speed";
|
||||
dr_mode = "otg";
|
||||
snps,dis_u3_susphy_quirk;
|
||||
snps,dis_u2_susphy_quirk;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -1278,6 +1280,8 @@
|
|||
tx-fifo-resize;
|
||||
maximum-speed = "high-speed";
|
||||
dr_mode = "otg";
|
||||
snps,dis_u3_susphy_quirk;
|
||||
snps,dis_u2_susphy_quirk;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -1299,6 +1303,8 @@
|
|||
tx-fifo-resize;
|
||||
maximum-speed = "high-speed";
|
||||
dr_mode = "otg";
|
||||
snps,dis_u3_susphy_quirk;
|
||||
snps,dis_u2_susphy_quirk;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -369,7 +369,7 @@
|
|||
compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
|
||||
#pwm-cells = <2>;
|
||||
reg = <0x53fa0000 0x4000>;
|
||||
clocks = <&clks 106>, <&clks 36>;
|
||||
clocks = <&clks 106>, <&clks 52>;
|
||||
clock-names = "ipg", "per";
|
||||
interrupts = <36>;
|
||||
};
|
||||
|
|
@ -388,7 +388,7 @@
|
|||
compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
|
||||
#pwm-cells = <2>;
|
||||
reg = <0x53fa8000 0x4000>;
|
||||
clocks = <&clks 107>, <&clks 36>;
|
||||
clocks = <&clks 107>, <&clks 52>;
|
||||
clock-names = "ipg", "per";
|
||||
interrupts = <41>;
|
||||
};
|
||||
|
|
@ -429,7 +429,7 @@
|
|||
pwm4: pwm@53fc8000 {
|
||||
compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
|
||||
reg = <0x53fc8000 0x4000>;
|
||||
clocks = <&clks 108>, <&clks 36>;
|
||||
clocks = <&clks 108>, <&clks 52>;
|
||||
clock-names = "ipg", "per";
|
||||
interrupts = <42>;
|
||||
};
|
||||
|
|
@ -476,7 +476,7 @@
|
|||
compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
|
||||
#pwm-cells = <2>;
|
||||
reg = <0x53fe0000 0x4000>;
|
||||
clocks = <&clks 105>, <&clks 36>;
|
||||
clocks = <&clks 105>, <&clks 52>;
|
||||
clock-names = "ipg", "per";
|
||||
interrupts = <26>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -406,7 +406,7 @@
|
|||
clock-frequency = <400000>;
|
||||
|
||||
magnetometer@c {
|
||||
compatible = "ak,ak8975";
|
||||
compatible = "asahi-kasei,ak8975";
|
||||
reg = <0xc>;
|
||||
interrupt-parent = <&gpio>;
|
||||
interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
|
|||
|
|
@ -253,21 +253,22 @@
|
|||
.endm
|
||||
|
||||
.macro restore_user_regs, fast = 0, offset = 0
|
||||
ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
|
||||
ldr lr, [sp, #\offset + S_PC]! @ get pc
|
||||
mov r2, sp
|
||||
ldr r1, [r2, #\offset + S_PSR] @ get calling cpsr
|
||||
ldr lr, [r2, #\offset + S_PC]! @ get pc
|
||||
msr spsr_cxsf, r1 @ save in spsr_svc
|
||||
#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K)
|
||||
@ We must avoid clrex due to Cortex-A15 erratum #830321
|
||||
strex r1, r2, [sp] @ clear the exclusive monitor
|
||||
strex r1, r2, [r2] @ clear the exclusive monitor
|
||||
#endif
|
||||
.if \fast
|
||||
ldmdb sp, {r1 - lr}^ @ get calling r1 - lr
|
||||
ldmdb r2, {r1 - lr}^ @ get calling r1 - lr
|
||||
.else
|
||||
ldmdb sp, {r0 - lr}^ @ get calling r0 - lr
|
||||
ldmdb r2, {r0 - lr}^ @ get calling r0 - lr
|
||||
.endif
|
||||
mov r0, r0 @ ARMv5T and earlier require a nop
|
||||
@ after ldm {}^
|
||||
add sp, sp, #S_FRAME_SIZE - S_PC
|
||||
add sp, sp, #\offset + S_FRAME_SIZE
|
||||
movs pc, lr @ return & move spsr_svc into cpsr
|
||||
.endm
|
||||
|
||||
|
|
|
|||
|
|
@ -116,8 +116,14 @@ int armpmu_event_set_period(struct perf_event *event)
|
|||
ret = 1;
|
||||
}
|
||||
|
||||
if (left > (s64)armpmu->max_period)
|
||||
left = armpmu->max_period;
|
||||
/*
|
||||
* Limit the maximum period to prevent the counter value
|
||||
* from overtaking the one we are about to program. In
|
||||
* effect we are reducing max_period to account for
|
||||
* interrupt latency (and we are being very conservative).
|
||||
*/
|
||||
if (left > (armpmu->max_period >> 1))
|
||||
left = armpmu->max_period >> 1;
|
||||
|
||||
local64_set(&hwc->prev_count, (u64)-left);
|
||||
|
||||
|
|
|
|||
|
|
@ -657,10 +657,13 @@ int __init arm_add_memory(u64 start, u64 size)
|
|||
|
||||
/*
|
||||
* Ensure that start/size are aligned to a page boundary.
|
||||
* Size is appropriately rounded down, start is rounded up.
|
||||
* Size is rounded down, start is rounded up.
|
||||
*/
|
||||
size -= start & ~PAGE_MASK;
|
||||
aligned_start = PAGE_ALIGN(start);
|
||||
if (aligned_start > start + size)
|
||||
size = 0;
|
||||
else
|
||||
size -= aligned_start - start;
|
||||
|
||||
#ifndef CONFIG_ARCH_PHYS_ADDR_T_64BIT
|
||||
if (aligned_start > ULONG_MAX) {
|
||||
|
|
|
|||
|
|
@ -246,9 +246,14 @@ static int coherency_type(void)
|
|||
return type;
|
||||
}
|
||||
|
||||
/*
|
||||
* As a precaution, we currently completely disable hardware I/O
|
||||
* coherency, until enough testing is done with automatic I/O
|
||||
* synchronization barriers to validate that it is a proper solution.
|
||||
*/
|
||||
int coherency_available(void)
|
||||
{
|
||||
return coherency_type() != COHERENCY_FABRIC_TYPE_NONE;
|
||||
return false;
|
||||
}
|
||||
|
||||
int __init coherency_init(void)
|
||||
|
|
|
|||
|
|
@ -211,6 +211,7 @@ extern struct device *omap2_get_iva_device(void);
|
|||
extern struct device *omap2_get_l3_device(void);
|
||||
extern struct device *omap4_get_dsp_device(void);
|
||||
|
||||
unsigned int omap4_xlate_irq(unsigned int hwirq);
|
||||
void omap_gic_of_init(void);
|
||||
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
|
|
|
|||
|
|
@ -256,6 +256,38 @@ static int __init omap4_sar_ram_init(void)
|
|||
}
|
||||
omap_early_initcall(omap4_sar_ram_init);
|
||||
|
||||
static struct of_device_id gic_match[] = {
|
||||
{ .compatible = "arm,cortex-a9-gic", },
|
||||
{ .compatible = "arm,cortex-a15-gic", },
|
||||
{ },
|
||||
};
|
||||
|
||||
static struct device_node *gic_node;
|
||||
|
||||
unsigned int omap4_xlate_irq(unsigned int hwirq)
|
||||
{
|
||||
struct of_phandle_args irq_data;
|
||||
unsigned int irq;
|
||||
|
||||
if (!gic_node)
|
||||
gic_node = of_find_matching_node(NULL, gic_match);
|
||||
|
||||
if (WARN_ON(!gic_node))
|
||||
return hwirq;
|
||||
|
||||
irq_data.np = gic_node;
|
||||
irq_data.args_count = 3;
|
||||
irq_data.args[0] = 0;
|
||||
irq_data.args[1] = hwirq - OMAP44XX_IRQ_GIC_START;
|
||||
irq_data.args[2] = IRQ_TYPE_LEVEL_HIGH;
|
||||
|
||||
irq = irq_create_of_mapping(&irq_data);
|
||||
if (WARN_ON(!irq))
|
||||
irq = hwirq;
|
||||
|
||||
return irq;
|
||||
}
|
||||
|
||||
void __init omap_gic_of_init(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
|
|
|||
|
|
@ -3534,9 +3534,15 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
|
|||
|
||||
mpu_irqs_cnt = _count_mpu_irqs(oh);
|
||||
for (i = 0; i < mpu_irqs_cnt; i++) {
|
||||
unsigned int irq;
|
||||
|
||||
if (oh->xlate_irq)
|
||||
irq = oh->xlate_irq((oh->mpu_irqs + i)->irq);
|
||||
else
|
||||
irq = (oh->mpu_irqs + i)->irq;
|
||||
(res + r)->name = (oh->mpu_irqs + i)->name;
|
||||
(res + r)->start = (oh->mpu_irqs + i)->irq;
|
||||
(res + r)->end = (oh->mpu_irqs + i)->irq;
|
||||
(res + r)->start = irq;
|
||||
(res + r)->end = irq;
|
||||
(res + r)->flags = IORESOURCE_IRQ;
|
||||
r++;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -676,6 +676,7 @@ struct omap_hwmod {
|
|||
spinlock_t _lock;
|
||||
struct list_head node;
|
||||
struct omap_hwmod_ocp_if *_mpu_port;
|
||||
unsigned int (*xlate_irq)(unsigned int);
|
||||
u16 flags;
|
||||
u8 mpu_rt_idx;
|
||||
u8 response_lat;
|
||||
|
|
|
|||
|
|
@ -479,6 +479,7 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = {
|
|||
.class = &omap44xx_dma_hwmod_class,
|
||||
.clkdm_name = "l3_dma_clkdm",
|
||||
.mpu_irqs = omap44xx_dma_system_irqs,
|
||||
.xlate_irq = omap4_xlate_irq,
|
||||
.main_clk = "l3_div_ck",
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
|
|
@ -640,6 +641,7 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
|
|||
.class = &omap44xx_dispc_hwmod_class,
|
||||
.clkdm_name = "l3_dss_clkdm",
|
||||
.mpu_irqs = omap44xx_dss_dispc_irqs,
|
||||
.xlate_irq = omap4_xlate_irq,
|
||||
.sdma_reqs = omap44xx_dss_dispc_sdma_reqs,
|
||||
.main_clk = "dss_dss_clk",
|
||||
.prcm = {
|
||||
|
|
@ -693,6 +695,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
|
|||
.class = &omap44xx_dsi_hwmod_class,
|
||||
.clkdm_name = "l3_dss_clkdm",
|
||||
.mpu_irqs = omap44xx_dss_dsi1_irqs,
|
||||
.xlate_irq = omap4_xlate_irq,
|
||||
.sdma_reqs = omap44xx_dss_dsi1_sdma_reqs,
|
||||
.main_clk = "dss_dss_clk",
|
||||
.prcm = {
|
||||
|
|
@ -726,6 +729,7 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = {
|
|||
.class = &omap44xx_dsi_hwmod_class,
|
||||
.clkdm_name = "l3_dss_clkdm",
|
||||
.mpu_irqs = omap44xx_dss_dsi2_irqs,
|
||||
.xlate_irq = omap4_xlate_irq,
|
||||
.sdma_reqs = omap44xx_dss_dsi2_sdma_reqs,
|
||||
.main_clk = "dss_dss_clk",
|
||||
.prcm = {
|
||||
|
|
@ -784,6 +788,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
|
|||
*/
|
||||
.flags = HWMOD_SWSUP_SIDLE,
|
||||
.mpu_irqs = omap44xx_dss_hdmi_irqs,
|
||||
.xlate_irq = omap4_xlate_irq,
|
||||
.sdma_reqs = omap44xx_dss_hdmi_sdma_reqs,
|
||||
.main_clk = "dss_48mhz_clk",
|
||||
.prcm = {
|
||||
|
|
|
|||
|
|
@ -288,6 +288,7 @@ static struct omap_hwmod omap54xx_dma_system_hwmod = {
|
|||
.class = &omap54xx_dma_hwmod_class,
|
||||
.clkdm_name = "dma_clkdm",
|
||||
.mpu_irqs = omap54xx_dma_system_irqs,
|
||||
.xlate_irq = omap4_xlate_irq,
|
||||
.main_clk = "l3_iclk_div",
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
|
|
|
|||
|
|
@ -498,6 +498,7 @@ struct omap_prcm_irq_setup {
|
|||
u8 nr_irqs;
|
||||
const struct omap_prcm_irq *irqs;
|
||||
int irq;
|
||||
unsigned int (*xlate_irq)(unsigned int);
|
||||
void (*read_pending_irqs)(unsigned long *events);
|
||||
void (*ocp_barrier)(void);
|
||||
void (*save_and_clear_irqen)(u32 *saved_mask);
|
||||
|
|
|
|||
|
|
@ -49,6 +49,7 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
|
|||
.irqs = omap4_prcm_irqs,
|
||||
.nr_irqs = ARRAY_SIZE(omap4_prcm_irqs),
|
||||
.irq = 11 + OMAP44XX_IRQ_GIC_START,
|
||||
.xlate_irq = omap4_xlate_irq,
|
||||
.read_pending_irqs = &omap44xx_prm_read_pending_irqs,
|
||||
.ocp_barrier = &omap44xx_prm_ocp_barrier,
|
||||
.save_and_clear_irqen = &omap44xx_prm_save_and_clear_irqen,
|
||||
|
|
@ -751,8 +752,10 @@ static int omap44xx_prm_late_init(void)
|
|||
}
|
||||
|
||||
/* Once OMAP4 DT is filled as well */
|
||||
if (irq_num >= 0)
|
||||
if (irq_num >= 0) {
|
||||
omap4_prcm_irq_setup.irq = irq_num;
|
||||
omap4_prcm_irq_setup.xlate_irq = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
omap44xx_prm_enable_io_wakeup();
|
||||
|
|
|
|||
|
|
@ -187,6 +187,7 @@ int omap_prcm_event_to_irq(const char *name)
|
|||
*/
|
||||
void omap_prcm_irq_cleanup(void)
|
||||
{
|
||||
unsigned int irq;
|
||||
int i;
|
||||
|
||||
if (!prcm_irq_setup) {
|
||||
|
|
@ -211,7 +212,11 @@ void omap_prcm_irq_cleanup(void)
|
|||
kfree(prcm_irq_setup->priority_mask);
|
||||
prcm_irq_setup->priority_mask = NULL;
|
||||
|
||||
irq_set_chained_handler(prcm_irq_setup->irq, NULL);
|
||||
if (prcm_irq_setup->xlate_irq)
|
||||
irq = prcm_irq_setup->xlate_irq(prcm_irq_setup->irq);
|
||||
else
|
||||
irq = prcm_irq_setup->irq;
|
||||
irq_set_chained_handler(irq, NULL);
|
||||
|
||||
if (prcm_irq_setup->base_irq > 0)
|
||||
irq_free_descs(prcm_irq_setup->base_irq,
|
||||
|
|
@ -259,6 +264,7 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
|
|||
int offset, i;
|
||||
struct irq_chip_generic *gc;
|
||||
struct irq_chip_type *ct;
|
||||
unsigned int irq;
|
||||
|
||||
if (!irq_setup)
|
||||
return -EINVAL;
|
||||
|
|
@ -298,7 +304,11 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
|
|||
1 << (offset & 0x1f);
|
||||
}
|
||||
|
||||
irq_set_chained_handler(irq_setup->irq, omap_prcm_irq_handler);
|
||||
if (irq_setup->xlate_irq)
|
||||
irq = irq_setup->xlate_irq(irq_setup->irq);
|
||||
else
|
||||
irq = irq_setup->irq;
|
||||
irq_set_chained_handler(irq, omap_prcm_irq_handler);
|
||||
|
||||
irq_setup->base_irq = irq_alloc_descs(-1, 0, irq_setup->nr_regs * 32,
|
||||
0);
|
||||
|
|
|
|||
|
|
@ -66,19 +66,24 @@ void __init omap_pmic_init(int bus, u32 clkrate,
|
|||
omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP4
|
||||
void __init omap4_pmic_init(const char *pmic_type,
|
||||
struct twl4030_platform_data *pmic_data,
|
||||
struct i2c_board_info *devices, int nr_devices)
|
||||
{
|
||||
/* PMIC part*/
|
||||
unsigned int irq;
|
||||
|
||||
omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
|
||||
omap_mux_init_signal("fref_clk0_out.sys_drm_msecure", OMAP_PIN_OUTPUT);
|
||||
omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data);
|
||||
irq = omap4_xlate_irq(7 + OMAP44XX_IRQ_GIC_START);
|
||||
omap_pmic_init(1, 400, pmic_type, irq, pmic_data);
|
||||
|
||||
/* Register additional devices on i2c1 bus if needed */
|
||||
if (devices)
|
||||
i2c_register_board_info(1, devices, nr_devices);
|
||||
}
|
||||
#endif
|
||||
|
||||
void __init omap_pmic_late_init(void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -576,11 +576,18 @@ void __init r8a7778_init_irq_extpin(int irlm)
|
|||
void __init r8a7778_init_irq_dt(void)
|
||||
{
|
||||
void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000);
|
||||
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
|
||||
void __iomem *gic_dist_base = ioremap_nocache(0xfe438000, 0x1000);
|
||||
void __iomem *gic_cpu_base = ioremap_nocache(0xfe430000, 0x1000);
|
||||
#endif
|
||||
|
||||
BUG_ON(!base);
|
||||
|
||||
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
|
||||
gic_init(0, 29, gic_dist_base, gic_cpu_base);
|
||||
#else
|
||||
irqchip_init();
|
||||
|
||||
#endif
|
||||
/* route all interrupts to ARM */
|
||||
__raw_writel(0x73ffffff, base + INT2NTSR0);
|
||||
__raw_writel(0xffffffff, base + INT2NTSR1);
|
||||
|
|
|
|||
|
|
@ -720,10 +720,17 @@ static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
|
|||
|
||||
void __init r8a7779_init_irq_dt(void)
|
||||
{
|
||||
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
|
||||
void __iomem *gic_dist_base = ioremap_nocache(0xf0001000, 0x1000);
|
||||
void __iomem *gic_cpu_base = ioremap_nocache(0xf0000100, 0x1000);
|
||||
#endif
|
||||
gic_arch_extn.irq_set_wake = r8a7779_set_wake;
|
||||
|
||||
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
|
||||
gic_init(0, 29, gic_dist_base, gic_cpu_base);
|
||||
#else
|
||||
irqchip_init();
|
||||
|
||||
#endif
|
||||
/* route all interrupts to ARM */
|
||||
__raw_writel(0xffffffff, INT2NTSR0);
|
||||
__raw_writel(0x3fffffff, INT2NTSR1);
|
||||
|
|
|
|||
|
|
@ -85,6 +85,7 @@ vdso_install:
|
|||
# We use MRPROPER_FILES and CLEAN_FILES now
|
||||
archclean:
|
||||
$(Q)$(MAKE) $(clean)=$(boot)
|
||||
$(Q)$(MAKE) $(clean)=$(boot)/dts
|
||||
|
||||
define archhelp
|
||||
echo '* Image.gz - Compressed kernel image (arch/$(ARCH)/boot/Image.gz)'
|
||||
|
|
|
|||
|
|
@ -3,6 +3,4 @@ dts-dirs += apm
|
|||
dts-dirs += arm
|
||||
dts-dirs += cavium
|
||||
|
||||
always := $(dtb-y)
|
||||
subdir-y := $(dts-dirs)
|
||||
clean-files := *.dtb
|
||||
|
|
|
|||
|
|
@ -22,7 +22,7 @@
|
|||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &soc_uart0;
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
psci {
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@
|
|||
*/
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/fs.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/seq_file.h>
|
||||
|
|
|
|||
|
|
@ -19,12 +19,10 @@
|
|||
#include <linux/moduleloader.h>
|
||||
#include <linux/vmalloc.h>
|
||||
|
||||
void module_free(struct module *mod, void *module_region)
|
||||
void module_arch_freeing_init(struct module *mod)
|
||||
{
|
||||
vfree(mod->arch.syminfo);
|
||||
mod->arch.syminfo = NULL;
|
||||
|
||||
vfree(module_region);
|
||||
}
|
||||
|
||||
static inline int check_rela(Elf32_Rela *rela, struct module *module,
|
||||
|
|
@ -291,12 +289,3 @@ int apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab,
|
|||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int module_finalize(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs,
|
||||
struct module *module)
|
||||
{
|
||||
vfree(module->arch.syminfo);
|
||||
module->arch.syminfo = NULL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -604,7 +604,7 @@ static ssize_t __sync_serial_read(struct file *file,
|
|||
struct timespec *ts)
|
||||
{
|
||||
unsigned long flags;
|
||||
int dev = MINOR(file->f_dentry->d_inode->i_rdev);
|
||||
int dev = MINOR(file_inode(file)->i_rdev);
|
||||
int avail;
|
||||
struct sync_port *port;
|
||||
unsigned char *start;
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@ void *module_alloc(unsigned long size)
|
|||
}
|
||||
|
||||
/* Free memory returned from module_alloc */
|
||||
void module_free(struct module *mod, void *module_region)
|
||||
void module_memfree(void *module_region)
|
||||
{
|
||||
kfree(module_region);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -94,7 +94,7 @@ static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
|
|||
r = &dev->resource[idx];
|
||||
if (!r->start)
|
||||
continue;
|
||||
pci_claim_resource(dev, idx);
|
||||
pci_claim_bridge_resource(dev, idx);
|
||||
}
|
||||
}
|
||||
pcibios_allocate_bus_resources(&bus->children);
|
||||
|
|
|
|||
|
|
@ -305,14 +305,12 @@ plt_target (struct plt_entry *plt)
|
|||
#endif /* !USE_BRL */
|
||||
|
||||
void
|
||||
module_free (struct module *mod, void *module_region)
|
||||
module_arch_freeing_init (struct module *mod)
|
||||
{
|
||||
if (mod && mod->arch.init_unw_table &&
|
||||
module_region == mod->module_init) {
|
||||
if (mod->arch.init_unw_table) {
|
||||
unw_remove_unwind_table(mod->arch.init_unw_table);
|
||||
mod->arch.init_unw_table = NULL;
|
||||
}
|
||||
vfree(module_region);
|
||||
}
|
||||
|
||||
/* Have we already seen one of these relocations? */
|
||||
|
|
|
|||
|
|
@ -487,45 +487,39 @@ int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int is_valid_resource(struct pci_dev *dev, int idx)
|
||||
{
|
||||
unsigned int i, type_mask = IORESOURCE_IO | IORESOURCE_MEM;
|
||||
struct resource *devr = &dev->resource[idx], *busr;
|
||||
|
||||
if (!dev->bus)
|
||||
return 0;
|
||||
|
||||
pci_bus_for_each_resource(dev->bus, busr, i) {
|
||||
if (!busr || ((busr->flags ^ devr->flags) & type_mask))
|
||||
continue;
|
||||
if ((devr->start) && (devr->start >= busr->start) &&
|
||||
(devr->end <= busr->end))
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void pcibios_fixup_resources(struct pci_dev *dev, int start, int limit)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = start; i < limit; i++) {
|
||||
if (!dev->resource[i].flags)
|
||||
continue;
|
||||
if ((is_valid_resource(dev, i)))
|
||||
pci_claim_resource(dev, i);
|
||||
}
|
||||
}
|
||||
|
||||
void pcibios_fixup_device_resources(struct pci_dev *dev)
|
||||
{
|
||||
pcibios_fixup_resources(dev, 0, PCI_BRIDGE_RESOURCES);
|
||||
int idx;
|
||||
|
||||
if (!dev->bus)
|
||||
return;
|
||||
|
||||
for (idx = 0; idx < PCI_BRIDGE_RESOURCES; idx++) {
|
||||
struct resource *r = &dev->resource[idx];
|
||||
|
||||
if (!r->flags || r->parent || !r->start)
|
||||
continue;
|
||||
|
||||
pci_claim_resource(dev, idx);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pcibios_fixup_device_resources);
|
||||
|
||||
static void pcibios_fixup_bridge_resources(struct pci_dev *dev)
|
||||
{
|
||||
pcibios_fixup_resources(dev, PCI_BRIDGE_RESOURCES, PCI_NUM_RESOURCES);
|
||||
int idx;
|
||||
|
||||
if (!dev->bus)
|
||||
return;
|
||||
|
||||
for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) {
|
||||
struct resource *r = &dev->resource[idx];
|
||||
|
||||
if (!r->flags || r->parent || !r->start)
|
||||
continue;
|
||||
|
||||
pci_claim_bridge_resource(dev, idx);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1026,6 +1026,8 @@ static void pcibios_allocate_bus_resources(struct pci_bus *bus)
|
|||
pr, (pr && pr->name) ? pr->name : "nil");
|
||||
|
||||
if (pr && !(pr->flags & IORESOURCE_UNSET)) {
|
||||
struct pci_dev *dev = bus->self;
|
||||
|
||||
if (request_resource(pr, res) == 0)
|
||||
continue;
|
||||
/*
|
||||
|
|
@ -1035,6 +1037,12 @@ static void pcibios_allocate_bus_resources(struct pci_bus *bus)
|
|||
*/
|
||||
if (reparent_resources(pr, res) == 0)
|
||||
continue;
|
||||
|
||||
if (dev && i < PCI_BRIDGE_RESOURCE_NUM &&
|
||||
pci_claim_bridge_resource(dev,
|
||||
i + PCI_BRIDGE_RESOURCES) == 0)
|
||||
continue;
|
||||
|
||||
}
|
||||
pr_warn("PCI: Cannot allocate resource region ");
|
||||
pr_cont("%d of PCI bridge %d, will remap\n", i, bus->number);
|
||||
|
|
@ -1227,7 +1235,10 @@ void pcibios_claim_one_bus(struct pci_bus *bus)
|
|||
(unsigned long long)r->end,
|
||||
(unsigned int)r->flags);
|
||||
|
||||
pci_claim_resource(dev, i);
|
||||
if (pci_claim_resource(dev, i) == 0)
|
||||
continue;
|
||||
|
||||
pci_claim_bridge_resource(dev, i);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1388,7 +1388,7 @@ out:
|
|||
void bpf_jit_free(struct bpf_prog *fp)
|
||||
{
|
||||
if (fp->jited)
|
||||
module_free(NULL, fp->bpf_func);
|
||||
module_memfree(fp->bpf_func);
|
||||
|
||||
bpf_prog_unlock_free(fp);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -106,7 +106,7 @@ static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
|
|||
if (!r->flags)
|
||||
continue;
|
||||
if (!r->start ||
|
||||
pci_claim_resource(dev, idx) < 0) {
|
||||
pci_claim_bridge_resource(dev, idx) < 0) {
|
||||
printk(KERN_ERR "PCI:"
|
||||
" Cannot allocate resource"
|
||||
" region %d of bridge %s\n",
|
||||
|
|
|
|||
|
|
@ -281,42 +281,37 @@ static int __init pci_check_direct(void)
|
|||
return -ENODEV;
|
||||
}
|
||||
|
||||
static int is_valid_resource(struct pci_dev *dev, int idx)
|
||||
{
|
||||
unsigned int i, type_mask = IORESOURCE_IO | IORESOURCE_MEM;
|
||||
struct resource *devr = &dev->resource[idx], *busr;
|
||||
|
||||
if (dev->bus) {
|
||||
pci_bus_for_each_resource(dev->bus, busr, i) {
|
||||
if (!busr || (busr->flags ^ devr->flags) & type_mask)
|
||||
continue;
|
||||
|
||||
if (devr->start &&
|
||||
devr->start >= busr->start &&
|
||||
devr->end <= busr->end)
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void pcibios_fixup_device_resources(struct pci_dev *dev)
|
||||
{
|
||||
int limit, i;
|
||||
int idx;
|
||||
|
||||
if (dev->bus->number != 0)
|
||||
if (!dev->bus)
|
||||
return;
|
||||
|
||||
limit = (dev->hdr_type == PCI_HEADER_TYPE_NORMAL) ?
|
||||
PCI_BRIDGE_RESOURCES : PCI_NUM_RESOURCES;
|
||||
for (idx = 0; idx < PCI_BRIDGE_RESOURCES; idx++) {
|
||||
struct resource *r = &dev->resource[idx];
|
||||
|
||||
for (i = 0; i < limit; i++) {
|
||||
if (!dev->resource[i].flags)
|
||||
if (!r->flags || r->parent || !r->start)
|
||||
continue;
|
||||
|
||||
if (is_valid_resource(dev, i))
|
||||
pci_claim_resource(dev, i);
|
||||
pci_claim_resource(dev, idx);
|
||||
}
|
||||
}
|
||||
|
||||
static void pcibios_fixup_bridge_resources(struct pci_dev *dev)
|
||||
{
|
||||
int idx;
|
||||
|
||||
if (!dev->bus)
|
||||
return;
|
||||
|
||||
for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) {
|
||||
struct resource *r = &dev->resource[idx];
|
||||
|
||||
if (!r->flags || r->parent || !r->start)
|
||||
continue;
|
||||
|
||||
pci_claim_bridge_resource(dev, idx);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -330,7 +325,7 @@ void pcibios_fixup_bus(struct pci_bus *bus)
|
|||
|
||||
if (bus->self) {
|
||||
pci_read_bridge_bases(bus);
|
||||
pcibios_fixup_device_resources(bus->self);
|
||||
pcibios_fixup_bridge_resources(bus->self);
|
||||
}
|
||||
|
||||
list_for_each_entry(dev, &bus->devices, bus_list)
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@ void *module_alloc(unsigned long size)
|
|||
}
|
||||
|
||||
/* Free memory returned from module_alloc */
|
||||
void module_free(struct module *mod, void *module_region)
|
||||
void module_memfree(void *module_region)
|
||||
{
|
||||
kfree(module_region);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -200,7 +200,7 @@ static int setup_rt_frame(struct ksignal *ksig, sigset_t *set,
|
|||
|
||||
/* Set up to return from userspace; jump to fixed address sigreturn
|
||||
trampoline on kuser page. */
|
||||
regs->ra = (unsigned long) (0x1040);
|
||||
regs->ra = (unsigned long) (0x1044);
|
||||
|
||||
/* Set up registers for signal handler */
|
||||
regs->sp = (unsigned long) frame;
|
||||
|
|
|
|||
|
|
@ -298,14 +298,10 @@ static inline unsigned long count_stubs(const Elf_Rela *rela, unsigned long n)
|
|||
}
|
||||
#endif
|
||||
|
||||
|
||||
/* Free memory returned from module_alloc */
|
||||
void module_free(struct module *mod, void *module_region)
|
||||
void module_arch_freeing_init(struct module *mod)
|
||||
{
|
||||
kfree(mod->arch.section);
|
||||
mod->arch.section = NULL;
|
||||
|
||||
vfree(module_region);
|
||||
}
|
||||
|
||||
/* Additional bytes needed in front of individual sections */
|
||||
|
|
|
|||
|
|
@ -154,4 +154,5 @@ module_exit(sha1_powerpc_mod_fini);
|
|||
MODULE_LICENSE("GPL");
|
||||
MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm");
|
||||
|
||||
MODULE_ALIAS_CRYPTO("sha1");
|
||||
MODULE_ALIAS_CRYPTO("sha1-powerpc");
|
||||
|
|
|
|||
|
|
@ -1184,6 +1184,8 @@ static void pcibios_allocate_bus_resources(struct pci_bus *bus)
|
|||
pr, (pr && pr->name) ? pr->name : "nil");
|
||||
|
||||
if (pr && !(pr->flags & IORESOURCE_UNSET)) {
|
||||
struct pci_dev *dev = bus->self;
|
||||
|
||||
if (request_resource(pr, res) == 0)
|
||||
continue;
|
||||
/*
|
||||
|
|
@ -1193,6 +1195,11 @@ static void pcibios_allocate_bus_resources(struct pci_bus *bus)
|
|||
*/
|
||||
if (reparent_resources(pr, res) == 0)
|
||||
continue;
|
||||
|
||||
if (dev && i < PCI_BRIDGE_RESOURCE_NUM &&
|
||||
pci_claim_bridge_resource(dev,
|
||||
i + PCI_BRIDGE_RESOURCES) == 0)
|
||||
continue;
|
||||
}
|
||||
pr_warning("PCI: Cannot allocate resource region "
|
||||
"%d of PCI bridge %d, will remap\n", i, bus->number);
|
||||
|
|
@ -1401,7 +1408,10 @@ void pcibios_claim_one_bus(struct pci_bus *bus)
|
|||
(unsigned long long)r->end,
|
||||
(unsigned int)r->flags);
|
||||
|
||||
pci_claim_resource(dev, i);
|
||||
if (pci_claim_resource(dev, i) == 0)
|
||||
continue;
|
||||
|
||||
pci_claim_bridge_resource(dev, i);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -699,7 +699,7 @@ out:
|
|||
void bpf_jit_free(struct bpf_prog *fp)
|
||||
{
|
||||
if (fp->jited)
|
||||
module_free(NULL, fp->bpf_func);
|
||||
module_memfree(fp->bpf_func);
|
||||
|
||||
bpf_prog_unlock_free(fp);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -55,14 +55,10 @@ void *module_alloc(unsigned long size)
|
|||
}
|
||||
#endif
|
||||
|
||||
/* Free memory returned from module_alloc */
|
||||
void module_free(struct module *mod, void *module_region)
|
||||
void module_arch_freeing_init(struct module *mod)
|
||||
{
|
||||
if (mod) {
|
||||
vfree(mod->arch.syminfo);
|
||||
mod->arch.syminfo = NULL;
|
||||
}
|
||||
vfree(module_region);
|
||||
vfree(mod->arch.syminfo);
|
||||
mod->arch.syminfo = NULL;
|
||||
}
|
||||
|
||||
static void check_rela(Elf_Rela *rela, struct module *me)
|
||||
|
|
|
|||
|
|
@ -22,8 +22,8 @@
|
|||
* skb_copy_bits takes 4 parameters:
|
||||
* %r2 = skb pointer
|
||||
* %r3 = offset into skb data
|
||||
* %r4 = length to copy
|
||||
* %r5 = pointer to temp buffer
|
||||
* %r4 = pointer to temp buffer
|
||||
* %r5 = length to copy
|
||||
*/
|
||||
#define SKBDATA %r8
|
||||
|
||||
|
|
@ -44,8 +44,9 @@ ENTRY(sk_load_word)
|
|||
|
||||
sk_load_word_slow:
|
||||
lgr %r9,%r2 # save %r2
|
||||
lhi %r4,4 # 4 bytes
|
||||
la %r5,160(%r15) # pointer to temp buffer
|
||||
lgr %r3,%r1 # offset
|
||||
la %r4,160(%r15) # pointer to temp buffer
|
||||
lghi %r5,4 # 4 bytes
|
||||
brasl %r14,skb_copy_bits # get data from skb
|
||||
l %r5,160(%r15) # load result from temp buffer
|
||||
ltgr %r2,%r2 # set cc to (%r2 != 0)
|
||||
|
|
@ -69,8 +70,9 @@ ENTRY(sk_load_half)
|
|||
|
||||
sk_load_half_slow:
|
||||
lgr %r9,%r2 # save %r2
|
||||
lhi %r4,2 # 2 bytes
|
||||
la %r5,162(%r15) # pointer to temp buffer
|
||||
lgr %r3,%r1 # offset
|
||||
la %r4,162(%r15) # pointer to temp buffer
|
||||
lghi %r5,2 # 2 bytes
|
||||
brasl %r14,skb_copy_bits # get data from skb
|
||||
xc 160(2,%r15),160(%r15)
|
||||
l %r5,160(%r15) # load result from temp buffer
|
||||
|
|
@ -95,8 +97,9 @@ ENTRY(sk_load_byte)
|
|||
|
||||
sk_load_byte_slow:
|
||||
lgr %r9,%r2 # save %r2
|
||||
lhi %r4,1 # 1 bytes
|
||||
la %r5,163(%r15) # pointer to temp buffer
|
||||
lgr %r3,%r1 # offset
|
||||
la %r4,163(%r15) # pointer to temp buffer
|
||||
lghi %r5,1 # 1 byte
|
||||
brasl %r14,skb_copy_bits # get data from skb
|
||||
xc 160(3,%r15),160(%r15)
|
||||
l %r5,160(%r15) # load result from temp buffer
|
||||
|
|
@ -104,11 +107,11 @@ sk_load_byte_slow:
|
|||
lgr %r2,%r9 # restore %r2
|
||||
br %r8
|
||||
|
||||
/* A = (*(u8 *)(skb->data+K) & 0xf) << 2 */
|
||||
/* X = (*(u8 *)(skb->data+K) & 0xf) << 2 */
|
||||
ENTRY(sk_load_byte_msh)
|
||||
llgfr %r1,%r3 # extend offset
|
||||
clr %r11,%r3 # hlen < offset ?
|
||||
jle sk_load_byte_slow
|
||||
jle sk_load_byte_msh_slow
|
||||
lhi %r12,0
|
||||
ic %r12,0(%r1,%r10) # get byte from skb
|
||||
nill %r12,0x0f
|
||||
|
|
@ -118,8 +121,9 @@ ENTRY(sk_load_byte_msh)
|
|||
|
||||
sk_load_byte_msh_slow:
|
||||
lgr %r9,%r2 # save %r2
|
||||
lhi %r4,2 # 2 bytes
|
||||
la %r5,162(%r15) # pointer to temp buffer
|
||||
lgr %r3,%r1 # offset
|
||||
la %r4,163(%r15) # pointer to temp buffer
|
||||
lghi %r5,1 # 1 byte
|
||||
brasl %r14,skb_copy_bits # get data from skb
|
||||
xc 160(3,%r15),160(%r15)
|
||||
l %r12,160(%r15) # load result from temp buffer
|
||||
|
|
|
|||
|
|
@ -448,15 +448,12 @@ static int bpf_jit_insn(struct bpf_jit *jit, struct sock_filter *filter,
|
|||
mask = 0x800000; /* je */
|
||||
kbranch: /* Emit compare if the branch targets are different */
|
||||
if (filter->jt != filter->jf) {
|
||||
if (K <= 16383)
|
||||
/* chi %r5,<K> */
|
||||
EMIT4_IMM(0xa75e0000, K);
|
||||
else if (test_facility(21))
|
||||
if (test_facility(21))
|
||||
/* clfi %r5,<K> */
|
||||
EMIT6_IMM(0xc25f0000, K);
|
||||
else
|
||||
/* c %r5,<d(K)>(%r13) */
|
||||
EMIT4_DISP(0x5950d000, EMIT_CONST(K));
|
||||
/* cl %r5,<d(K)>(%r13) */
|
||||
EMIT4_DISP(0x5550d000, EMIT_CONST(K));
|
||||
}
|
||||
branch: if (filter->jt == filter->jf) {
|
||||
if (filter->jt == 0)
|
||||
|
|
|
|||
|
|
@ -639,7 +639,10 @@ static void pci_claim_bus_resources(struct pci_bus *bus)
|
|||
(unsigned long long)r->end,
|
||||
(unsigned int)r->flags);
|
||||
|
||||
pci_claim_resource(dev, i);
|
||||
if (pci_claim_resource(dev, i) == 0)
|
||||
continue;
|
||||
|
||||
pci_claim_bridge_resource(dev, i);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -776,7 +776,7 @@ cond_branch: f_offset = addrs[i + filter[i].jf];
|
|||
if (unlikely(proglen + ilen > oldproglen)) {
|
||||
pr_err("bpb_jit_compile fatal error\n");
|
||||
kfree(addrs);
|
||||
module_free(NULL, image);
|
||||
module_memfree(image);
|
||||
return;
|
||||
}
|
||||
memcpy(image + proglen, temp, ilen);
|
||||
|
|
@ -822,7 +822,7 @@ out:
|
|||
void bpf_jit_free(struct bpf_prog *fp)
|
||||
{
|
||||
if (fp->jited)
|
||||
module_free(NULL, fp->bpf_func);
|
||||
module_memfree(fp->bpf_func);
|
||||
|
||||
bpf_prog_unlock_free(fp);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -74,7 +74,7 @@ error:
|
|||
|
||||
|
||||
/* Free memory returned from module_alloc */
|
||||
void module_free(struct module *mod, void *module_region)
|
||||
void module_memfree(void *module_region)
|
||||
{
|
||||
vfree(module_region);
|
||||
|
||||
|
|
@ -83,7 +83,7 @@ void module_free(struct module *mod, void *module_region)
|
|||
0, 0, 0, NULL, NULL, 0);
|
||||
|
||||
/*
|
||||
* FIXME: If module_region == mod->module_init, trim exception
|
||||
* FIXME: Add module_arch_freeing_init to trim exception
|
||||
* table entries.
|
||||
*/
|
||||
}
|
||||
|
|
|
|||
|
|
@ -857,7 +857,7 @@ source "kernel/Kconfig.preempt"
|
|||
|
||||
config X86_UP_APIC
|
||||
bool "Local APIC support on uniprocessors"
|
||||
depends on X86_32 && !SMP && !X86_32_NON_STANDARD && !PCI_MSI
|
||||
depends on X86_32 && !SMP && !X86_32_NON_STANDARD
|
||||
---help---
|
||||
A local APIC (Advanced Programmable Interrupt Controller) is an
|
||||
integrated interrupt controller in the CPU. If you have a single-CPU
|
||||
|
|
@ -868,6 +868,10 @@ config X86_UP_APIC
|
|||
performance counters), and the NMI watchdog which detects hard
|
||||
lockups.
|
||||
|
||||
config X86_UP_APIC_MSI
|
||||
def_bool y
|
||||
select X86_UP_APIC if X86_32 && !SMP && !X86_32_NON_STANDARD && PCI_MSI
|
||||
|
||||
config X86_UP_IOAPIC
|
||||
bool "IO-APIC support on uniprocessors"
|
||||
depends on X86_UP_APIC
|
||||
|
|
|
|||
|
|
@ -373,6 +373,8 @@ asmlinkage __visible void *decompress_kernel(void *rmode, memptr heap,
|
|||
unsigned long output_len,
|
||||
unsigned long run_size)
|
||||
{
|
||||
unsigned char *output_orig = output;
|
||||
|
||||
real_mode = rmode;
|
||||
|
||||
sanitize_boot_params(real_mode);
|
||||
|
|
@ -421,7 +423,12 @@ asmlinkage __visible void *decompress_kernel(void *rmode, memptr heap,
|
|||
debug_putstr("\nDecompressing Linux... ");
|
||||
decompress(input_data, input_len, NULL, NULL, output, NULL, error);
|
||||
parse_elf(output);
|
||||
handle_relocations(output, output_len);
|
||||
/*
|
||||
* 32-bit always performs relocations. 64-bit relocations are only
|
||||
* needed if kASLR has chosen a different load address.
|
||||
*/
|
||||
if (!IS_ENABLED(CONFIG_X86_64) || output != output_orig)
|
||||
handle_relocations(output, output_len);
|
||||
debug_putstr("done.\nBooting the kernel.\n");
|
||||
return output;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -931,4 +931,4 @@ module_exit(sha1_mb_mod_fini);
|
|||
MODULE_LICENSE("GPL");
|
||||
MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, multi buffer accelerated");
|
||||
|
||||
MODULE_ALIAS("sha1");
|
||||
MODULE_ALIAS_CRYPTO("sha1");
|
||||
|
|
|
|||
|
|
@ -50,6 +50,7 @@ void acpi_pic_sci_set_trigger(unsigned int, u16);
|
|||
|
||||
extern int (*__acpi_register_gsi)(struct device *dev, u32 gsi,
|
||||
int trigger, int polarity);
|
||||
extern void (*__acpi_unregister_gsi)(u32 gsi);
|
||||
|
||||
static inline void disable_acpi(void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -251,7 +251,8 @@ static inline void native_load_tls(struct thread_struct *t, unsigned int cpu)
|
|||
gdt[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i];
|
||||
}
|
||||
|
||||
#define _LDT_empty(info) \
|
||||
/* This intentionally ignores lm, since 32-bit apps don't have that field. */
|
||||
#define LDT_empty(info) \
|
||||
((info)->base_addr == 0 && \
|
||||
(info)->limit == 0 && \
|
||||
(info)->contents == 0 && \
|
||||
|
|
@ -261,11 +262,18 @@ static inline void native_load_tls(struct thread_struct *t, unsigned int cpu)
|
|||
(info)->seg_not_present == 1 && \
|
||||
(info)->useable == 0)
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
#define LDT_empty(info) (_LDT_empty(info) && ((info)->lm == 0))
|
||||
#else
|
||||
#define LDT_empty(info) (_LDT_empty(info))
|
||||
#endif
|
||||
/* Lots of programs expect an all-zero user_desc to mean "no segment at all". */
|
||||
static inline bool LDT_zero(const struct user_desc *info)
|
||||
{
|
||||
return (info->base_addr == 0 &&
|
||||
info->limit == 0 &&
|
||||
info->contents == 0 &&
|
||||
info->read_exec_only == 0 &&
|
||||
info->seg_32bit == 0 &&
|
||||
info->limit_in_pages == 0 &&
|
||||
info->seg_not_present == 0 &&
|
||||
info->useable == 0);
|
||||
}
|
||||
|
||||
static inline void clear_LDT(void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -130,7 +130,25 @@ static inline void arch_bprm_mm_init(struct mm_struct *mm,
|
|||
static inline void arch_unmap(struct mm_struct *mm, struct vm_area_struct *vma,
|
||||
unsigned long start, unsigned long end)
|
||||
{
|
||||
mpx_notify_unmap(mm, vma, start, end);
|
||||
/*
|
||||
* mpx_notify_unmap() goes and reads a rarely-hot
|
||||
* cacheline in the mm_struct. That can be expensive
|
||||
* enough to be seen in profiles.
|
||||
*
|
||||
* The mpx_notify_unmap() call and its contents have been
|
||||
* observed to affect munmap() performance on hardware
|
||||
* where MPX is not present.
|
||||
*
|
||||
* The unlikely() optimizes for the fast case: no MPX
|
||||
* in the CPU, or no MPX use in the process. Even if
|
||||
* we get this wrong (in the unlikely event that MPX
|
||||
* is widely enabled on some system) the overhead of
|
||||
* MPX itself (reading bounds tables) is expected to
|
||||
* overwhelm the overhead of getting this unlikely()
|
||||
* consistently wrong.
|
||||
*/
|
||||
if (unlikely(cpu_feature_enabled(X86_FEATURE_MPX)))
|
||||
mpx_notify_unmap(mm, vma, start, end);
|
||||
}
|
||||
|
||||
#endif /* _ASM_X86_MMU_CONTEXT_H */
|
||||
|
|
|
|||
|
|
@ -611,20 +611,20 @@ void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
|
|||
|
||||
int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp)
|
||||
{
|
||||
int irq;
|
||||
int rc, irq, trigger, polarity;
|
||||
|
||||
if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) {
|
||||
*irqp = gsi;
|
||||
} else {
|
||||
mutex_lock(&acpi_ioapic_lock);
|
||||
irq = mp_map_gsi_to_irq(gsi,
|
||||
IOAPIC_MAP_ALLOC | IOAPIC_MAP_CHECK);
|
||||
mutex_unlock(&acpi_ioapic_lock);
|
||||
if (irq < 0)
|
||||
return -1;
|
||||
*irqp = irq;
|
||||
rc = acpi_get_override_irq(gsi, &trigger, &polarity);
|
||||
if (rc == 0) {
|
||||
trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE;
|
||||
polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
|
||||
irq = acpi_register_gsi(NULL, gsi, trigger, polarity);
|
||||
if (irq >= 0) {
|
||||
*irqp = irq;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
|
||||
return -1;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(acpi_gsi_to_irq);
|
||||
|
||||
|
|
|
|||
|
|
@ -107,6 +107,7 @@ static struct clocksource hyperv_cs = {
|
|||
.rating = 400, /* use this when running on Hyperv*/
|
||||
.read = read_hv_clock,
|
||||
.mask = CLOCKSOURCE_MASK(64),
|
||||
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
||||
};
|
||||
|
||||
static void __init ms_hyperv_init_platform(void)
|
||||
|
|
|
|||
|
|
@ -674,7 +674,7 @@ static inline void *alloc_tramp(unsigned long size)
|
|||
}
|
||||
static inline void tramp_free(void *tramp)
|
||||
{
|
||||
module_free(NULL, tramp);
|
||||
module_memfree(tramp);
|
||||
}
|
||||
#else
|
||||
/* Trampolines can only be created if modules are supported */
|
||||
|
|
|
|||
|
|
@ -127,7 +127,7 @@ int arch_show_interrupts(struct seq_file *p, int prec)
|
|||
seq_puts(p, " Machine check polls\n");
|
||||
#endif
|
||||
#if IS_ENABLED(CONFIG_HYPERV) || defined(CONFIG_XEN)
|
||||
seq_printf(p, "%*s: ", prec, "THR");
|
||||
seq_printf(p, "%*s: ", prec, "HYP");
|
||||
for_each_online_cpu(j)
|
||||
seq_printf(p, "%10u ", irq_stats(j)->irq_hv_callback_count);
|
||||
seq_puts(p, " Hypervisor callback interrupts\n");
|
||||
|
|
|
|||
|
|
@ -29,7 +29,28 @@ static int get_free_idx(void)
|
|||
|
||||
static bool tls_desc_okay(const struct user_desc *info)
|
||||
{
|
||||
if (LDT_empty(info))
|
||||
/*
|
||||
* For historical reasons (i.e. no one ever documented how any
|
||||
* of the segmentation APIs work), user programs can and do
|
||||
* assume that a struct user_desc that's all zeros except for
|
||||
* entry_number means "no segment at all". This never actually
|
||||
* worked. In fact, up to Linux 3.19, a struct user_desc like
|
||||
* this would create a 16-bit read-write segment with base and
|
||||
* limit both equal to zero.
|
||||
*
|
||||
* That was close enough to "no segment at all" until we
|
||||
* hardened this function to disallow 16-bit TLS segments. Fix
|
||||
* it up by interpreting these zeroed segments the way that they
|
||||
* were almost certainly intended to be interpreted.
|
||||
*
|
||||
* The correct way to ask for "no segment at all" is to specify
|
||||
* a user_desc that satisfies LDT_empty. To keep everything
|
||||
* working, we accept both.
|
||||
*
|
||||
* Note that there's a similar kludge in modify_ldt -- look at
|
||||
* the distinction between modes 1 and 0x11.
|
||||
*/
|
||||
if (LDT_empty(info) || LDT_zero(info))
|
||||
return true;
|
||||
|
||||
/*
|
||||
|
|
@ -71,7 +92,7 @@ static void set_tls_desc(struct task_struct *p, int idx,
|
|||
cpu = get_cpu();
|
||||
|
||||
while (n-- > 0) {
|
||||
if (LDT_empty(info))
|
||||
if (LDT_empty(info) || LDT_zero(info))
|
||||
desc->a = desc->b = 0;
|
||||
else
|
||||
fill_ldt(desc, info);
|
||||
|
|
|
|||
|
|
@ -617,7 +617,7 @@ static unsigned long quick_pit_calibrate(void)
|
|||
goto success;
|
||||
}
|
||||
}
|
||||
pr_err("Fast TSC calibration failed\n");
|
||||
pr_info("Fast TSC calibration failed\n");
|
||||
return 0;
|
||||
|
||||
success:
|
||||
|
|
|
|||
|
|
@ -2348,7 +2348,7 @@ static int em_sysenter(struct x86_emulate_ctxt *ctxt)
|
|||
* Not recognized on AMD in compat mode (but is recognized in legacy
|
||||
* mode).
|
||||
*/
|
||||
if ((ctxt->mode == X86EMUL_MODE_PROT32) && (efer & EFER_LMA)
|
||||
if ((ctxt->mode != X86EMUL_MODE_PROT64) && (efer & EFER_LMA)
|
||||
&& !vendor_intel(ctxt))
|
||||
return emulate_ud(ctxt);
|
||||
|
||||
|
|
@ -2359,25 +2359,13 @@ static int em_sysenter(struct x86_emulate_ctxt *ctxt)
|
|||
setup_syscalls_segments(ctxt, &cs, &ss);
|
||||
|
||||
ops->get_msr(ctxt, MSR_IA32_SYSENTER_CS, &msr_data);
|
||||
switch (ctxt->mode) {
|
||||
case X86EMUL_MODE_PROT32:
|
||||
if ((msr_data & 0xfffc) == 0x0)
|
||||
return emulate_gp(ctxt, 0);
|
||||
break;
|
||||
case X86EMUL_MODE_PROT64:
|
||||
if (msr_data == 0x0)
|
||||
return emulate_gp(ctxt, 0);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
if ((msr_data & 0xfffc) == 0x0)
|
||||
return emulate_gp(ctxt, 0);
|
||||
|
||||
ctxt->eflags &= ~(EFLG_VM | EFLG_IF);
|
||||
cs_sel = (u16)msr_data;
|
||||
cs_sel &= ~SELECTOR_RPL_MASK;
|
||||
cs_sel = (u16)msr_data & ~SELECTOR_RPL_MASK;
|
||||
ss_sel = cs_sel + 8;
|
||||
ss_sel &= ~SELECTOR_RPL_MASK;
|
||||
if (ctxt->mode == X86EMUL_MODE_PROT64 || (efer & EFER_LMA)) {
|
||||
if (efer & EFER_LMA) {
|
||||
cs.d = 0;
|
||||
cs.l = 1;
|
||||
}
|
||||
|
|
@ -2386,10 +2374,11 @@ static int em_sysenter(struct x86_emulate_ctxt *ctxt)
|
|||
ops->set_segment(ctxt, ss_sel, &ss, 0, VCPU_SREG_SS);
|
||||
|
||||
ops->get_msr(ctxt, MSR_IA32_SYSENTER_EIP, &msr_data);
|
||||
ctxt->_eip = msr_data;
|
||||
ctxt->_eip = (efer & EFER_LMA) ? msr_data : (u32)msr_data;
|
||||
|
||||
ops->get_msr(ctxt, MSR_IA32_SYSENTER_ESP, &msr_data);
|
||||
*reg_write(ctxt, VCPU_REGS_RSP) = msr_data;
|
||||
*reg_write(ctxt, VCPU_REGS_RSP) = (efer & EFER_LMA) ? msr_data :
|
||||
(u32)msr_data;
|
||||
|
||||
return X86EMUL_CONTINUE;
|
||||
}
|
||||
|
|
@ -3791,8 +3780,8 @@ static const struct opcode group5[] = {
|
|||
};
|
||||
|
||||
static const struct opcode group6[] = {
|
||||
DI(Prot, sldt),
|
||||
DI(Prot, str),
|
||||
DI(Prot | DstMem, sldt),
|
||||
DI(Prot | DstMem, str),
|
||||
II(Prot | Priv | SrcMem16, em_lldt, lldt),
|
||||
II(Prot | Priv | SrcMem16, em_ltr, ltr),
|
||||
N, N, N, N,
|
||||
|
|
|
|||
|
|
@ -43,7 +43,7 @@ uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM] = {
|
|||
[_PAGE_CACHE_MODE_WT] = _PAGE_PCD,
|
||||
[_PAGE_CACHE_MODE_WP] = _PAGE_PCD,
|
||||
};
|
||||
EXPORT_SYMBOL_GPL(__cachemode2pte_tbl);
|
||||
EXPORT_SYMBOL(__cachemode2pte_tbl);
|
||||
uint8_t __pte2cachemode_tbl[8] = {
|
||||
[__pte2cm_idx(0)] = _PAGE_CACHE_MODE_WB,
|
||||
[__pte2cm_idx(_PAGE_PWT)] = _PAGE_CACHE_MODE_WC,
|
||||
|
|
@ -54,7 +54,7 @@ uint8_t __pte2cachemode_tbl[8] = {
|
|||
[__pte2cm_idx(_PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
|
||||
[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC,
|
||||
};
|
||||
EXPORT_SYMBOL_GPL(__pte2cachemode_tbl);
|
||||
EXPORT_SYMBOL(__pte2cachemode_tbl);
|
||||
|
||||
static unsigned long __initdata pgt_buf_start;
|
||||
static unsigned long __initdata pgt_buf_end;
|
||||
|
|
|
|||
|
|
@ -348,6 +348,12 @@ static __user void *task_get_bounds_dir(struct task_struct *tsk)
|
|||
if (!cpu_feature_enabled(X86_FEATURE_MPX))
|
||||
return MPX_INVALID_BOUNDS_DIR;
|
||||
|
||||
/*
|
||||
* 32-bit binaries on 64-bit kernels are currently
|
||||
* unsupported.
|
||||
*/
|
||||
if (IS_ENABLED(CONFIG_X86_64) && test_thread_flag(TIF_IA32))
|
||||
return MPX_INVALID_BOUNDS_DIR;
|
||||
/*
|
||||
* The bounds directory pointer is stored in a register
|
||||
* only accessible if we first do an xsave.
|
||||
|
|
|
|||
|
|
@ -234,8 +234,13 @@ void pat_init(void)
|
|||
PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, UC);
|
||||
|
||||
/* Boot CPU check */
|
||||
if (!boot_pat_state)
|
||||
if (!boot_pat_state) {
|
||||
rdmsrl(MSR_IA32_CR_PAT, boot_pat_state);
|
||||
if (!boot_pat_state) {
|
||||
pat_disable("PAT read returns always zero, disabled.");
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
wrmsrl(MSR_IA32_CR_PAT, pat);
|
||||
|
||||
|
|
|
|||
|
|
@ -216,7 +216,7 @@ static void pcibios_allocate_bridge_resources(struct pci_dev *dev)
|
|||
continue;
|
||||
if (r->parent) /* Already allocated */
|
||||
continue;
|
||||
if (!r->start || pci_claim_resource(dev, idx) < 0) {
|
||||
if (!r->start || pci_claim_bridge_resource(dev, idx) < 0) {
|
||||
/*
|
||||
* Something is wrong with the region.
|
||||
* Invalidate the resource to prevent
|
||||
|
|
|
|||
|
|
@ -458,6 +458,7 @@ int __init pci_xen_hvm_init(void)
|
|||
* just how GSIs get registered.
|
||||
*/
|
||||
__acpi_register_gsi = acpi_register_gsi_xen_hvm;
|
||||
__acpi_unregister_gsi = NULL;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI_MSI
|
||||
|
|
@ -471,52 +472,6 @@ int __init pci_xen_hvm_init(void)
|
|||
}
|
||||
|
||||
#ifdef CONFIG_XEN_DOM0
|
||||
static __init void xen_setup_acpi_sci(void)
|
||||
{
|
||||
int rc;
|
||||
int trigger, polarity;
|
||||
int gsi = acpi_sci_override_gsi;
|
||||
int irq = -1;
|
||||
int gsi_override = -1;
|
||||
|
||||
if (!gsi)
|
||||
return;
|
||||
|
||||
rc = acpi_get_override_irq(gsi, &trigger, &polarity);
|
||||
if (rc) {
|
||||
printk(KERN_WARNING "xen: acpi_get_override_irq failed for acpi"
|
||||
" sci, rc=%d\n", rc);
|
||||
return;
|
||||
}
|
||||
trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE;
|
||||
polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
|
||||
|
||||
printk(KERN_INFO "xen: sci override: global_irq=%d trigger=%d "
|
||||
"polarity=%d\n", gsi, trigger, polarity);
|
||||
|
||||
/* Before we bind the GSI to a Linux IRQ, check whether
|
||||
* we need to override it with bus_irq (IRQ) value. Usually for
|
||||
* IRQs below IRQ_LEGACY_IRQ this holds IRQ == GSI, as so:
|
||||
* ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
|
||||
* but there are oddballs where the IRQ != GSI:
|
||||
* ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level)
|
||||
* which ends up being: gsi_to_irq[9] == 20
|
||||
* (which is what acpi_gsi_to_irq ends up calling when starting the
|
||||
* the ACPI interpreter and keels over since IRQ 9 has not been
|
||||
* setup as we had setup IRQ 20 for it).
|
||||
*/
|
||||
if (acpi_gsi_to_irq(gsi, &irq) == 0) {
|
||||
/* Use the provided value if it's valid. */
|
||||
if (irq >= 0)
|
||||
gsi_override = irq;
|
||||
}
|
||||
|
||||
gsi = xen_register_gsi(gsi, gsi_override, trigger, polarity);
|
||||
printk(KERN_INFO "xen: acpi sci %d\n", gsi);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
int __init pci_xen_initial_domain(void)
|
||||
{
|
||||
int irq;
|
||||
|
|
@ -527,8 +482,8 @@ int __init pci_xen_initial_domain(void)
|
|||
x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;
|
||||
pci_msi_ignore_mask = 1;
|
||||
#endif
|
||||
xen_setup_acpi_sci();
|
||||
__acpi_register_gsi = acpi_register_gsi_xen;
|
||||
__acpi_unregister_gsi = NULL;
|
||||
/* Pre-allocate legacy irqs */
|
||||
for (irq = 0; irq < nr_legacy_irqs(); irq++) {
|
||||
int trigger, polarity;
|
||||
|
|
|
|||
|
|
@ -15,6 +15,26 @@
|
|||
|
||||
static void blk_mq_sysfs_release(struct kobject *kobj)
|
||||
{
|
||||
struct request_queue *q;
|
||||
|
||||
q = container_of(kobj, struct request_queue, mq_kobj);
|
||||
free_percpu(q->queue_ctx);
|
||||
}
|
||||
|
||||
static void blk_mq_ctx_release(struct kobject *kobj)
|
||||
{
|
||||
struct blk_mq_ctx *ctx;
|
||||
|
||||
ctx = container_of(kobj, struct blk_mq_ctx, kobj);
|
||||
kobject_put(&ctx->queue->mq_kobj);
|
||||
}
|
||||
|
||||
static void blk_mq_hctx_release(struct kobject *kobj)
|
||||
{
|
||||
struct blk_mq_hw_ctx *hctx;
|
||||
|
||||
hctx = container_of(kobj, struct blk_mq_hw_ctx, kobj);
|
||||
kfree(hctx);
|
||||
}
|
||||
|
||||
struct blk_mq_ctx_sysfs_entry {
|
||||
|
|
@ -318,13 +338,13 @@ static struct kobj_type blk_mq_ktype = {
|
|||
static struct kobj_type blk_mq_ctx_ktype = {
|
||||
.sysfs_ops = &blk_mq_sysfs_ops,
|
||||
.default_attrs = default_ctx_attrs,
|
||||
.release = blk_mq_sysfs_release,
|
||||
.release = blk_mq_ctx_release,
|
||||
};
|
||||
|
||||
static struct kobj_type blk_mq_hw_ktype = {
|
||||
.sysfs_ops = &blk_mq_hw_sysfs_ops,
|
||||
.default_attrs = default_hw_ctx_attrs,
|
||||
.release = blk_mq_sysfs_release,
|
||||
.release = blk_mq_hctx_release,
|
||||
};
|
||||
|
||||
static void blk_mq_unregister_hctx(struct blk_mq_hw_ctx *hctx)
|
||||
|
|
@ -355,6 +375,7 @@ static int blk_mq_register_hctx(struct blk_mq_hw_ctx *hctx)
|
|||
return ret;
|
||||
|
||||
hctx_for_each_ctx(hctx, ctx, i) {
|
||||
kobject_get(&q->mq_kobj);
|
||||
ret = kobject_add(&ctx->kobj, &hctx->kobj, "cpu%u", ctx->cpu);
|
||||
if (ret)
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -1641,10 +1641,8 @@ static void blk_mq_free_hw_queues(struct request_queue *q,
|
|||
struct blk_mq_hw_ctx *hctx;
|
||||
unsigned int i;
|
||||
|
||||
queue_for_each_hw_ctx(q, hctx, i) {
|
||||
queue_for_each_hw_ctx(q, hctx, i)
|
||||
free_cpumask_var(hctx->cpumask);
|
||||
kfree(hctx);
|
||||
}
|
||||
}
|
||||
|
||||
static int blk_mq_init_hctx(struct request_queue *q,
|
||||
|
|
@ -2002,11 +2000,9 @@ void blk_mq_free_queue(struct request_queue *q)
|
|||
|
||||
percpu_ref_exit(&q->mq_usage_counter);
|
||||
|
||||
free_percpu(q->queue_ctx);
|
||||
kfree(q->queue_hw_ctx);
|
||||
kfree(q->mq_map);
|
||||
|
||||
q->queue_ctx = NULL;
|
||||
q->queue_hw_ctx = NULL;
|
||||
q->mq_map = NULL;
|
||||
|
||||
|
|
|
|||
|
|
@ -1475,3 +1475,4 @@ module_exit(aes_fini);
|
|||
MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm");
|
||||
MODULE_LICENSE("Dual BSD/GPL");
|
||||
MODULE_ALIAS_CRYPTO("aes");
|
||||
MODULE_ALIAS_CRYPTO("aes-generic");
|
||||
|
|
|
|||
|
|
@ -477,3 +477,4 @@ MODULE_PARM_DESC(dbg, "Boolean to enable debugging (0/1 == off/on)");
|
|||
module_init(prng_mod_init);
|
||||
module_exit(prng_mod_fini);
|
||||
MODULE_ALIAS_CRYPTO("stdrng");
|
||||
MODULE_ALIAS_CRYPTO("ansi_cprng");
|
||||
|
|
|
|||
|
|
@ -139,3 +139,4 @@ module_exit(blowfish_mod_fini);
|
|||
MODULE_LICENSE("GPL");
|
||||
MODULE_DESCRIPTION("Blowfish Cipher Algorithm");
|
||||
MODULE_ALIAS_CRYPTO("blowfish");
|
||||
MODULE_ALIAS_CRYPTO("blowfish-generic");
|
||||
|
|
|
|||
|
|
@ -1099,3 +1099,4 @@ module_exit(camellia_fini);
|
|||
MODULE_DESCRIPTION("Camellia Cipher Algorithm");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS_CRYPTO("camellia");
|
||||
MODULE_ALIAS_CRYPTO("camellia-generic");
|
||||
|
|
|
|||
|
|
@ -550,3 +550,4 @@ module_exit(cast5_mod_fini);
|
|||
MODULE_LICENSE("GPL");
|
||||
MODULE_DESCRIPTION("Cast5 Cipher Algorithm");
|
||||
MODULE_ALIAS_CRYPTO("cast5");
|
||||
MODULE_ALIAS_CRYPTO("cast5-generic");
|
||||
|
|
|
|||
|
|
@ -292,3 +292,4 @@ module_exit(cast6_mod_fini);
|
|||
MODULE_LICENSE("GPL");
|
||||
MODULE_DESCRIPTION("Cast6 Cipher Algorithm");
|
||||
MODULE_ALIAS_CRYPTO("cast6");
|
||||
MODULE_ALIAS_CRYPTO("cast6-generic");
|
||||
|
|
|
|||
|
|
@ -171,4 +171,5 @@ MODULE_AUTHOR("Clay Haapala <chaapala@cisco.com>");
|
|||
MODULE_DESCRIPTION("CRC32c (Castagnoli) calculations wrapper for lib/crc32c");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS_CRYPTO("crc32c");
|
||||
MODULE_ALIAS_CRYPTO("crc32c-generic");
|
||||
MODULE_SOFTDEP("pre: crc32c");
|
||||
|
|
|
|||
|
|
@ -125,3 +125,4 @@ MODULE_AUTHOR("Tim Chen <tim.c.chen@linux.intel.com>");
|
|||
MODULE_DESCRIPTION("T10 DIF CRC calculation.");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS_CRYPTO("crct10dif");
|
||||
MODULE_ALIAS_CRYPTO("crct10dif-generic");
|
||||
|
|
|
|||
|
|
@ -983,8 +983,6 @@ static struct crypto_alg des_algs[2] = { {
|
|||
.cia_decrypt = des3_ede_decrypt } }
|
||||
} };
|
||||
|
||||
MODULE_ALIAS_CRYPTO("des3_ede");
|
||||
|
||||
static int __init des_generic_mod_init(void)
|
||||
{
|
||||
return crypto_register_algs(des_algs, ARRAY_SIZE(des_algs));
|
||||
|
|
@ -1001,4 +999,7 @@ module_exit(des_generic_mod_fini);
|
|||
MODULE_LICENSE("GPL");
|
||||
MODULE_DESCRIPTION("DES & Triple DES EDE Cipher Algorithms");
|
||||
MODULE_AUTHOR("Dag Arne Osvik <da@osvik.no>");
|
||||
MODULE_ALIAS("des");
|
||||
MODULE_ALIAS_CRYPTO("des");
|
||||
MODULE_ALIAS_CRYPTO("des-generic");
|
||||
MODULE_ALIAS_CRYPTO("des3_ede");
|
||||
MODULE_ALIAS_CRYPTO("des3_ede-generic");
|
||||
|
|
|
|||
|
|
@ -173,3 +173,4 @@ module_exit(ghash_mod_exit);
|
|||
MODULE_LICENSE("GPL");
|
||||
MODULE_DESCRIPTION("GHASH Message Digest Algorithm");
|
||||
MODULE_ALIAS_CRYPTO("ghash");
|
||||
MODULE_ALIAS_CRYPTO("ghash-generic");
|
||||
|
|
|
|||
|
|
@ -63,3 +63,4 @@ module_exit(krng_mod_fini);
|
|||
MODULE_LICENSE("GPL");
|
||||
MODULE_DESCRIPTION("Kernel Random Number Generator");
|
||||
MODULE_ALIAS_CRYPTO("stdrng");
|
||||
MODULE_ALIAS_CRYPTO("krng");
|
||||
|
|
|
|||
|
|
@ -249,3 +249,4 @@ module_exit(salsa20_generic_mod_fini);
|
|||
MODULE_LICENSE("GPL");
|
||||
MODULE_DESCRIPTION ("Salsa20 stream cipher algorithm");
|
||||
MODULE_ALIAS_CRYPTO("salsa20");
|
||||
MODULE_ALIAS_CRYPTO("salsa20-generic");
|
||||
|
|
|
|||
|
|
@ -667,3 +667,4 @@ MODULE_DESCRIPTION("Serpent and tnepres (kerneli compatible serpent reversed) Ci
|
|||
MODULE_AUTHOR("Dag Arne Osvik <osvik@ii.uib.no>");
|
||||
MODULE_ALIAS_CRYPTO("tnepres");
|
||||
MODULE_ALIAS_CRYPTO("serpent");
|
||||
MODULE_ALIAS_CRYPTO("serpent-generic");
|
||||
|
|
|
|||
|
|
@ -154,3 +154,4 @@ MODULE_LICENSE("GPL");
|
|||
MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm");
|
||||
|
||||
MODULE_ALIAS_CRYPTO("sha1");
|
||||
MODULE_ALIAS_CRYPTO("sha1-generic");
|
||||
|
|
|
|||
|
|
@ -385,4 +385,6 @@ MODULE_LICENSE("GPL");
|
|||
MODULE_DESCRIPTION("SHA-224 and SHA-256 Secure Hash Algorithm");
|
||||
|
||||
MODULE_ALIAS_CRYPTO("sha224");
|
||||
MODULE_ALIAS_CRYPTO("sha224-generic");
|
||||
MODULE_ALIAS_CRYPTO("sha256");
|
||||
MODULE_ALIAS_CRYPTO("sha256-generic");
|
||||
|
|
|
|||
|
|
@ -289,4 +289,6 @@ MODULE_LICENSE("GPL");
|
|||
MODULE_DESCRIPTION("SHA-512 and SHA-384 Secure Hash Algorithms");
|
||||
|
||||
MODULE_ALIAS_CRYPTO("sha384");
|
||||
MODULE_ALIAS_CRYPTO("sha384-generic");
|
||||
MODULE_ALIAS_CRYPTO("sha512");
|
||||
MODULE_ALIAS_CRYPTO("sha512-generic");
|
||||
|
|
|
|||
|
|
@ -270,6 +270,7 @@ static void __exit tea_mod_fini(void)
|
|||
crypto_unregister_algs(tea_algs, ARRAY_SIZE(tea_algs));
|
||||
}
|
||||
|
||||
MODULE_ALIAS_CRYPTO("tea");
|
||||
MODULE_ALIAS_CRYPTO("xtea");
|
||||
MODULE_ALIAS_CRYPTO("xeta");
|
||||
|
||||
|
|
|
|||
|
|
@ -676,6 +676,7 @@ static void __exit tgr192_mod_fini(void)
|
|||
crypto_unregister_shashes(tgr_algs, ARRAY_SIZE(tgr_algs));
|
||||
}
|
||||
|
||||
MODULE_ALIAS_CRYPTO("tgr192");
|
||||
MODULE_ALIAS_CRYPTO("tgr160");
|
||||
MODULE_ALIAS_CRYPTO("tgr128");
|
||||
|
||||
|
|
|
|||
|
|
@ -212,3 +212,4 @@ module_exit(twofish_mod_fini);
|
|||
MODULE_LICENSE("GPL");
|
||||
MODULE_DESCRIPTION ("Twofish Cipher Algorithm");
|
||||
MODULE_ALIAS_CRYPTO("twofish");
|
||||
MODULE_ALIAS_CRYPTO("twofish-generic");
|
||||
|
|
|
|||
|
|
@ -1167,6 +1167,7 @@ static void __exit wp512_mod_fini(void)
|
|||
crypto_unregister_shashes(wp_algs, ARRAY_SIZE(wp_algs));
|
||||
}
|
||||
|
||||
MODULE_ALIAS_CRYPTO("wp512");
|
||||
MODULE_ALIAS_CRYPTO("wp384");
|
||||
MODULE_ALIAS_CRYPTO("wp256");
|
||||
|
||||
|
|
|
|||
|
|
@ -512,7 +512,6 @@ void acpi_pci_irq_disable(struct pci_dev *dev)
|
|||
dev_dbg(&dev->dev, "PCI INT %c disabled\n", pin_name(pin));
|
||||
if (gsi >= 0) {
|
||||
acpi_unregister_gsi(gsi);
|
||||
dev->irq = 0;
|
||||
dev->irq_managed = 0;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -835,6 +835,7 @@ config PATA_AT32
|
|||
config PATA_AT91
|
||||
tristate "PATA support for AT91SAM9260"
|
||||
depends on ARM && SOC_AT91SAM9
|
||||
depends on !ARCH_MULTIPLATFORM
|
||||
help
|
||||
This option enables support for IDE devices on the Atmel AT91SAM9260 SoC.
|
||||
|
||||
|
|
|
|||
|
|
@ -325,7 +325,6 @@ static const struct pci_device_id ahci_pci_tbl[] = {
|
|||
{ PCI_VDEVICE(INTEL, 0x9d05), board_ahci }, /* Sunrise Point-LP RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0x9d07), board_ahci }, /* Sunrise Point-LP RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0xa103), board_ahci }, /* Sunrise Point-H AHCI */
|
||||
{ PCI_VDEVICE(INTEL, 0xa103), board_ahci }, /* Sunrise Point-H RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0xa105), board_ahci }, /* Sunrise Point-H RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0xa107), board_ahci }, /* Sunrise Point-H RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0xa10f), board_ahci }, /* Sunrise Point-H RAID */
|
||||
|
|
|
|||
|
|
@ -125,10 +125,11 @@ static int xgene_ahci_restart_engine(struct ata_port *ap)
|
|||
* xgene_ahci_qc_issue - Issue commands to the device
|
||||
* @qc: Command to issue
|
||||
*
|
||||
* Due to Hardware errata for IDENTIFY DEVICE command, the controller cannot
|
||||
* clear the BSY bit after receiving the PIO setup FIS. This results in the dma
|
||||
* state machine goes into the CMFatalErrorUpdate state and locks up. By
|
||||
* restarting the dma engine, it removes the controller out of lock up state.
|
||||
* Due to Hardware errata for IDENTIFY DEVICE command and PACKET
|
||||
* command of ATAPI protocol set, the controller cannot clear the BSY bit
|
||||
* after receiving the PIO setup FIS. This results in the DMA state machine
|
||||
* going into the CMFatalErrorUpdate state and locks up. By restarting the
|
||||
* DMA engine, it removes the controller out of lock up state.
|
||||
*/
|
||||
static unsigned int xgene_ahci_qc_issue(struct ata_queued_cmd *qc)
|
||||
{
|
||||
|
|
@ -137,7 +138,8 @@ static unsigned int xgene_ahci_qc_issue(struct ata_queued_cmd *qc)
|
|||
struct xgene_ahci_context *ctx = hpriv->plat_data;
|
||||
int rc = 0;
|
||||
|
||||
if (unlikely(ctx->last_cmd[ap->port_no] == ATA_CMD_ID_ATA))
|
||||
if (unlikely((ctx->last_cmd[ap->port_no] == ATA_CMD_ID_ATA) ||
|
||||
(ctx->last_cmd[ap->port_no] == ATA_CMD_PACKET)))
|
||||
xgene_ahci_restart_engine(ap);
|
||||
|
||||
rc = ahci_qc_issue(qc);
|
||||
|
|
@ -188,7 +190,7 @@ static unsigned int xgene_ahci_read_id(struct ata_device *dev,
|
|||
*
|
||||
* Clear reserved bit 8 (DEVSLP bit) as we don't support DEVSLP
|
||||
*/
|
||||
id[ATA_ID_FEATURE_SUPP] &= ~(1 << 8);
|
||||
id[ATA_ID_FEATURE_SUPP] &= cpu_to_le16(~(1 << 8));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2003,7 +2003,7 @@ static void ahci_set_aggressive_devslp(struct ata_port *ap, bool sleep)
|
|||
|
||||
devslp = readl(port_mmio + PORT_DEVSLP);
|
||||
if (!(devslp & PORT_DEVSLP_DSP)) {
|
||||
dev_err(ap->host->dev, "port does not support device sleep\n");
|
||||
dev_info(ap->host->dev, "port does not support device sleep\n");
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
|
|||
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