Merge tag 'arm/soc/for-4.4/rpi-dt-v2' of https://github.com/Broadcom/stblinux into next/dt
This pull request contains the DT changes for BCM2835 in 4.4. It pulls in clk/clk-bcm2835 (which Stephen Boyd has said would be stable) because the DT changes to enable the clock driver need the driver itself to be present. These changes include the following: - Eric Anholt, moves the bcm2835 clock driver under bcm/ where it belongs with other Broadcom clock providers drivers, defines the binding for new clock driver, adds support for programming the BCM2835 audio domain, adds the DDC I2C controller to Device Tree, and finally migrates the Device Tree to use the new clock driver binding - Lubomir Rintel adds support for the Raspberry Pi Model A+ and B revision 2, and remove the I2S controller which is non-existent on Raspberry Pi Model B - Stefan Wahren adds an uart0 label for referencing the UART adapter * tag 'arm/soc/for-4.4/rpi-dt-v2' of https://github.com/Broadcom/stblinux: ARM: bcm2835: Add the DDC I2C controller to the device tree. ARM: bcm2835: Switch to using the new clock driver support. ARM: bcm2835: dt: Add Raspberry Pi Model A+ ARM: bcm2835: dt: Add Raspberry Pi Model B rev2 ARM: bcm2835: dt: Raspberry Pi Model B had no I2S ARM: bcm2835: add label for uart0 clk: bcm2835: Add support for programming the audio domain clocks clk: bcm2835: Add binding docs for the new platform clock driver. clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers. Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
Коммит
64ebda3acd
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@ -0,0 +1,45 @@
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Broadcom BCM2835 CPRMAN clocks
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This binding uses the common clock binding:
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Documentation/devicetree/bindings/clock/clock-bindings.txt
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The CPRMAN clock controller generates clocks in the audio power domain
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of the BCM2835. There is a level of PLLs deriving from an external
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oscillator, a level of PLL dividers that produce channels off of the
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few PLLs, and a level of mostly-generic clock generators sourcing from
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the PLL channels. Most other hardware components source from the
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clock generators, but a few (like the ARM or HDMI) will source from
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the PLL dividers directly.
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Required properties:
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- compatible: Should be "brcm,bcm2835-cprman"
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- #clock-cells: Should be <1>. The permitted clock-specifier values can be
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found in include/dt-bindings/clock/bcm2835.h
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- reg: Specifies base physical address and size of the registers
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- clocks: The external oscillator clock phandle
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Example:
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clk_osc: clock@3 {
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compatible = "fixed-clock";
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reg = <3>;
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#clock-cells = <0>;
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clock-output-names = "osc";
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clock-frequency = <19200000>;
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};
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clocks: cprman@7e101000 {
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compatible = "brcm,bcm2835-cprman";
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#clock-cells = <1>;
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reg = <0x7e101000 0x2000>;
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clocks = <&clk_osc>;
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};
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i2c0: i2c@7e205000 {
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compatible = "brcm,bcm2835-i2c";
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reg = <0x7e205000 0x1000>;
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interrupts = <2 21>;
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clocks = <&clocks BCM2835_CLOCK_VPU>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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@ -58,7 +58,9 @@ dtb-$(CONFIG_ARCH_AXXIA) += \
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axm5516-amarillo.dtb
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dtb-$(CONFIG_ARCH_BCM2835) += \
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bcm2835-rpi-b.dtb \
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bcm2835-rpi-b-plus.dtb
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bcm2835-rpi-b-rev2.dtb \
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bcm2835-rpi-b-plus.dtb \
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bcm2835-rpi-a-plus.dtb
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dtb-$(CONFIG_ARCH_BCM_5301X) += \
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bcm4708-asus-rt-ac56u.dtb \
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bcm4708-asus-rt-ac68u.dtb \
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@ -0,0 +1,30 @@
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/dts-v1/;
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#include "bcm2835-rpi.dtsi"
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/ {
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compatible = "raspberrypi,model-a-plus", "brcm,bcm2835";
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model = "Raspberry Pi Model A+";
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leds {
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act {
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gpios = <&gpio 47 0>;
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};
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pwr {
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label = "PWR";
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gpios = <&gpio 35 0>;
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default-state = "keep";
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linux,default-trigger = "default-on";
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};
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};
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};
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&gpio {
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pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
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/* I2S interface */
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i2s_alt0: i2s_alt0 {
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brcm,pins = <18 19 20 21>;
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brcm,function = <BCM2835_FSEL_ALT0>;
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};
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};
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@ -0,0 +1,23 @@
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/dts-v1/;
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#include "bcm2835-rpi.dtsi"
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/ {
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compatible = "raspberrypi,model-b-rev2", "brcm,bcm2835";
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model = "Raspberry Pi Model B rev2";
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leds {
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act {
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gpios = <&gpio 16 1>;
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};
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};
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};
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&gpio {
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pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>;
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/* I2S interface */
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i2s_alt2: i2s_alt2 {
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brcm,pins = <28 29 30 31>;
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brcm,function = <BCM2835_FSEL_ALT2>;
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};
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};
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@ -13,11 +13,5 @@
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};
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&gpio {
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pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>;
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/* I2S interface */
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i2s_alt2: i2s_alt2 {
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brcm,pins = <28 29 30 31>;
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brcm,function = <BCM2835_FSEL_ALT2>;
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};
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pinctrl-0 = <&gpioout &alt0 &alt3>;
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};
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@ -52,6 +52,10 @@
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clock-frequency = <100000>;
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};
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&i2c2 {
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status = "okay";
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};
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&sdhci {
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status = "okay";
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bus-width = <4>;
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@ -1,4 +1,5 @@
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#include <dt-bindings/pinctrl/bcm2835.h>
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#include <dt-bindings/clock/bcm2835.h>
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#include "skeleton.dtsi"
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/ {
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@ -21,6 +22,10 @@
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compatible = "brcm,bcm2835-system-timer";
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reg = <0x7e003000 0x1000>;
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interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
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/* This could be a reference to BCM2835_CLOCK_TIMER,
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* but we don't have the driver using the common clock
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* support yet.
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*/
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clock-frequency = <1000000>;
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};
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@ -57,6 +62,17 @@
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reg = <0x7e100000 0x28>;
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};
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clocks: cprman@7e101000 {
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compatible = "brcm,bcm2835-cprman";
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#clock-cells = <1>;
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reg = <0x7e101000 0x2000>;
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/* CPRMAN derives everything from the platform's
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* oscillator.
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*/
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clocks = <&clk_osc>;
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};
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rng@7e104000 {
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compatible = "brcm,bcm2835-rng";
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reg = <0x7e104000 0x10>;
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@ -92,11 +108,13 @@
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#interrupt-cells = <2>;
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};
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uart@7e201000 {
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uart0: uart@7e201000 {
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compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
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reg = <0x7e201000 0x1000>;
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interrupts = <2 25>;
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clock-frequency = <3000000>;
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clocks = <&clocks BCM2835_CLOCK_UART>,
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<&clocks BCM2835_CLOCK_VPU>;
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clock-names = "uartclk", "apb_pclk";
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arm,primecell-periphid = <0x00241011>;
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};
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@ -115,7 +133,7 @@
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compatible = "brcm,bcm2835-spi";
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reg = <0x7e204000 0x1000>;
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interrupts = <2 22>;
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clocks = <&clk_spi>;
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clocks = <&clocks BCM2835_CLOCK_VPU>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -125,7 +143,7 @@
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compatible = "brcm,bcm2835-i2c";
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reg = <0x7e205000 0x1000>;
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interrupts = <2 21>;
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clocks = <&clk_i2c>;
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clocks = <&clocks BCM2835_CLOCK_VPU>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -135,7 +153,7 @@
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compatible = "brcm,bcm2835-sdhci";
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reg = <0x7e300000 0x100>;
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interrupts = <2 30>;
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clocks = <&clk_mmc>;
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clocks = <&clocks BCM2835_CLOCK_EMMC>;
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status = "disabled";
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};
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@ -143,7 +161,17 @@
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compatible = "brcm,bcm2835-i2c";
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reg = <0x7e804000 0x1000>;
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interrupts = <2 21>;
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clocks = <&clk_i2c>;
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clocks = <&clocks BCM2835_CLOCK_VPU>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c2: i2c@7e805000 {
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compatible = "brcm,bcm2835-i2c";
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reg = <0x7e805000 0x1000>;
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interrupts = <2 21>;
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clocks = <&clocks BCM2835_CLOCK_VPU>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -165,28 +193,14 @@
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#address-cells = <1>;
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#size-cells = <0>;
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clk_mmc: clock@0 {
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/* The oscillator is the root of the clock tree. */
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clk_osc: clock@3 {
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compatible = "fixed-clock";
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reg = <0>;
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reg = <3>;
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#clock-cells = <0>;
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clock-output-names = "mmc";
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clock-frequency = <100000000>;
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clock-output-names = "osc";
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clock-frequency = <19200000>;
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};
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clk_i2c: clock@1 {
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compatible = "fixed-clock";
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reg = <1>;
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#clock-cells = <0>;
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clock-output-names = "i2c";
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clock-frequency = <250000000>;
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};
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clk_spi: clock@2 {
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compatible = "fixed-clock";
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reg = <2>;
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#clock-cells = <0>;
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clock-output-names = "spi";
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clock-frequency = <250000000>;
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};
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};
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};
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@ -19,7 +19,6 @@ endif
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obj-$(CONFIG_MACH_ASM9260) += clk-asm9260.o
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obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN) += clk-axi-clkgen.o
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obj-$(CONFIG_ARCH_AXXIA) += clk-axm5516.o
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obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o
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obj-$(CONFIG_COMMON_CLK_CDCE706) += clk-cdce706.o
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obj-$(CONFIG_ARCH_CLPS711X) += clk-clps711x.o
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obj-$(CONFIG_ARCH_EFM32) += clk-efm32gg.o
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@ -3,4 +3,5 @@ obj-$(CONFIG_CLK_BCM_KONA) += clk-kona-setup.o
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obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281xx.o
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obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm21664.o
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obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o
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obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o
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obj-$(CONFIG_ARCH_BCM_CYGNUS) += clk-cygnus.o
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Загрузить разницу
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@ -1,55 +0,0 @@
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/*
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* Copyright (C) 2010 Broadcom
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* Copyright (C) 2012 Stephen Warren
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
|
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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* GNU General Public License for more details.
|
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*
|
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* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/clk-provider.h>
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#include <linux/clkdev.h>
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#include <linux/clk/bcm2835.h>
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#include <linux/of.h>
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/*
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* These are fixed clocks. They're probably not all root clocks and it may
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* be possible to turn them on and off but until this is mapped out better
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* it's the only way they can be used.
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*/
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void __init bcm2835_init_clocks(void)
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{
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struct clk *clk;
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int ret;
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clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT,
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126000000);
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if (IS_ERR(clk))
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pr_err("apb_pclk not registered\n");
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clk = clk_register_fixed_rate(NULL, "uart0_pclk", NULL, CLK_IS_ROOT,
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3000000);
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if (IS_ERR(clk))
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pr_err("uart0_pclk not registered\n");
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ret = clk_register_clkdev(clk, NULL, "20201000.uart");
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if (ret)
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pr_err("uart0_pclk alias not registered\n");
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clk = clk_register_fixed_rate(NULL, "uart1_pclk", NULL, CLK_IS_ROOT,
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125000000);
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if (IS_ERR(clk))
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pr_err("uart1_pclk not registered\n");
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ret = clk_register_clkdev(clk, NULL, "20215000.uart");
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if (ret)
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pr_err("uart1_pclk alias not registered\n");
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}
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@ -0,0 +1,47 @@
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/*
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* Copyright (C) 2015 Broadcom Corporation
|
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*
|
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* This program is free software; you can redistribute it and/or
|
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* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation version 2.
|
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*
|
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
|
||||
* kind, whether express or implied; without even the implied warranty
|
||||
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
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*/
|
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#define BCM2835_PLLA 0
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#define BCM2835_PLLB 1
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#define BCM2835_PLLC 2
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#define BCM2835_PLLD 3
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#define BCM2835_PLLH 4
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#define BCM2835_PLLA_CORE 5
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#define BCM2835_PLLA_PER 6
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#define BCM2835_PLLB_ARM 7
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#define BCM2835_PLLC_CORE0 8
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#define BCM2835_PLLC_CORE1 9
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#define BCM2835_PLLC_CORE2 10
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#define BCM2835_PLLC_PER 11
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#define BCM2835_PLLD_CORE 12
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#define BCM2835_PLLD_PER 13
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#define BCM2835_PLLH_RCAL 14
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#define BCM2835_PLLH_AUX 15
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#define BCM2835_PLLH_PIX 16
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#define BCM2835_CLOCK_TIMER 17
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#define BCM2835_CLOCK_OTP 18
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#define BCM2835_CLOCK_UART 19
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#define BCM2835_CLOCK_VPU 20
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#define BCM2835_CLOCK_V3D 21
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#define BCM2835_CLOCK_ISP 22
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#define BCM2835_CLOCK_H264 23
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#define BCM2835_CLOCK_VEC 24
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#define BCM2835_CLOCK_HSM 25
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#define BCM2835_CLOCK_SDRAM 26
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#define BCM2835_CLOCK_TSENS 27
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#define BCM2835_CLOCK_EMMC 28
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#define BCM2835_CLOCK_PERI_IMAGE 29
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|
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#define BCM2835_CLOCK_COUNT 30
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