staging: wfx: load firmware
A firmware is necessary to run the chip. wfx_init_device() is in charge of loading firmware on chip and doing low level initialization. Firmwares for WF200 are available here: https://github.com/SiliconLabs/wfx-firmware/ Note that firmware are encrypted. Driver checks that key used to encrypt firmware match with key burned into chip. Currently, "C0" key is used for production chips. Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com> Link: https://lore.kernel.org/r/20190919142527.31797-6-Jerome.Pouiller@silabs.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Jérôme Pouiller
Greg Kroah-Hartman
Родитель
fee695e3e3
Коммит
652b4afb24
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@ -5,6 +5,7 @@ CFLAGS_debug.o = -I$(src)
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wfx-y := \
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hwio.o \
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fwio.o \
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main.o \
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debug.o
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wfx-$(CONFIG_SPI) += bus_spi.o
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@ -17,6 +17,7 @@
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#include "main.h"
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static const struct wfx_platform_data wfx_sdio_pdata = {
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.file_fw = "wfm_wf200",
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};
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struct wfx_sdio_priv {
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@ -204,8 +205,14 @@ static int wfx_sdio_probe(struct sdio_func *func,
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goto err2;
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}
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ret = wfx_probe(bus->core);
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if (ret)
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goto err3;
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return 0;
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err3:
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wfx_free_common(bus->core);
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err2:
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wfx_sdio_irq_unsubscribe(bus);
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err1:
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@ -220,6 +227,7 @@ static void wfx_sdio_remove(struct sdio_func *func)
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{
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struct wfx_sdio_priv *bus = sdio_get_drvdata(func);
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wfx_release(bus->core);
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wfx_free_common(bus->core);
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wfx_sdio_irq_unsubscribe(bus);
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sdio_claim_host(func);
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@ -27,6 +27,8 @@ MODULE_PARM_DESC(gpio_reset, "gpio number for reset. -1 for none.");
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#define SET_READ 0x8000 /* usage: or operation */
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static const struct wfx_platform_data wfx_spi_pdata = {
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.file_fw = "wfm_wf200",
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.use_rising_clk = true,
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};
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struct wfx_spi_priv {
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@ -205,6 +207,10 @@ static int wfx_spi_probe(struct spi_device *func)
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if (!bus->core)
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return -EIO;
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ret = wfx_probe(bus->core);
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if (ret)
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wfx_free_common(bus->core);
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return ret;
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}
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@ -213,6 +219,7 @@ static int wfx_spi_disconnect(struct spi_device *func)
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{
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struct wfx_spi_priv *bus = spi_get_drvdata(func);
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wfx_release(bus->core);
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wfx_free_common(bus->core);
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// A few IRQ will be sent during device release. Hopefully, no IRQ
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// should happen after wdev/wvif are released.
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@ -0,0 +1,387 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Firmware loading.
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*
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* Copyright (c) 2017-2019, Silicon Laboratories, Inc.
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* Copyright (c) 2010, ST-Ericsson
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*/
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#include <linux/firmware.h>
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#include <linux/slab.h>
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#include <linux/mm.h>
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#include <linux/bitfield.h>
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#include "fwio.h"
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#include "wfx.h"
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#include "hwio.h"
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// Addresses below are in SRAM area
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#define WFX_DNLD_FIFO 0x09004000
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#define DNLD_BLOCK_SIZE 0x0400
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#define DNLD_FIFO_SIZE 0x8000 // (32 * DNLD_BLOCK_SIZE)
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// Download Control Area (DCA)
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#define WFX_DCA_IMAGE_SIZE 0x0900C000
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#define WFX_DCA_PUT 0x0900C004
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#define WFX_DCA_GET 0x0900C008
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#define WFX_DCA_HOST_STATUS 0x0900C00C
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#define HOST_READY 0x87654321
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#define HOST_INFO_READ 0xA753BD99
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#define HOST_UPLOAD_PENDING 0xABCDDCBA
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#define HOST_UPLOAD_COMPLETE 0xD4C64A99
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#define HOST_OK_TO_JUMP 0x174FC882
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#define WFX_DCA_NCP_STATUS 0x0900C010
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#define NCP_NOT_READY 0x12345678
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#define NCP_READY 0x87654321
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#define NCP_INFO_READY 0xBD53EF99
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#define NCP_DOWNLOAD_PENDING 0xABCDDCBA
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#define NCP_DOWNLOAD_COMPLETE 0xCAFEFECA
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#define NCP_AUTH_OK 0xD4C64A99
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#define NCP_AUTH_FAIL 0x174FC882
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#define NCP_PUB_KEY_RDY 0x7AB41D19
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#define WFX_DCA_FW_SIGNATURE 0x0900C014
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#define FW_SIGNATURE_SIZE 0x40
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#define WFX_DCA_FW_HASH 0x0900C054
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#define FW_HASH_SIZE 0x08
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#define WFX_DCA_FW_VERSION 0x0900C05C
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#define FW_VERSION_SIZE 0x04
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#define WFX_DCA_RESERVED 0x0900C060
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#define DCA_RESERVED_SIZE 0x20
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#define WFX_STATUS_INFO 0x0900C080
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#define WFX_BOOTLOADER_LABEL 0x0900C084
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#define BOOTLOADER_LABEL_SIZE 0x3C
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#define WFX_PTE_INFO 0x0900C0C0
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#define PTE_INFO_KEYSET_IDX 0x0D
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#define PTE_INFO_SIZE 0x10
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#define WFX_ERR_INFO 0x0900C0D0
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#define ERR_INVALID_SEC_TYPE 0x05
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#define ERR_SIG_VERIF_FAILED 0x0F
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#define ERR_AES_CTRL_KEY 0x10
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#define ERR_ECC_PUB_KEY 0x11
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#define ERR_MAC_KEY 0x18
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#define DCA_TIMEOUT 50 // milliseconds
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#define WAKEUP_TIMEOUT 200 // milliseconds
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static const char * const fwio_error_strings[] = {
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[ERR_INVALID_SEC_TYPE] = "Invalid section type or wrong encryption",
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[ERR_SIG_VERIF_FAILED] = "Signature verification failed",
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[ERR_AES_CTRL_KEY] = "AES control key not initialized",
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[ERR_ECC_PUB_KEY] = "ECC public key not initialized",
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[ERR_MAC_KEY] = "MAC key not initialized",
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};
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/*
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* request_firmware() allocate data using vmalloc(). It is not compatible with
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* underlying hardware that use DMA. Function below detect this case and
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* allocate a bounce buffer if necessary.
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*
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* Notice that, in doubt, you can enable CONFIG_DEBUG_SG to ask kernel to
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* detect this problem at runtime (else, kernel silently fail).
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*
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* NOTE: it may also be possible to use 'pages' from struct firmware and avoid
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* bounce buffer
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*/
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int sram_write_dma_safe(struct wfx_dev *wdev, u32 addr, const u8 *buf, size_t len)
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{
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int ret;
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const u8 *tmp;
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if (!virt_addr_valid(buf)) {
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tmp = kmemdup(buf, len, GFP_KERNEL);
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if (!tmp)
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return -ENOMEM;
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} else {
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tmp = buf;
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}
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ret = sram_buf_write(wdev, addr, tmp, len);
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if (!virt_addr_valid(buf))
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kfree(tmp);
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return ret;
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}
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int get_firmware(struct wfx_dev *wdev, u32 keyset_chip,
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const struct firmware **fw, int *file_offset)
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{
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int keyset_file;
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char filename[256];
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const char *data;
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int ret;
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snprintf(filename, sizeof(filename), "%s_%02X.sec", wdev->pdata.file_fw, keyset_chip);
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ret = firmware_request_nowarn(fw, filename, wdev->dev);
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if (ret) {
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dev_info(wdev->dev, "can't load %s, falling back to %s.sec\n", filename, wdev->pdata.file_fw);
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snprintf(filename, sizeof(filename), "%s.sec", wdev->pdata.file_fw);
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ret = request_firmware(fw, filename, wdev->dev);
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if (ret) {
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dev_err(wdev->dev, "can't load %s\n", filename);
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*fw = NULL;
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return ret;
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}
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}
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data = (*fw)->data;
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if (memcmp(data, "KEYSET", 6) != 0) {
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// Legacy firmware format
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*file_offset = 0;
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keyset_file = 0x90;
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} else {
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*file_offset = 8;
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keyset_file = (hex_to_bin(data[6]) * 16) | hex_to_bin(data[7]);
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if (keyset_file < 0) {
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dev_err(wdev->dev, "%s corrupted\n", filename);
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release_firmware(*fw);
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*fw = NULL;
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return -EINVAL;
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}
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}
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if (keyset_file != keyset_chip) {
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dev_err(wdev->dev, "firmware keyset is incompatible with chip (file: 0x%02X, chip: 0x%02X)\n",
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keyset_file, keyset_chip);
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release_firmware(*fw);
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*fw = NULL;
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return -ENODEV;
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}
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wdev->keyset = keyset_file;
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return 0;
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}
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static int wait_ncp_status(struct wfx_dev *wdev, u32 status)
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{
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ktime_t now, start;
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u32 reg;
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int ret;
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start = ktime_get();
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for (;;) {
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ret = sram_reg_read(wdev, WFX_DCA_NCP_STATUS, ®);
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if (ret < 0)
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return -EIO;
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now = ktime_get();
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if (reg == status)
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break;
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if (ktime_after(now, ktime_add_ms(start, DCA_TIMEOUT)))
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return -ETIMEDOUT;
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}
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if (ktime_compare(now, start))
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dev_dbg(wdev->dev, "chip answer after %lldus\n", ktime_us_delta(now, start));
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else
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dev_dbg(wdev->dev, "chip answer immediately\n");
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return 0;
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}
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static int upload_firmware(struct wfx_dev *wdev, const u8 *data, size_t len)
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{
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int ret;
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u32 offs, bytes_done;
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ktime_t now, start;
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if (len % DNLD_BLOCK_SIZE) {
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dev_err(wdev->dev, "firmware size is not aligned. Buffer overrun will occur\n");
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return -EIO;
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}
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offs = 0;
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while (offs < len) {
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start = ktime_get();
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for (;;) {
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ret = sram_reg_read(wdev, WFX_DCA_GET, &bytes_done);
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if (ret < 0)
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return ret;
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now = ktime_get();
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if (offs + DNLD_BLOCK_SIZE - bytes_done < DNLD_FIFO_SIZE)
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break;
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if (ktime_after(now, ktime_add_ms(start, DCA_TIMEOUT)))
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return -ETIMEDOUT;
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}
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if (ktime_compare(now, start))
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dev_dbg(wdev->dev, "answer after %lldus\n", ktime_us_delta(now, start));
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ret = sram_write_dma_safe(wdev, WFX_DNLD_FIFO + (offs % DNLD_FIFO_SIZE),
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data + offs, DNLD_BLOCK_SIZE);
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if (ret < 0)
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return ret;
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// WFx seems to not support writing 0 in this register during
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// first loop
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offs += DNLD_BLOCK_SIZE;
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ret = sram_reg_write(wdev, WFX_DCA_PUT, offs);
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if (ret < 0)
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return ret;
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}
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return 0;
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}
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static void print_boot_status(struct wfx_dev *wdev)
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{
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u32 val32;
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sram_reg_read(wdev, WFX_STATUS_INFO, &val32);
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if (val32 == 0x12345678) {
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dev_info(wdev->dev, "no error reported by secure boot\n");
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} else {
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sram_reg_read(wdev, WFX_ERR_INFO, &val32);
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if (val32 < ARRAY_SIZE(fwio_error_strings) && fwio_error_strings[val32])
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dev_info(wdev->dev, "secure boot error: %s\n", fwio_error_strings[val32]);
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else
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dev_info(wdev->dev, "secure boot error: Unknown (0x%02x)\n", val32);
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}
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}
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int load_firmware_secure(struct wfx_dev *wdev)
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{
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const struct firmware *fw = NULL;
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int header_size;
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int fw_offset;
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ktime_t start;
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u8 *buf;
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int ret;
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BUILD_BUG_ON(PTE_INFO_SIZE > BOOTLOADER_LABEL_SIZE);
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buf = kmalloc(BOOTLOADER_LABEL_SIZE + 1, GFP_KERNEL);
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if (!buf)
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return -ENOMEM;
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sram_reg_write(wdev, WFX_DCA_HOST_STATUS, HOST_READY);
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ret = wait_ncp_status(wdev, NCP_INFO_READY);
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if (ret)
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goto error;
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sram_buf_read(wdev, WFX_BOOTLOADER_LABEL, buf, BOOTLOADER_LABEL_SIZE);
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buf[BOOTLOADER_LABEL_SIZE] = 0;
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dev_dbg(wdev->dev, "bootloader: \"%s\"\n", buf);
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sram_buf_read(wdev, WFX_PTE_INFO, buf, PTE_INFO_SIZE);
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ret = get_firmware(wdev, buf[PTE_INFO_KEYSET_IDX], &fw, &fw_offset);
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if (ret)
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goto error;
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header_size = fw_offset + FW_SIGNATURE_SIZE + FW_HASH_SIZE;
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sram_reg_write(wdev, WFX_DCA_HOST_STATUS, HOST_INFO_READ);
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ret = wait_ncp_status(wdev, NCP_READY);
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if (ret)
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goto error;
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sram_reg_write(wdev, WFX_DNLD_FIFO, 0xFFFFFFFF); // Fifo init
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sram_write_dma_safe(wdev, WFX_DCA_FW_VERSION, "\x01\x00\x00\x00", FW_VERSION_SIZE);
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sram_write_dma_safe(wdev, WFX_DCA_FW_SIGNATURE, fw->data + fw_offset, FW_SIGNATURE_SIZE);
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sram_write_dma_safe(wdev, WFX_DCA_FW_HASH, fw->data + fw_offset + FW_SIGNATURE_SIZE, FW_HASH_SIZE);
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sram_reg_write(wdev, WFX_DCA_IMAGE_SIZE, fw->size - header_size);
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sram_reg_write(wdev, WFX_DCA_HOST_STATUS, HOST_UPLOAD_PENDING);
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ret = wait_ncp_status(wdev, NCP_DOWNLOAD_PENDING);
|
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if (ret)
|
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goto error;
|
||||
|
||||
start = ktime_get();
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ret = upload_firmware(wdev, fw->data + header_size, fw->size - header_size);
|
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if (ret)
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goto error;
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dev_dbg(wdev->dev, "firmware load after %lldus\n", ktime_us_delta(ktime_get(), start));
|
||||
|
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sram_reg_write(wdev, WFX_DCA_HOST_STATUS, HOST_UPLOAD_COMPLETE);
|
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ret = wait_ncp_status(wdev, NCP_AUTH_OK);
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||||
// Legacy ROM support
|
||||
if (ret < 0)
|
||||
ret = wait_ncp_status(wdev, NCP_PUB_KEY_RDY);
|
||||
if (ret < 0)
|
||||
goto error;
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||||
sram_reg_write(wdev, WFX_DCA_HOST_STATUS, HOST_OK_TO_JUMP);
|
||||
|
||||
error:
|
||||
kfree(buf);
|
||||
if (fw)
|
||||
release_firmware(fw);
|
||||
if (ret)
|
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print_boot_status(wdev);
|
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return ret;
|
||||
}
|
||||
|
||||
static int init_gpr(struct wfx_dev *wdev)
|
||||
{
|
||||
int ret, i;
|
||||
static const struct {
|
||||
int index;
|
||||
u32 value;
|
||||
} gpr_init[] = {
|
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{ 0x07, 0x208775 },
|
||||
{ 0x08, 0x2EC020 },
|
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{ 0x09, 0x3C3C3C },
|
||||
{ 0x0B, 0x322C44 },
|
||||
{ 0x0C, 0xA06497 },
|
||||
};
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(gpr_init); i++) {
|
||||
ret = igpr_reg_write(wdev, gpr_init[i].index, gpr_init[i].value);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
dev_dbg(wdev->dev, " index %02x: %08x\n", gpr_init[i].index, gpr_init[i].value);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
int wfx_init_device(struct wfx_dev *wdev)
|
||||
{
|
||||
int ret;
|
||||
int hw_revision, hw_type;
|
||||
int wakeup_timeout = 50; // ms
|
||||
ktime_t now, start;
|
||||
u32 reg;
|
||||
|
||||
reg = CFG_DIRECT_ACCESS_MODE | CFG_CPU_RESET | CFG_WORD_MODE2;
|
||||
if (wdev->pdata.use_rising_clk)
|
||||
reg |= CFG_CLK_RISE_EDGE;
|
||||
ret = config_reg_write(wdev, reg);
|
||||
if (ret < 0) {
|
||||
dev_err(wdev->dev, "bus returned an error during first write access. Host configuration error?\n");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
ret = config_reg_read(wdev, ®);
|
||||
if (ret < 0) {
|
||||
dev_err(wdev->dev, "bus returned an error during first read access. Bus configuration error?\n");
|
||||
return -EIO;
|
||||
}
|
||||
if (reg == 0 || reg == ~0) {
|
||||
dev_err(wdev->dev, "chip mute. Bus configuration error or chip wasn't reset?\n");
|
||||
return -EIO;
|
||||
}
|
||||
dev_dbg(wdev->dev, "initial config register value: %08x\n", reg);
|
||||
|
||||
hw_revision = FIELD_GET(CFG_DEVICE_ID_MAJOR, reg);
|
||||
if (hw_revision == 0 || hw_revision > 2) {
|
||||
dev_err(wdev->dev, "bad hardware revision number: %d\n", hw_revision);
|
||||
return -ENODEV;
|
||||
}
|
||||
hw_type = FIELD_GET(CFG_DEVICE_ID_TYPE, reg);
|
||||
if (hw_type == 1) {
|
||||
dev_notice(wdev->dev, "development hardware detected\n");
|
||||
wakeup_timeout = 2000;
|
||||
}
|
||||
|
||||
ret = init_gpr(wdev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = control_reg_write(wdev, CTRL_WLAN_WAKEUP);
|
||||
if (ret < 0)
|
||||
return -EIO;
|
||||
start = ktime_get();
|
||||
for (;;) {
|
||||
ret = control_reg_read(wdev, ®);
|
||||
now = ktime_get();
|
||||
if (reg & CTRL_WLAN_READY)
|
||||
break;
|
||||
if (ktime_after(now, ktime_add_ms(start, wakeup_timeout))) {
|
||||
dev_err(wdev->dev, "chip didn't wake up. Chip wasn't reset?\n");
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
}
|
||||
dev_dbg(wdev->dev, "chip wake up after %lldus\n", ktime_us_delta(now, start));
|
||||
|
||||
ret = config_reg_write_bits(wdev, CFG_CPU_RESET, 0);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
ret = load_firmware_secure(wdev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
ret = config_reg_write_bits(wdev, CFG_DIRECT_ACCESS_MODE | CFG_IRQ_ENABLE_DATA | CFG_IRQ_ENABLE_WRDY, CFG_IRQ_ENABLE_DATA);
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Firmware loading.
|
||||
*
|
||||
* Copyright (c) 2017-2019, Silicon Laboratories, Inc.
|
||||
* Copyright (c) 2010, ST-Ericsson
|
||||
*/
|
||||
#ifndef WFX_FWIO_H
|
||||
#define WFX_FWIO_H
|
||||
|
||||
struct wfx_dev;
|
||||
|
||||
int wfx_init_device(struct wfx_dev *wdev);
|
||||
|
||||
#endif /* WFX_FWIO_H */
|
||||
|
|
@ -20,6 +20,8 @@
|
|||
|
||||
#include "main.h"
|
||||
#include "wfx.h"
|
||||
#include "fwio.h"
|
||||
#include "hwio.h"
|
||||
#include "bus.h"
|
||||
#include "wfx_version.h"
|
||||
|
||||
|
|
@ -76,6 +78,24 @@ void wfx_free_common(struct wfx_dev *wdev)
|
|||
{
|
||||
}
|
||||
|
||||
int wfx_probe(struct wfx_dev *wdev)
|
||||
{
|
||||
int err;
|
||||
|
||||
err = wfx_init_device(wdev);
|
||||
if (err)
|
||||
goto err1;
|
||||
|
||||
return 0;
|
||||
|
||||
err1:
|
||||
return err;
|
||||
}
|
||||
|
||||
void wfx_release(struct wfx_dev *wdev)
|
||||
{
|
||||
}
|
||||
|
||||
static int __init wfx_core_init(void)
|
||||
{
|
||||
int ret = 0;
|
||||
|
|
|
|||
|
|
@ -18,6 +18,13 @@
|
|||
struct wfx_dev;
|
||||
|
||||
struct wfx_platform_data {
|
||||
/* Keyset and ".sec" extention will appended to this string */
|
||||
const char *file_fw;
|
||||
/*
|
||||
* if true HIF D_out is sampled on the rising edge of the clock
|
||||
* (intended to be used in 50Mhz SDIO)
|
||||
*/
|
||||
bool use_rising_clk;
|
||||
};
|
||||
|
||||
struct wfx_dev *wfx_init_common(struct device *dev,
|
||||
|
|
@ -26,6 +33,9 @@ struct wfx_dev *wfx_init_common(struct device *dev,
|
|||
void *hwbus_priv);
|
||||
void wfx_free_common(struct wfx_dev *wdev);
|
||||
|
||||
int wfx_probe(struct wfx_dev *wdev);
|
||||
void wfx_release(struct wfx_dev *wdev);
|
||||
|
||||
struct gpio_desc *wfx_get_gpio(struct device *dev, int override,
|
||||
const char *label);
|
||||
|
||||
|
|
|
|||
|
|
@ -19,6 +19,8 @@ struct wfx_dev {
|
|||
struct device *dev;
|
||||
const struct hwbus_ops *hwbus_ops;
|
||||
void *hwbus_priv;
|
||||
|
||||
u8 keyset;
|
||||
};
|
||||
|
||||
#endif /* WFX_H */
|
||||
|
|
|
|||
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