media: atomisp: get rid of ibuf_ctrl abstraction
Just move the stuff there to the places where this header is included. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
This commit is contained in:
Mauro Carvalho Chehab
Родитель
d71dc239a8
Коммит
6543143f0e
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@ -17,6 +17,7 @@
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#define __IBUF_CTRL_LOCAL_H_INCLUDED__
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#include "ibuf_ctrl_global.h"
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#include "ibuf_ctrl_local.h"
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typedef struct ibuf_ctrl_proc_state_s ibuf_ctrl_proc_state_t;
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typedef struct ibuf_ctrl_state_s ibuf_ctrl_state_t;
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@ -1,268 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Support for Intel Camera Imaging ISP subsystem.
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* Copyright (c) 2015, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef __IBUF_CTRL_PRIVATE_H_INCLUDED__
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#define __IBUF_CTRL_PRIVATE_H_INCLUDED__
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#include "ibuf_ctrl_public.h"
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#include "device_access.h" /* ia_css_device_load_uint32 */
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#include "assert_support.h" /* assert */
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#include "print_support.h" /* print */
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/*****************************************************
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*
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* Native command interface (NCI).
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*
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*****************************************************/
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/**
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* @brief Get the ibuf-controller state.
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* Refer to "ibuf_ctrl_public.h" for details.
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*/
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STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_state(
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const ibuf_ctrl_ID_t ID,
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ibuf_ctrl_state_t *state)
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{
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u32 i;
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state->recalc_words =
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ibuf_ctrl_reg_load(ID, _IBUF_CNTRL_RECALC_WORDS_STATUS);
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state->arbiters =
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ibuf_ctrl_reg_load(ID, _IBUF_CNTRL_ARBITERS_STATUS);
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/*
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* Get the values of the register-set per
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* ibuf-controller process.
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*/
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for (i = 0; i < N_IBUF_CTRL_PROCS[ID]; i++) {
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ibuf_ctrl_get_proc_state(
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ID,
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i,
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&state->proc_state[i]);
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}
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}
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/**
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* @brief Get the state of the ibuf-controller process.
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* Refer to "ibuf_ctrl_public.h" for details.
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*/
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STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_proc_state(
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const ibuf_ctrl_ID_t ID,
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const u32 proc_id,
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ibuf_ctrl_proc_state_t *state)
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{
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hrt_address reg_bank_offset;
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reg_bank_offset =
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_IBUF_CNTRL_PROC_REG_ALIGN * (1 + proc_id);
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state->num_items =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_NUM_ITEMS_PER_STORE);
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state->num_stores =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_NUM_STORES_PER_FRAME);
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state->dma_channel =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_CHANNEL);
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state->dma_command =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_CMD);
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state->ibuf_st_addr =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_START_ADDRESS);
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state->ibuf_stride =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_STRIDE);
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state->ibuf_end_addr =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_END_ADDRESS);
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state->dest_st_addr =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_START_ADDRESS);
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state->dest_stride =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_STRIDE);
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state->dest_end_addr =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_END_ADDRESS);
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state->sync_frame =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_SYNC_FRAME);
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state->sync_command =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_STR2MMIO_SYNC_CMD);
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state->store_command =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_STR2MMIO_STORE_CMD);
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state->shift_returned_items =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_SHIFT_ITEMS);
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state->elems_ibuf =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ELEMS_P_WORD_IBUF);
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state->elems_dest =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ELEMS_P_WORD_DEST);
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state->cur_stores =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_STORES);
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state->cur_acks =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_ACKS);
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state->cur_s2m_ibuf_addr =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_S2M_IBUF_ADDR);
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state->cur_dma_ibuf_addr =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_DMA_IBUF_ADDR);
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state->cur_dma_dest_addr =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_DMA_DEST_ADDR);
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state->cur_isp_dest_addr =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_ISP_DEST_ADDR);
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state->dma_cmds_send =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_NR_DMA_CMDS_SEND);
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state->main_cntrl_state =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_MAIN_CNTRL_STATE);
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state->dma_sync_state =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_SYNC_STATE);
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state->isp_sync_state =
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ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ISP_SYNC_STATE);
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}
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/**
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* @brief Dump the ibuf-controller state.
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* Refer to "ibuf_ctrl_public.h" for details.
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*/
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STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_dump_state(
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const ibuf_ctrl_ID_t ID,
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ibuf_ctrl_state_t *state)
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{
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u32 i;
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ia_css_print("IBUF controller ID %d recalculate words 0x%x\n", ID,
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state->recalc_words);
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ia_css_print("IBUF controller ID %d arbiters 0x%x\n", ID, state->arbiters);
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/*
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* Dump the values of the register-set per
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* ibuf-controller process.
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*/
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for (i = 0; i < N_IBUF_CTRL_PROCS[ID]; i++) {
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ia_css_print("IBUF controller ID %d Process ID %d num_items 0x%x\n", ID, i,
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state->proc_state[i].num_items);
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ia_css_print("IBUF controller ID %d Process ID %d num_stores 0x%x\n", ID, i,
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state->proc_state[i].num_stores);
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ia_css_print("IBUF controller ID %d Process ID %d dma_channel 0x%x\n", ID, i,
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state->proc_state[i].dma_channel);
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ia_css_print("IBUF controller ID %d Process ID %d dma_command 0x%x\n", ID, i,
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state->proc_state[i].dma_command);
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ia_css_print("IBUF controller ID %d Process ID %d ibuf_st_addr 0x%x\n", ID, i,
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state->proc_state[i].ibuf_st_addr);
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ia_css_print("IBUF controller ID %d Process ID %d ibuf_stride 0x%x\n", ID, i,
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state->proc_state[i].ibuf_stride);
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ia_css_print("IBUF controller ID %d Process ID %d ibuf_end_addr 0x%x\n", ID, i,
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state->proc_state[i].ibuf_end_addr);
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ia_css_print("IBUF controller ID %d Process ID %d dest_st_addr 0x%x\n", ID, i,
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state->proc_state[i].dest_st_addr);
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ia_css_print("IBUF controller ID %d Process ID %d dest_stride 0x%x\n", ID, i,
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state->proc_state[i].dest_stride);
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ia_css_print("IBUF controller ID %d Process ID %d dest_end_addr 0x%x\n", ID, i,
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state->proc_state[i].dest_end_addr);
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ia_css_print("IBUF controller ID %d Process ID %d sync_frame 0x%x\n", ID, i,
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state->proc_state[i].sync_frame);
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ia_css_print("IBUF controller ID %d Process ID %d sync_command 0x%x\n", ID, i,
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state->proc_state[i].sync_command);
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ia_css_print("IBUF controller ID %d Process ID %d store_command 0x%x\n", ID, i,
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state->proc_state[i].store_command);
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ia_css_print("IBUF controller ID %d Process ID %d shift_returned_items 0x%x\n",
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ID, i,
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state->proc_state[i].shift_returned_items);
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ia_css_print("IBUF controller ID %d Process ID %d elems_ibuf 0x%x\n", ID, i,
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state->proc_state[i].elems_ibuf);
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ia_css_print("IBUF controller ID %d Process ID %d elems_dest 0x%x\n", ID, i,
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state->proc_state[i].elems_dest);
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ia_css_print("IBUF controller ID %d Process ID %d cur_stores 0x%x\n", ID, i,
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state->proc_state[i].cur_stores);
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ia_css_print("IBUF controller ID %d Process ID %d cur_acks 0x%x\n", ID, i,
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state->proc_state[i].cur_acks);
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ia_css_print("IBUF controller ID %d Process ID %d cur_s2m_ibuf_addr 0x%x\n", ID,
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i,
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state->proc_state[i].cur_s2m_ibuf_addr);
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ia_css_print("IBUF controller ID %d Process ID %d cur_dma_ibuf_addr 0x%x\n", ID,
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i,
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state->proc_state[i].cur_dma_ibuf_addr);
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ia_css_print("IBUF controller ID %d Process ID %d cur_dma_dest_addr 0x%x\n", ID,
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i,
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state->proc_state[i].cur_dma_dest_addr);
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ia_css_print("IBUF controller ID %d Process ID %d cur_isp_dest_addr 0x%x\n", ID,
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i,
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state->proc_state[i].cur_isp_dest_addr);
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ia_css_print("IBUF controller ID %d Process ID %d dma_cmds_send 0x%x\n", ID, i,
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state->proc_state[i].dma_cmds_send);
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ia_css_print("IBUF controller ID %d Process ID %d main_cntrl_state 0x%x\n", ID,
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i,
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state->proc_state[i].main_cntrl_state);
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ia_css_print("IBUF controller ID %d Process ID %d dma_sync_state 0x%x\n", ID, i,
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state->proc_state[i].dma_sync_state);
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ia_css_print("IBUF controller ID %d Process ID %d isp_sync_state 0x%x\n", ID, i,
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state->proc_state[i].isp_sync_state);
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}
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}
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/* end of NCI */
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/*****************************************************
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*
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* Device level interface (DLI).
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*
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*****************************************************/
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/**
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* @brief Load the register value.
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* Refer to "ibuf_ctrl_public.h" for details.
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*/
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STORAGE_CLASS_IBUF_CTRL_C hrt_data ibuf_ctrl_reg_load(
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const ibuf_ctrl_ID_t ID,
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const hrt_address reg)
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{
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assert(ID < N_IBUF_CTRL_ID);
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assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1);
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return ia_css_device_load_uint32(IBUF_CTRL_BASE[ID] + reg * sizeof(hrt_data));
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}
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/**
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* @brief Store a value to the register.
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* Refer to "ibuf_ctrl_public.h" for details.
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*/
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STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_reg_store(
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const ibuf_ctrl_ID_t ID,
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const hrt_address reg,
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const hrt_data value)
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{
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assert(ID < N_IBUF_CTRL_ID);
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assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1);
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ia_css_device_store_uint32(IBUF_CTRL_BASE[ID] + reg * sizeof(hrt_data), value);
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}
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/* end of DLI */
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#endif /* __IBUF_CTRL_PRIVATE_H_INCLUDED__ */
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@ -1,94 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Support for Intel Camera Imaging ISP subsystem.
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* Copyright (c) 2015, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
|
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* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
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* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*/
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#ifndef __IBUF_CTRL_PUBLIC_H_INCLUDED__
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#define __IBUF_CTRL_PUBLIC_H_INCLUDED__
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#ifdef ISP2401
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/*****************************************************
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*
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* Native command interface (NCI).
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*
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*****************************************************/
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/**
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* @brief Get the ibuf-controller state.
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* Get the state of the ibuf-controller regiester-set.
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*
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* @param[in] id The global unique ID of the input-buffer controller.
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* @param[out] state Point to the register-state.
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*/
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STORAGE_CLASS_IBUF_CTRL_H void ibuf_ctrl_get_state(
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const ibuf_ctrl_ID_t ID,
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ibuf_ctrl_state_t *state);
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/**
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* @brief Get the state of the ibuf-controller process.
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* Get the state of the register set per buf-controller process.
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*
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* @param[in] id The global unique ID of the input-buffer controller.
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* @param[in] proc_id The process ID.
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* @param[out] state Point to the process state.
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*/
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STORAGE_CLASS_IBUF_CTRL_H void ibuf_ctrl_get_proc_state(
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const ibuf_ctrl_ID_t ID,
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const u32 proc_id,
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ibuf_ctrl_proc_state_t *state);
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/**
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* @brief Dump the ibuf-controller state.
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* Dump the state of the ibuf-controller regiester-set.
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*
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* @param[in] id The global unique ID of the input-buffer controller.
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* @param[in] state Pointer to the register-state.
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*/
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STORAGE_CLASS_IBUF_CTRL_H void ibuf_ctrl_dump_state(
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const ibuf_ctrl_ID_t ID,
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ibuf_ctrl_state_t *state);
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/* end of NCI */
|
||||
|
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/*****************************************************
|
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*
|
||||
* Device level interface (DLI).
|
||||
*
|
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*****************************************************/
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/**
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* @brief Load the register value.
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* Load the value of the register of the ibuf-controller.
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*
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* @param[in] ID The global unique ID for the ibuf-controller instance.
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* @param[in] reg The offset address of the register.
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*
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* @return the value of the register.
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*/
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STORAGE_CLASS_IBUF_CTRL_H hrt_data ibuf_ctrl_reg_load(
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const ibuf_ctrl_ID_t ID,
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const hrt_address reg);
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/**
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* @brief Store a value to the register.
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* Store a value to the registe of the ibuf-controller.
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*
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* @param[in] ID The global unique ID for the ibuf-controller instance.
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* @param[in] reg The offset address of the register.
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* @param[in] value The value to be stored.
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*
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*/
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STORAGE_CLASS_IBUF_CTRL_H void ibuf_ctrl_reg_store(
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const ibuf_ctrl_ID_t ID,
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const hrt_address reg,
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const hrt_data value);
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/* end of DLI */
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||||
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#endif /* ISP2401 */
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#endif /* __IBUF_CTRL_PUBLIC_H_INCLUDED__ */
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|
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@ -1,47 +0,0 @@
|
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/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Support for Intel Camera Imaging ISP subsystem.
|
||||
* Copyright (c) 2015, Intel Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*/
|
||||
|
||||
#ifndef __IBUF_CTRL_H_INCLUDED__
|
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#define __IBUF_CTRL_H_INCLUDED__
|
||||
|
||||
/*
|
||||
* This file is included on every cell {SP,ISP,host} and on every system
|
||||
* that uses the input system device(s). It defines the API to DLI bridge
|
||||
*
|
||||
* System and cell specific interfaces and inline code are included
|
||||
* conditionally through Makefile path settings.
|
||||
*
|
||||
* - system and cell agnostic interfaces, constants and identifiers
|
||||
* - public: system agnostic, cell specific interfaces
|
||||
* - private: system dependent, cell specific interfaces &
|
||||
* inline implementations
|
||||
* - global: system specific constants and identifiers
|
||||
* - local: system and cell specific constants and identifiers
|
||||
*/
|
||||
|
||||
#include "system_local.h"
|
||||
#include "ibuf_ctrl_local.h"
|
||||
|
||||
#ifndef __INLINE_IBUF_CTRL__
|
||||
#define STORAGE_CLASS_IBUF_CTRL_H extern
|
||||
#define STORAGE_CLASS_IBUF_CTRL_C
|
||||
#include "ibuf_ctrl_public.h"
|
||||
#else /* __INLINE_IBUF_CTRL__ */
|
||||
#define STORAGE_CLASS_IBUF_CTRL_H static inline
|
||||
#define STORAGE_CLASS_IBUF_CTRL_C static inline
|
||||
#include "ibuf_ctrl_private.h"
|
||||
#endif /* __INLINE_IBUF_CTRL__ */
|
||||
|
||||
#endif /* __IBUF_CTRL_H_INCLUDED__ */
|
||||
|
|
@ -26,7 +26,7 @@
|
|||
* isys2401_dma_cfg_t
|
||||
*/
|
||||
|
||||
#include "ibuf_ctrl.h" /* ibuf_cfg_t,
|
||||
#include "ibuf_ctrl_local.h" /* ibuf_cfg_t,
|
||||
* ibuf_ctrl_cfg_t
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -19,7 +19,6 @@
|
|||
#include "type_support.h"
|
||||
#include "input_system_global.h"
|
||||
|
||||
#include "ibuf_ctrl.h"
|
||||
#include "csi_rx.h"
|
||||
#include "pixelgen.h"
|
||||
#include "isys_stream2mmio.h"
|
||||
|
|
|
|||
|
|
@ -18,9 +18,222 @@
|
|||
|
||||
#include "input_system_public.h"
|
||||
|
||||
STORAGE_CLASS_INPUT_SYSTEM_C input_system_err_t input_system_get_state(
|
||||
const input_system_ID_t ID,
|
||||
input_system_state_t *state)
|
||||
#include "device_access.h" /* ia_css_device_load_uint32 */
|
||||
|
||||
#include "assert_support.h" /* assert */
|
||||
#include "print_support.h" /* print */
|
||||
|
||||
/* Load the register value */
|
||||
static inline hrt_data ibuf_ctrl_reg_load(const ibuf_ctrl_ID_t ID,
|
||||
const hrt_address reg)
|
||||
{
|
||||
assert(ID < N_IBUF_CTRL_ID);
|
||||
assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1);
|
||||
return ia_css_device_load_uint32(IBUF_CTRL_BASE[ID] + reg * sizeof(hrt_data));
|
||||
}
|
||||
|
||||
/* Store a value to the register */
|
||||
static inline void ibuf_ctrl_reg_store(const ibuf_ctrl_ID_t ID,
|
||||
const hrt_address reg,
|
||||
const hrt_data value)
|
||||
{
|
||||
assert(ID < N_IBUF_CTRL_ID);
|
||||
assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1);
|
||||
|
||||
ia_css_device_store_uint32(IBUF_CTRL_BASE[ID] + reg * sizeof(hrt_data), value);
|
||||
}
|
||||
|
||||
/* Get the state of the ibuf-controller process */
|
||||
static inline void ibuf_ctrl_get_proc_state(const ibuf_ctrl_ID_t ID,
|
||||
const u32 proc_id,
|
||||
ibuf_ctrl_proc_state_t *state)
|
||||
{
|
||||
hrt_address reg_bank_offset;
|
||||
|
||||
reg_bank_offset =
|
||||
_IBUF_CNTRL_PROC_REG_ALIGN * (1 + proc_id);
|
||||
|
||||
state->num_items =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_NUM_ITEMS_PER_STORE);
|
||||
|
||||
state->num_stores =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_NUM_STORES_PER_FRAME);
|
||||
|
||||
state->dma_channel =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_CHANNEL);
|
||||
|
||||
state->dma_command =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_CMD);
|
||||
|
||||
state->ibuf_st_addr =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_START_ADDRESS);
|
||||
|
||||
state->ibuf_stride =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_STRIDE);
|
||||
|
||||
state->ibuf_end_addr =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_END_ADDRESS);
|
||||
|
||||
state->dest_st_addr =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_START_ADDRESS);
|
||||
|
||||
state->dest_stride =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_STRIDE);
|
||||
|
||||
state->dest_end_addr =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_END_ADDRESS);
|
||||
|
||||
state->sync_frame =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_SYNC_FRAME);
|
||||
|
||||
state->sync_command =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_STR2MMIO_SYNC_CMD);
|
||||
|
||||
state->store_command =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_STR2MMIO_STORE_CMD);
|
||||
|
||||
state->shift_returned_items =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_SHIFT_ITEMS);
|
||||
|
||||
state->elems_ibuf =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ELEMS_P_WORD_IBUF);
|
||||
|
||||
state->elems_dest =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ELEMS_P_WORD_DEST);
|
||||
|
||||
state->cur_stores =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_STORES);
|
||||
|
||||
state->cur_acks =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_ACKS);
|
||||
|
||||
state->cur_s2m_ibuf_addr =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_S2M_IBUF_ADDR);
|
||||
|
||||
state->cur_dma_ibuf_addr =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_DMA_IBUF_ADDR);
|
||||
|
||||
state->cur_dma_dest_addr =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_DMA_DEST_ADDR);
|
||||
|
||||
state->cur_isp_dest_addr =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_ISP_DEST_ADDR);
|
||||
|
||||
state->dma_cmds_send =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_NR_DMA_CMDS_SEND);
|
||||
|
||||
state->main_cntrl_state =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_MAIN_CNTRL_STATE);
|
||||
|
||||
state->dma_sync_state =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_SYNC_STATE);
|
||||
|
||||
state->isp_sync_state =
|
||||
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ISP_SYNC_STATE);
|
||||
}
|
||||
|
||||
/* Get the ibuf-controller state. */
|
||||
static inline void ibuf_ctrl_get_state(const ibuf_ctrl_ID_t ID,
|
||||
ibuf_ctrl_state_t *state)
|
||||
{
|
||||
u32 i;
|
||||
|
||||
state->recalc_words =
|
||||
ibuf_ctrl_reg_load(ID, _IBUF_CNTRL_RECALC_WORDS_STATUS);
|
||||
state->arbiters =
|
||||
ibuf_ctrl_reg_load(ID, _IBUF_CNTRL_ARBITERS_STATUS);
|
||||
|
||||
/*
|
||||
* Get the values of the register-set per
|
||||
* ibuf-controller process.
|
||||
*/
|
||||
for (i = 0; i < N_IBUF_CTRL_PROCS[ID]; i++) {
|
||||
ibuf_ctrl_get_proc_state(
|
||||
ID,
|
||||
i,
|
||||
&state->proc_state[i]);
|
||||
}
|
||||
}
|
||||
|
||||
/* Dump the ibuf-controller state */
|
||||
static inline void ibuf_ctrl_dump_state(const ibuf_ctrl_ID_t ID,
|
||||
ibuf_ctrl_state_t *state)
|
||||
{
|
||||
u32 i;
|
||||
|
||||
ia_css_print("IBUF controller ID %d recalculate words 0x%x\n", ID,
|
||||
state->recalc_words);
|
||||
ia_css_print("IBUF controller ID %d arbiters 0x%x\n", ID, state->arbiters);
|
||||
|
||||
/*
|
||||
* Dump the values of the register-set per
|
||||
* ibuf-controller process.
|
||||
*/
|
||||
for (i = 0; i < N_IBUF_CTRL_PROCS[ID]; i++) {
|
||||
ia_css_print("IBUF controller ID %d Process ID %d num_items 0x%x\n", ID, i,
|
||||
state->proc_state[i].num_items);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d num_stores 0x%x\n", ID, i,
|
||||
state->proc_state[i].num_stores);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d dma_channel 0x%x\n", ID, i,
|
||||
state->proc_state[i].dma_channel);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d dma_command 0x%x\n", ID, i,
|
||||
state->proc_state[i].dma_command);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d ibuf_st_addr 0x%x\n", ID, i,
|
||||
state->proc_state[i].ibuf_st_addr);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d ibuf_stride 0x%x\n", ID, i,
|
||||
state->proc_state[i].ibuf_stride);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d ibuf_end_addr 0x%x\n", ID, i,
|
||||
state->proc_state[i].ibuf_end_addr);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d dest_st_addr 0x%x\n", ID, i,
|
||||
state->proc_state[i].dest_st_addr);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d dest_stride 0x%x\n", ID, i,
|
||||
state->proc_state[i].dest_stride);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d dest_end_addr 0x%x\n", ID, i,
|
||||
state->proc_state[i].dest_end_addr);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d sync_frame 0x%x\n", ID, i,
|
||||
state->proc_state[i].sync_frame);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d sync_command 0x%x\n", ID, i,
|
||||
state->proc_state[i].sync_command);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d store_command 0x%x\n", ID, i,
|
||||
state->proc_state[i].store_command);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d shift_returned_items 0x%x\n",
|
||||
ID, i,
|
||||
state->proc_state[i].shift_returned_items);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d elems_ibuf 0x%x\n", ID, i,
|
||||
state->proc_state[i].elems_ibuf);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d elems_dest 0x%x\n", ID, i,
|
||||
state->proc_state[i].elems_dest);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d cur_stores 0x%x\n", ID, i,
|
||||
state->proc_state[i].cur_stores);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d cur_acks 0x%x\n", ID, i,
|
||||
state->proc_state[i].cur_acks);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d cur_s2m_ibuf_addr 0x%x\n", ID,
|
||||
i,
|
||||
state->proc_state[i].cur_s2m_ibuf_addr);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d cur_dma_ibuf_addr 0x%x\n", ID,
|
||||
i,
|
||||
state->proc_state[i].cur_dma_ibuf_addr);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d cur_dma_dest_addr 0x%x\n", ID,
|
||||
i,
|
||||
state->proc_state[i].cur_dma_dest_addr);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d cur_isp_dest_addr 0x%x\n", ID,
|
||||
i,
|
||||
state->proc_state[i].cur_isp_dest_addr);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d dma_cmds_send 0x%x\n", ID, i,
|
||||
state->proc_state[i].dma_cmds_send);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d main_cntrl_state 0x%x\n", ID,
|
||||
i,
|
||||
state->proc_state[i].main_cntrl_state);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d dma_sync_state 0x%x\n", ID, i,
|
||||
state->proc_state[i].dma_sync_state);
|
||||
ia_css_print("IBUF controller ID %d Process ID %d isp_sync_state 0x%x\n", ID, i,
|
||||
state->proc_state[i].isp_sync_state);
|
||||
}
|
||||
}
|
||||
|
||||
static inline input_system_err_t
|
||||
input_system_get_state(const input_system_ID_t ID,
|
||||
input_system_state_t *state)
|
||||
{
|
||||
u32 i;
|
||||
|
||||
|
|
@ -73,9 +286,8 @@ STORAGE_CLASS_INPUT_SYSTEM_C input_system_err_t input_system_get_state(
|
|||
return INPUT_SYSTEM_ERR_NO_ERROR;
|
||||
}
|
||||
|
||||
STORAGE_CLASS_INPUT_SYSTEM_C void input_system_dump_state(
|
||||
const input_system_ID_t ID,
|
||||
input_system_state_t *state)
|
||||
static inline void input_system_dump_state(const input_system_ID_t ID,
|
||||
input_system_state_t *state)
|
||||
{
|
||||
u32 i;
|
||||
|
||||
|
|
|
|||
Загрузка…
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