soc: renesas: r8a779f0-sysc: Add r8a779f0 support
Add support for R-Car S4-8 (R8A779F0) SoC power areas and register access. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20211201073308.1003945-7-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Родитель
5ca77c9d80
Коммит
654d5fdb89
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@ -340,6 +340,10 @@ config SYSC_R8A77961
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bool "System Controller support for R-Car M3-W+" if COMPILE_TEST
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select SYSC_RCAR
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config SYSC_R8A779F0
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bool "System Controller support for R-Car S4-8" if COMPILE_TEST
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select SYSC_RCAR_GEN4
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config SYSC_R8A7792
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bool "System Controller support for R-Car V2H" if COMPILE_TEST
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select SYSC_RCAR
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@ -25,6 +25,7 @@ obj-$(CONFIG_SYSC_R8A77980) += r8a77980-sysc.o
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obj-$(CONFIG_SYSC_R8A77990) += r8a77990-sysc.o
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obj-$(CONFIG_SYSC_R8A77995) += r8a77995-sysc.o
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obj-$(CONFIG_SYSC_R8A779A0) += r8a779a0-sysc.o
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obj-$(CONFIG_SYSC_R8A779F0) += r8a779f0-sysc.o
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ifdef CONFIG_SMP
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obj-$(CONFIG_ARCH_R9A06G032) += r9a06g032-smp.o
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endif
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@ -0,0 +1,47 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Renesas R-Car S4-8 System Controller
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*
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* Copyright (C) 2021 Renesas Electronics Corp.
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*/
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#include <linux/bits.h>
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#include <linux/clk/renesas.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/of_address.h>
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#include <linux/pm_domain.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <dt-bindings/power/r8a779f0-sysc.h>
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#include "rcar-gen4-sysc.h"
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static struct rcar_gen4_sysc_area r8a779f0_areas[] __initdata = {
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{ "always-on", R8A779F0_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
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{ "a3e0", R8A779F0_PD_A3E0, R8A779F0_PD_ALWAYS_ON, PD_SCU },
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{ "a3e1", R8A779F0_PD_A3E1, R8A779F0_PD_ALWAYS_ON, PD_SCU },
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{ "a2e0d0", R8A779F0_PD_A2E0D0, R8A779F0_PD_A3E0, PD_SCU },
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{ "a2e0d1", R8A779F0_PD_A2E0D1, R8A779F0_PD_A3E0, PD_SCU },
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{ "a2e1d0", R8A779F0_PD_A2E1D0, R8A779F0_PD_A3E1, PD_SCU },
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{ "a2e1d1", R8A779F0_PD_A2E1D1, R8A779F0_PD_A3E1, PD_SCU },
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{ "a1e0d0c0", R8A779F0_PD_A1E0D0C0, R8A779F0_PD_A2E0D0, PD_CPU_NOCR },
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{ "a1e0d0c1", R8A779F0_PD_A1E0D0C1, R8A779F0_PD_A2E0D0, PD_CPU_NOCR },
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{ "a1e0d1c0", R8A779F0_PD_A1E0D1C0, R8A779F0_PD_A2E0D1, PD_CPU_NOCR },
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{ "a1e0d1c1", R8A779F0_PD_A1E0D1C1, R8A779F0_PD_A2E0D1, PD_CPU_NOCR },
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{ "a1e1d0c0", R8A779F0_PD_A1E1D0C0, R8A779F0_PD_A2E1D0, PD_CPU_NOCR },
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{ "a1e1d0c1", R8A779F0_PD_A1E1D0C1, R8A779F0_PD_A2E1D0, PD_CPU_NOCR },
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{ "a1e1d1c0", R8A779F0_PD_A1E1D1C0, R8A779F0_PD_A2E1D1, PD_CPU_NOCR },
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{ "a1e1d1c1", R8A779F0_PD_A1E1D1C1, R8A779F0_PD_A2E1D1, PD_CPU_NOCR },
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};
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const struct rcar_gen4_sysc_info r8a779f0_sysc_info __initconst = {
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.areas = r8a779f0_areas,
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.num_areas = ARRAY_SIZE(r8a779f0_areas),
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};
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@ -278,6 +278,9 @@ finalize:
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static const struct of_device_id rcar_gen4_sysc_matches[] __initconst = {
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#ifdef CONFIG_SYSC_R8A779A0
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{ .compatible = "renesas,r8a779a0-sysc", .data = &r8a779a0_sysc_info },
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#endif
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#ifdef CONFIG_SYSC_R8A779F0
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{ .compatible = "renesas,r8a779f0-sysc", .data = &r8a779f0_sysc_info },
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#endif
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{ /* sentinel */ }
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};
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@ -38,5 +38,6 @@ struct rcar_gen4_sysc_info {
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};
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extern const struct rcar_gen4_sysc_info r8a779a0_sysc_info;
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extern const struct rcar_gen4_sysc_info r8a779f0_sysc_info;
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#endif /* __SOC_RENESAS_RCAR_GEN4_SYSC_H__ */
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