scsi: mpt3sas: Update MPI Headers
Update MPI Files to support protocol level reset for NVMe device. Signed-off-by: Chaitra P B <chaitra.basappa@broadcom.com> Signed-off-by: Suganath Prabu S <suganath-prabu.subramani@broadcom.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Chaitra P B
Martin K. Petersen
Родитель
3d29ed85fc
Коммит
65928d1f41
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@ -9,7 +9,7 @@
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* scatter/gather formats.
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* Creation Date: June 21, 2006
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*
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* mpi2.h Version: 02.00.48
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* mpi2.h Version: 02.00.50
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*
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* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
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* prefix are for use only on MPI v2.5 products, and must not be used
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@ -114,6 +114,8 @@
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* 09-02-16 02.00.46 Bumped MPI2_HEADER_VERSION_UNIT.
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* 11-23-16 02.00.47 Bumped MPI2_HEADER_VERSION_UNIT.
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* 02-03-17 02.00.48 Bumped MPI2_HEADER_VERSION_UNIT.
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* 06-13-17 02.00.49 Bumped MPI2_HEADER_VERSION_UNIT.
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* 09-29-17 02.00.50 Bumped MPI2_HEADER_VERSION_UNIT.
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* --------------------------------------------------------------------------
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*/
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@ -152,8 +154,9 @@
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MPI26_VERSION_MINOR)
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#define MPI2_VERSION_02_06 (0x0206)
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/*Unit and Dev versioning for this MPI header set */
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#define MPI2_HEADER_VERSION_UNIT (0x30)
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/* Unit and Dev versioning for this MPI header set */
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#define MPI2_HEADER_VERSION_UNIT (0x32)
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#define MPI2_HEADER_VERSION_DEV (0x00)
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#define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00)
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#define MPI2_HEADER_VERSION_UNIT_SHIFT (8)
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@ -7,7 +7,7 @@
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* Title: MPI Configuration messages and pages
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* Creation Date: November 10, 2006
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*
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* mpi2_cnfg.h Version: 02.00.40
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* mpi2_cnfg.h Version: 02.00.42
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*
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* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
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* prefix are for use only on MPI v2.5 products, and must not be used
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@ -219,6 +219,18 @@
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* Added ChassisSlot field to SAS Enclosure Page 0.
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* Added ChassisSlot Valid bit (bit 5) to the Flags field
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* in SAS Enclosure Page 0.
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* 06-13-17 02.00.41 Added MPI26_MFGPAGE_DEVID_SAS3816 and
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* MPI26_MFGPAGE_DEVID_SAS3916 defines.
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* Removed MPI26_MFGPAGE_DEVID_SAS4008 define.
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* Added MPI26_PCIEIOUNIT1_LINKFLAGS_SRNS_EN define.
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* Renamed PI26_PCIEIOUNIT1_LINKFLAGS_EN_SRIS to
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* PI26_PCIEIOUNIT1_LINKFLAGS_SRIS_EN.
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* Renamed MPI26_PCIEIOUNIT1_LINKFLAGS_DIS_SRIS to
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* MPI26_PCIEIOUNIT1_LINKFLAGS_DIS_SEPARATE_REFCLK.
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* 09-29-17 02.00.42 Added ControllerResetTO field to PCIe Device Page 2.
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* Added NOIOB field to PCIe Device Page 2.
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* Added MPI26_PCIEDEV2_CAP_DATA_BLK_ALIGN_AND_GRAN to
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* the Capabilities field of PCIe Device Page 2.
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* --------------------------------------------------------------------------
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*/
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@ -556,7 +568,8 @@ typedef struct _MPI2_CONFIG_REPLY {
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#define MPI26_MFGPAGE_DEVID_SAS3616 (0x00D1)
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#define MPI26_MFGPAGE_DEVID_SAS3708 (0x00D2)
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#define MPI26_MFGPAGE_DEVID_SAS4008 (0x00A1)
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#define MPI26_MFGPAGE_DEVID_SAS3816 (0x00A1)
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#define MPI26_MFGPAGE_DEVID_SAS3916 (0x00A0)
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/*Manufacturing Page 0 */
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@ -3864,20 +3877,25 @@ typedef struct _MPI26_CONFIG_PAGE_PCIEDEV_0 {
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typedef struct _MPI26_CONFIG_PAGE_PCIEDEV_2 {
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MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /*0x00 */
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U16 DevHandle; /*0x08 */
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U16 Reserved1; /*0x0A */
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U32 MaximumDataTransferSize;/*0x0C */
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U8 ControllerResetTO; /* 0x0A */
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U8 Reserved1; /* 0x0B */
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U32 MaximumDataTransferSize; /*0x0C */
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U32 Capabilities; /*0x10 */
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U32 Reserved2; /*0x14 */
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U16 NOIOB; /* 0x14 */
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U16 Reserved2; /* 0x16 */
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} MPI26_CONFIG_PAGE_PCIEDEV_2, *PTR_MPI26_CONFIG_PAGE_PCIEDEV_2,
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Mpi26PCIeDevicePage2_t, *pMpi26PCIeDevicePage2_t;
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#define MPI26_PCIEDEVICE2_PAGEVERSION (0x00)
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#define MPI26_PCIEDEVICE2_PAGEVERSION (0x01)
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/*defines for PCIe Device Page 2 Capabilities field */
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#define MPI26_PCIEDEV2_CAP_DATA_BLK_ALIGN_AND_GRAN (0x00000008)
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#define MPI26_PCIEDEV2_CAP_SGL_FORMAT (0x00000004)
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#define MPI26_PCIEDEV2_CAP_BIT_BUCKET_SUPPORT (0x00000002)
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#define MPI26_PCIEDEV2_CAP_SGL_SUPPORT (0x00000001)
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/* Defines for the NOIOB field */
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#define MPI26_PCIEDEV2_NOIOB_UNSUPPORTED (0x0000)
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/****************************************************************************
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* PCIe Link Config Pages (MPI v2.6 and later)
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@ -7,7 +7,7 @@
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* Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
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* Creation Date: October 11, 2006
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*
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* mpi2_ioc.h Version: 02.00.32
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* mpi2_ioc.h Version: 02.00.34
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*
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* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
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* prefix are for use only on MPI v2.5 products, and must not be used
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@ -167,6 +167,10 @@
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* 02-02-17 02.00.32 Added MPI2_FW_DOWNLOAD_ITYPE_CBB_BACKUP.
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* Added MPI25_EVENT_DATA_ACTIVE_CABLE_EXCEPT and related
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* defines for the ReasonCode field.
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* 06-13-17 02.00.33 Added MPI2_FW_DOWNLOAD_ITYPE_CPLD.
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* 09-29-17 02.00.34 Added MPI26_EVENT_PCIDEV_STAT_RC_PCIE_HOT_RESET_FAILED
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* to the ReasonCode field in PCIe Device Status Change
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* Event Data.
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* --------------------------------------------------------------------------
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*/
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@ -1182,6 +1186,7 @@ typedef struct _MPI26_EVENT_DATA_PCIE_DEVICE_STATUS_CHANGE {
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#define MPI26_EVENT_PCIDEV_STAT_RC_CMP_INTERNAL_DEV_RESET (0x0E)
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#define MPI26_EVENT_PCIDEV_STAT_RC_CMP_TASK_ABORT_INTERNAL (0x0F)
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#define MPI26_EVENT_PCIDEV_STAT_RC_DEV_INIT_FAILURE (0x10)
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#define MPI26_EVENT_PCIDEV_STAT_RC_PCIE_HOT_RESET_FAILED (0x11)
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/*PCIe Enumeration Event data (MPI v2.6 and later) */
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