[ARM] S3C24XX: Split PM code from arch/arm/plat-s3c24xx/irq.c
Split the PM code out of arch/arm/plat-s3c24xx/irq.c to remove some of the #ifdefs being used. Also fix a couple of places where the absecnce of a function was redefined to the same thing. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks
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840eeeb880
Коммит
65fa22b73f
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@ -27,6 +27,7 @@ obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o
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obj-$(CONFIG_CPU_S3C244X) += s3c244x-clock.o
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obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o
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obj-$(CONFIG_PM) += pm.o
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obj-$(CONFIG_PM) += irq-pm.o
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obj-$(CONFIG_PM) += sleep.o
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obj-$(CONFIG_HAVE_PWM) += pwm.o
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obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o
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@ -10,6 +10,12 @@
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* published by the Free Software Foundation.
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*/
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <mach/regs-irq.h>
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#include <mach/regs-gpio.h>
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#define irqdbf(x...)
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#define irqdbf2(x...)
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@ -102,7 +108,9 @@ s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group)
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#ifdef CONFIG_PM
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extern int s3c_irq_wake(unsigned int irqno, unsigned int state);
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extern int s3c_irqext_wake(unsigned int irqno, unsigned int state);
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#else
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#define s3c_irqext_wake NULL
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#define s3c_irq_wake NULL
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#endif
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@ -0,0 +1,116 @@
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/* linux/arch/arm/plat-s3c24xx/irq-om.c
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*
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* Copyright (c) 2003,2004 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* S3C24XX - IRQ PM code
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/sysdev.h>
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#include <plat/cpu.h>
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#include <plat/pm.h>
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#include <plat/irq.h>
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/* state for IRQs over sleep */
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/* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources
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*
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* set bit to 1 in allow bitfield to enable the wakeup settings on it
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*/
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unsigned long s3c_irqwake_intallow = 1L << (IRQ_RTC - IRQ_EINT0) | 0xfL;
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unsigned long s3c_irqwake_intmask = 0xffffffffL;
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unsigned long s3c_irqwake_eintallow = 0x0000fff0L;
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unsigned long s3c_irqwake_eintmask = 0xffffffffL;
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int
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s3c_irq_wake(unsigned int irqno, unsigned int state)
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{
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unsigned long irqbit = 1 << (irqno - IRQ_EINT0);
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if (!(s3c_irqwake_intallow & irqbit))
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return -ENOENT;
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printk(KERN_INFO "wake %s for irq %d\n",
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state ? "enabled" : "disabled", irqno);
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if (!state)
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s3c_irqwake_intmask |= irqbit;
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else
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s3c_irqwake_intmask &= ~irqbit;
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return 0;
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}
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int s3c_irqext_wake(unsigned int irqno, unsigned int state)
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{
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unsigned long bit = 1L << (irqno - EXTINT_OFF);
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if (!(s3c_irqwake_eintallow & bit))
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return -ENOENT;
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printk(KERN_INFO "wake %s for irq %d\n",
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state ? "enabled" : "disabled", irqno);
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if (!state)
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s3c_irqwake_eintmask |= bit;
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else
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s3c_irqwake_eintmask &= ~bit;
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return 0;
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}
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static struct sleep_save irq_save[] = {
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SAVE_ITEM(S3C2410_INTMSK),
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SAVE_ITEM(S3C2410_INTSUBMSK),
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};
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/* the extint values move between the s3c2410/s3c2440 and the s3c2412
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* so we use an array to hold them, and to calculate the address of
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* the register at run-time
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*/
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static unsigned long save_extint[3];
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static unsigned long save_eintflt[4];
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static unsigned long save_eintmask;
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int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(save_extint); i++)
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save_extint[i] = __raw_readl(S3C24XX_EXTINT0 + (i*4));
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for (i = 0; i < ARRAY_SIZE(save_eintflt); i++)
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save_eintflt[i] = __raw_readl(S3C24XX_EINFLT0 + (i*4));
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s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));
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save_eintmask = __raw_readl(S3C24XX_EINTMASK);
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return 0;
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}
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int s3c24xx_irq_resume(struct sys_device *dev)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(save_extint); i++)
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__raw_writel(save_extint[i], S3C24XX_EXTINT0 + (i*4));
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for (i = 0; i < ARRAY_SIZE(save_eintflt); i++)
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__raw_writel(save_eintflt[i], S3C24XX_EINFLT0 + (i*4));
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s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));
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__raw_writel(save_eintmask, S3C24XX_EINTMASK);
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return 0;
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}
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@ -55,81 +55,16 @@
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/sysdev.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <asm/mach/irq.h>
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#include <plat/regs-irqtype.h>
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#include <mach/regs-irq.h>
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#include <mach/regs-gpio.h>
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#include <plat/cpu.h>
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#include <plat/pm.h>
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#include <plat/irq.h>
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/* wakeup irq control */
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#ifdef CONFIG_PM
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/* state for IRQs over sleep */
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/* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources
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*
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* set bit to 1 in allow bitfield to enable the wakeup settings on it
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*/
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unsigned long s3c_irqwake_intallow = 1L << (IRQ_RTC - IRQ_EINT0) | 0xfL;
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unsigned long s3c_irqwake_intmask = 0xffffffffL;
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unsigned long s3c_irqwake_eintallow = 0x0000fff0L;
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unsigned long s3c_irqwake_eintmask = 0xffffffffL;
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int
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s3c_irq_wake(unsigned int irqno, unsigned int state)
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{
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unsigned long irqbit = 1 << (irqno - IRQ_EINT0);
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if (!(s3c_irqwake_intallow & irqbit))
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return -ENOENT;
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printk(KERN_INFO "wake %s for irq %d\n",
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state ? "enabled" : "disabled", irqno);
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if (!state)
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s3c_irqwake_intmask |= irqbit;
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else
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s3c_irqwake_intmask &= ~irqbit;
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return 0;
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}
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static int
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s3c_irqext_wake(unsigned int irqno, unsigned int state)
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{
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unsigned long bit = 1L << (irqno - EXTINT_OFF);
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if (!(s3c_irqwake_eintallow & bit))
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return -ENOENT;
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printk(KERN_INFO "wake %s for irq %d\n",
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state ? "enabled" : "disabled", irqno);
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if (!state)
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s3c_irqwake_eintmask |= bit;
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else
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s3c_irqwake_eintmask &= ~bit;
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return 0;
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}
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#else
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#define s3c_irqext_wake NULL
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#define s3c_irq_wake NULL
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#endif
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static void
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s3c_irq_mask(unsigned int irqno)
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{
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@ -590,59 +525,6 @@ s3c_irq_demux_extint4t7(unsigned int irq,
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}
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}
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#ifdef CONFIG_PM
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static struct sleep_save irq_save[] = {
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SAVE_ITEM(S3C2410_INTMSK),
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SAVE_ITEM(S3C2410_INTSUBMSK),
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};
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/* the extint values move between the s3c2410/s3c2440 and the s3c2412
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* so we use an array to hold them, and to calculate the address of
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* the register at run-time
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*/
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static unsigned long save_extint[3];
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static unsigned long save_eintflt[4];
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static unsigned long save_eintmask;
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int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(save_extint); i++)
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save_extint[i] = __raw_readl(S3C24XX_EXTINT0 + (i*4));
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for (i = 0; i < ARRAY_SIZE(save_eintflt); i++)
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save_eintflt[i] = __raw_readl(S3C24XX_EINFLT0 + (i*4));
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s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));
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save_eintmask = __raw_readl(S3C24XX_EINTMASK);
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return 0;
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}
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int s3c24xx_irq_resume(struct sys_device *dev)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(save_extint); i++)
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__raw_writel(save_extint[i], S3C24XX_EXTINT0 + (i*4));
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for (i = 0; i < ARRAY_SIZE(save_eintflt); i++)
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__raw_writel(save_eintflt[i], S3C24XX_EINFLT0 + (i*4));
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s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));
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__raw_writel(save_eintmask, S3C24XX_EINTMASK);
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return 0;
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}
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#else
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#define s3c24xx_irq_suspend NULL
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#define s3c24xx_irq_resume NULL
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#endif
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/* s3c24xx_init_irq
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*
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* Initialise S3C2410 IRQ system
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