perf tools powerpc: Add support for extended regs in power10
Added support for supported regs which are new in power10 ( MMCR3, SIER2, SIER3 ) to sample_reg_mask in the tool side to use with `-I?` option. Also added PVR check to send extended mask for power10 at kernel while capturing extended regs in each sample. Signed-off-by: Athira Jajeev <atrajeev@linux.vnet.ibm.com> Reviewed-by: Kajol Jain <kjain@linux.ibm.com> Reviewed-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com> Tested-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Michael Neuling <mikey@neuling.org> Cc: Ravi Bangoria <ravi.bangoria@linux.ibm.com> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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@ -52,6 +52,9 @@ enum perf_event_powerpc_regs {
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PERF_REG_POWERPC_MMCR0,
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PERF_REG_POWERPC_MMCR1,
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PERF_REG_POWERPC_MMCR2,
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PERF_REG_POWERPC_MMCR3,
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PERF_REG_POWERPC_SIER2,
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PERF_REG_POWERPC_SIER3,
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/* Max regs without the extended regs */
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PERF_REG_POWERPC_MAX = PERF_REG_POWERPC_MMCRA + 1,
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};
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@ -60,6 +63,9 @@ enum perf_event_powerpc_regs {
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/* PERF_REG_EXTENDED_MASK value for CPU_FTR_ARCH_300 */
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#define PERF_REG_PMU_MASK_300 (((1ULL << (PERF_REG_POWERPC_MMCR2 + 1)) - 1) - PERF_REG_PMU_MASK)
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/* PERF_REG_EXTENDED_MASK value for CPU_FTR_ARCH_31 */
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#define PERF_REG_PMU_MASK_31 (((1ULL << (PERF_REG_POWERPC_SIER3 + 1)) - 1) - PERF_REG_PMU_MASK)
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#define PERF_REG_MAX_ISA_300 (PERF_REG_POWERPC_MMCR2 + 1)
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#define PERF_REG_MAX_ISA_31 (PERF_REG_POWERPC_SIER3 + 1)
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#endif /* _UAPI_ASM_POWERPC_PERF_REGS_H */
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@ -68,6 +68,9 @@ static const char *reg_names[] = {
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[PERF_REG_POWERPC_MMCR0] = "mmcr0",
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[PERF_REG_POWERPC_MMCR1] = "mmcr1",
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[PERF_REG_POWERPC_MMCR2] = "mmcr2",
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[PERF_REG_POWERPC_MMCR3] = "mmcr3",
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[PERF_REG_POWERPC_SIER2] = "sier2",
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[PERF_REG_POWERPC_SIER3] = "sier3",
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};
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static inline const char *perf_reg_name(int id)
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@ -14,6 +14,7 @@
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#include <linux/kernel.h>
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#define PVR_POWER9 0x004E
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#define PVR_POWER10 0x0080
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const struct sample_reg sample_reg_masks[] = {
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SMPL_REG(r0, PERF_REG_POWERPC_R0),
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@ -64,6 +65,9 @@ const struct sample_reg sample_reg_masks[] = {
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SMPL_REG(mmcr0, PERF_REG_POWERPC_MMCR0),
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SMPL_REG(mmcr1, PERF_REG_POWERPC_MMCR1),
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SMPL_REG(mmcr2, PERF_REG_POWERPC_MMCR2),
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SMPL_REG(mmcr3, PERF_REG_POWERPC_MMCR3),
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SMPL_REG(sier2, PERF_REG_POWERPC_SIER2),
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SMPL_REG(sier3, PERF_REG_POWERPC_SIER3),
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SMPL_REG_END
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};
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@ -194,6 +198,8 @@ uint64_t arch__intr_reg_mask(void)
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version = (((mfspr(SPRN_PVR)) >> 16) & 0xFFFF);
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if (version == PVR_POWER9)
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extended_mask = PERF_REG_PMU_MASK_300;
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else if (version == PVR_POWER10)
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extended_mask = PERF_REG_PMU_MASK_31;
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else
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return mask;
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