drm/i915/gen11: Enable 6 sprites on gen11
Gen11 supports 7 planes + 1 cursor on each pipe. Bump I915_MAX_PLANES to 8, and set num_sprites correctly. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> [mlankhorst: Move the skl/bxt comment to the BXT branch. (Matt)] Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181018115134.9061-3-maarten.lankhorst@linux.intel.com
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@ -752,18 +752,22 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
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BUILD_BUG_ON(I915_NUM_ENGINES > BITS_PER_TYPE(intel_ring_mask_t));
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/*
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* Skylake and Broxton currently don't expose the topmost plane as its
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* use is exclusive with the legacy cursor and we only want to expose
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* one of those, not both. Until we can safely expose the topmost plane
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* as a DRM_PLANE_TYPE_CURSOR with all the features exposed/supported,
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* we don't expose the topmost plane at all to prevent ABI breakage
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* down the line.
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*/
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if (IS_GEN10(dev_priv) || IS_GEMINILAKE(dev_priv))
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if (IS_GEN11(dev_priv))
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for_each_pipe(dev_priv, pipe)
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info->num_sprites[pipe] = 6;
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else if (IS_GEN10(dev_priv) || IS_GEMINILAKE(dev_priv))
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for_each_pipe(dev_priv, pipe)
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info->num_sprites[pipe] = 3;
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else if (IS_BROXTON(dev_priv)) {
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/*
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* Skylake and Broxton currently don't expose the topmost plane as its
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* use is exclusive with the legacy cursor and we only want to expose
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* one of those, not both. Until we can safely expose the topmost plane
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* as a DRM_PLANE_TYPE_CURSOR with all the features exposed/supported,
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* we don't expose the topmost plane at all to prevent ABI breakage
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* down the line.
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*/
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info->num_sprites[PIPE_A] = 2;
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info->num_sprites[PIPE_B] = 2;
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info->num_sprites[PIPE_C] = 1;
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@ -122,6 +122,9 @@ enum plane_id {
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PLANE_SPRITE0,
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PLANE_SPRITE1,
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PLANE_SPRITE2,
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PLANE_SPRITE3,
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PLANE_SPRITE4,
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PLANE_SPRITE5,
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PLANE_CURSOR,
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I915_MAX_PLANES,
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