arm64: Expose DC CVADP to userspace
ARMv8.5 builds upon the ARMv8.2 DC CVAP instruction by introducing a DC CVADP instruction which cleans the data cache to the point of deep persistence. Let's expose this support via the arm64 ELF hwcaps. Signed-off-by: Andrew Murray <andrew.murray@arm.com> Reviewed-by: Dave Martin <Dave.Martin@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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@ -135,6 +135,10 @@ HWCAP_DCPOP
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Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0001.
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HWCAP2_DCPODP
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Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010.
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HWCAP_SHA3
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Functionality implied by ID_AA64ISAR0_EL1.SHA3 == 0b0001.
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@ -88,6 +88,7 @@
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#define KERNEL_HWCAP_PACG __khwcap_feature(PACG)
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#define __khwcap2_feature(x) (const_ilog2(HWCAP2_ ## x) + 32)
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#define KERNEL_HWCAP_DCPODP __khwcap2_feature(DCPODP)
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/*
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* This yields a mask that user programs can use to figure out what
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@ -53,4 +53,9 @@
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#define HWCAP_PACA (1 << 30)
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#define HWCAP_PACG (1UL << 31)
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/*
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* HWCAP2 flags - for AT_HWCAP2
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*/
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#define HWCAP2_DCPODP (1 << 0)
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#endif /* _UAPI__ASM_HWCAP_H */
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@ -1591,6 +1591,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
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HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_ASIMD_SHIFT, FTR_SIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_ASIMDHP),
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HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_DIT_SHIFT, FTR_SIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_DIT),
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HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_DPB_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_DCPOP),
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HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_DPB_SHIFT, FTR_UNSIGNED, 2, CAP_HWCAP, KERNEL_HWCAP_DCPODP),
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HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_JSCVT_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_JSCVT),
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HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_FCMA_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_FCMA),
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HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_LRCPC_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_LRCPC),
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@ -85,6 +85,7 @@ static const char *const hwcap_str[] = {
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"sb",
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"paca",
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"pacg",
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"dcpodp",
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NULL
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};
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