ASoC: Add regmap_field helpers for simple bit operations
Merge series from Li Chen <lchen.firstlove@zohomail.com> This series proposes to add simple bit operations for setting, clearing and testing specific bits with regmap_field and uses them in one of the sunxi drivers.
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Коммит
6735988b14
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@ -2220,6 +2220,28 @@ int regmap_field_update_bits_base(struct regmap_field *field,
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}
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EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
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/**
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* regmap_field_test_bits() - Check if all specified bits are set in a
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* register field.
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*
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* @field: Register field to operate on
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* @bits: Bits to test
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*
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* Returns -1 if the underlying regmap_field_read() fails, 0 if at least one of the
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* tested bits is not set and 1 if all tested bits are set.
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*/
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int regmap_field_test_bits(struct regmap_field *field, unsigned int bits)
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{
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unsigned int val, ret;
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ret = regmap_field_read(field, &val);
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if (ret)
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return ret;
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return (val & bits) == bits;
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}
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EXPORT_SYMBOL_GPL(regmap_field_test_bits);
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/**
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* regmap_fields_update_bits_base() - Perform a read/modify/write cycle a
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* register field with port ID
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@ -1336,6 +1336,22 @@ static inline int regmap_field_update_bits(struct regmap_field *field,
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NULL, false, false);
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}
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static inline int regmap_field_set_bits(struct regmap_field *field,
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unsigned int bits)
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{
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return regmap_field_update_bits_base(field, bits, bits, NULL, false,
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false);
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}
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static inline int regmap_field_clear_bits(struct regmap_field *field,
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unsigned int bits)
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{
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return regmap_field_update_bits_base(field, bits, 0, NULL, false,
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false);
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}
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int regmap_field_test_bits(struct regmap_field *field, unsigned int bits);
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static inline int
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regmap_field_force_update_bits(struct regmap_field *field,
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unsigned int mask, unsigned int val)
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@ -1769,6 +1785,27 @@ regmap_field_force_update_bits(struct regmap_field *field,
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return -EINVAL;
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}
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static inline int regmap_field_set_bits(struct regmap_field *field,
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unsigned int bits)
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{
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WARN_ONCE(1, "regmap API is disabled");
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return -EINVAL;
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}
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static inline int regmap_field_clear_bits(struct regmap_field *field,
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unsigned int bits)
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{
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WARN_ONCE(1, "regmap API is disabled");
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return -EINVAL;
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}
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static inline int regmap_field_test_bits(struct regmap_field *field,
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unsigned int bits)
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{
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WARN_ONCE(1, "regmap API is disabled");
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return -EINVAL;
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}
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static inline int regmap_fields_write(struct regmap_field *field,
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unsigned int id, unsigned int val)
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{
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@ -250,37 +250,33 @@ struct sun4i_codec {
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static void sun4i_codec_start_playback(struct sun4i_codec *scodec)
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{
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/* Flush TX FIFO */
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regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
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BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH),
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BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH));
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regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
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BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH));
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/* Enable DAC DRQ */
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regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
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BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN),
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BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN));
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regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
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BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN));
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}
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static void sun4i_codec_stop_playback(struct sun4i_codec *scodec)
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{
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/* Disable DAC DRQ */
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regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
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BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN),
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0);
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regmap_clear_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
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BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN));
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}
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static void sun4i_codec_start_capture(struct sun4i_codec *scodec)
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{
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/* Enable ADC DRQ */
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regmap_field_update_bits(scodec->reg_adc_fifoc,
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BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN),
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BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN));
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regmap_field_set_bits(scodec->reg_adc_fifoc,
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BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN));
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}
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static void sun4i_codec_stop_capture(struct sun4i_codec *scodec)
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{
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/* Disable ADC DRQ */
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regmap_field_update_bits(scodec->reg_adc_fifoc,
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BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN), 0);
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regmap_field_clear_bits(scodec->reg_adc_fifoc,
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BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN));
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}
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static int sun4i_codec_trigger(struct snd_pcm_substream *substream, int cmd,
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@ -323,8 +319,7 @@ static int sun4i_codec_prepare_capture(struct snd_pcm_substream *substream,
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/* Flush RX FIFO */
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regmap_field_update_bits(scodec->reg_adc_fifoc,
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BIT(SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH),
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regmap_field_set_bits(scodec->reg_adc_fifoc,
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BIT(SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH));
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@ -365,8 +360,7 @@ static int sun4i_codec_prepare_playback(struct snd_pcm_substream *substream,
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u32 val;
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/* Flush the TX FIFO */
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regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
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BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH),
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regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
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BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH));
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/* Set TX FIFO Empty Trigger Level */
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@ -386,9 +380,8 @@ static int sun4i_codec_prepare_playback(struct snd_pcm_substream *substream,
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val);
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/* Send zeros when we have an underrun */
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regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
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BIT(SUN4I_CODEC_DAC_FIFOC_SEND_LASAT),
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0);
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regmap_clear_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
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BIT(SUN4I_CODEC_DAC_FIFOC_SEND_LASAT));
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return 0;
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};
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@ -485,33 +478,27 @@ static int sun4i_codec_hw_params_capture(struct sun4i_codec *scodec,
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/* Set the number of channels we want to use */
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if (params_channels(params) == 1)
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regmap_field_update_bits(scodec->reg_adc_fifoc,
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BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN),
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regmap_field_set_bits(scodec->reg_adc_fifoc,
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BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN));
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else
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regmap_field_update_bits(scodec->reg_adc_fifoc,
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BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN),
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0);
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regmap_field_clear_bits(scodec->reg_adc_fifoc,
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BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN));
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/* Set the number of sample bits to either 16 or 24 bits */
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if (hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min == 32) {
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regmap_field_update_bits(scodec->reg_adc_fifoc,
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BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS),
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regmap_field_set_bits(scodec->reg_adc_fifoc,
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BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS));
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regmap_field_update_bits(scodec->reg_adc_fifoc,
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BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE),
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0);
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regmap_field_clear_bits(scodec->reg_adc_fifoc,
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BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE));
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scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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} else {
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regmap_field_update_bits(scodec->reg_adc_fifoc,
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BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS),
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0);
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regmap_field_clear_bits(scodec->reg_adc_fifoc,
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BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS));
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/* Fill most significant bits with valid data MSB */
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regmap_field_update_bits(scodec->reg_adc_fifoc,
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BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE),
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regmap_field_set_bits(scodec->reg_adc_fifoc,
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BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE));
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scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
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/* Set the number of sample bits to either 16 or 24 bits */
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if (hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min == 32) {
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regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
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BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS),
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regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
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BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS));
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/* Set TX FIFO mode to padding the LSBs with 0 */
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regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
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BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE),
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0);
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regmap_clear_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
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BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE));
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scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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} else {
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regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
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BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS),
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0);
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regmap_clear_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
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BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS));
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/* Set TX FIFO mode to repeat the MSB */
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regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
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BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE),
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regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
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BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE));
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scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
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* Stop issuing DRQ when we have room for less than 16 samples
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* in our TX FIFO
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*/
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regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
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3 << SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT,
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regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
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3 << SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT);
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return clk_prepare_enable(scodec->clk_module);
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