drm/i915/bdw: Broadwell also has the "power down well"
Just like Haswell, but with the small twist that the panel fitter for pipe A is now also in the always-on power well. v2: Use the new HAS_POWER_WELL macro. v3: Rebase on top of intel_using_power_well patches. v4: This time actually update the PFIT check correctly so that the pipe A pfit is in the always-on domain. v5: Rebase on top of the VGA power domain addition. v6: Rebase on top of the new power domain infrastructure. Also pimp the commit message a bit while at it. v7: Use IS_BROADWELL instead of IS_GEN8 (Ville). Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> (v1) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -117,6 +117,10 @@ enum intel_display_power_domain {
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#define HSW_ALWAYS_ON_POWER_DOMAINS ( \
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BIT(POWER_DOMAIN_PIPE_A) | \
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BIT(POWER_DOMAIN_TRANSCODER_EDP))
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#define BDW_ALWAYS_ON_POWER_DOMAINS ( \
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BIT(POWER_DOMAIN_PIPE_A) | \
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BIT(POWER_DOMAIN_TRANSCODER_EDP) | \
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BIT(POWER_DOMAIN_PIPE_A_PANEL_FITTER))
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enum hpd_pin {
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HPD_NONE = 0,
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@ -1804,7 +1808,7 @@ struct drm_i915_file_private {
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#define HAS_IPS(dev) (IS_ULT(dev))
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#define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi)
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#define HAS_POWER_WELL(dev) (IS_HASWELL(dev))
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#define HAS_POWER_WELL(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev))
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#define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg)
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#define HAS_PSR(dev) (IS_HASWELL(dev))
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@ -5520,7 +5520,9 @@ static bool is_always_on_power_domain(struct drm_device *dev,
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BUG_ON(BIT(domain) & ~POWER_DOMAIN_MASK);
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if (IS_HASWELL(dev)) {
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if (IS_BROADWELL(dev)) {
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always_on_domains = BDW_ALWAYS_ON_POWER_DOMAINS;
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} else if (IS_HASWELL(dev)) {
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always_on_domains = HSW_ALWAYS_ON_POWER_DOMAINS;
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} else {
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WARN_ON(1);
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@ -6006,4 +6008,3 @@ void intel_pm_init(struct drm_device *dev)
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INIT_DELAYED_WORK(&dev_priv->rps.delayed_resume_work,
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intel_gen6_powersave_work);
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}
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