drm/nouveau: just pass gpio line to pwm_*, not entire gpio struct

We don't need more than the line id to determine the PWM controller, and
the GPIO interfaces are about to change somewhat.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/nouveau_drv.h

@@ -556,8 +556,8 @@ struct nouveau_pm_engine {
 
 	int (*voltage_get)(struct drm_device *);
 	int (*voltage_set)(struct drm_device *, int voltage);
-	int (*pwm_get)(struct drm_device *, struct dcb_gpio_entry*, u32*, u32*);
-	int (*pwm_set)(struct drm_device *, struct dcb_gpio_entry*, u32, u32);
+	int (*pwm_get)(struct drm_device *, int line, u32*, u32*);
+	int (*pwm_set)(struct drm_device *, int line, u32, u32);
 	int (*temp_get)(struct drm_device *);
 };
 

drivers/gpu/drm/nouveau/nouveau_pm.c

@@ -49,7 +49,7 @@ nouveau_pwmfan_get(struct drm_device *dev)
 
 	gpio = nouveau_bios_gpio_entry(dev, DCB_GPIO_PWM_FAN);
 	if (gpio) {
-		ret = pm->pwm_get(dev, gpio, &divs, &duty);
+		ret = pm->pwm_get(dev, gpio->line, &divs, &duty);
 		if (ret == 0) {
 			divs = max(divs, duty);
 			if (dev_priv->card_type <= NV_40 ||
@@ -90,7 +90,7 @@ nouveau_pwmfan_set(struct drm_device *dev, int percent)
 		    (gpio->state[0] & 1))
 			duty = divs - duty;
 
-		return pm->pwm_set(dev, gpio, divs, duty);
+		return pm->pwm_set(dev, gpio->line, divs, duty);
 	}
 
 	return -ENODEV;

drivers/gpu/drm/nouveau/nouveau_pm.h

@@ -55,15 +55,15 @@ int nv04_pm_clocks_set(struct drm_device *, void *);
 int nv40_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *);
 void *nv40_pm_clocks_pre(struct drm_device *, struct nouveau_pm_level *);
 int nv40_pm_clocks_set(struct drm_device *, void *);
-int nv40_pm_pwm_get(struct drm_device *, struct dcb_gpio_entry *, u32*, u32*);
-int nv40_pm_pwm_set(struct drm_device *, struct dcb_gpio_entry *, u32, u32);
+int nv40_pm_pwm_get(struct drm_device *, int, u32 *, u32 *);
+int nv40_pm_pwm_set(struct drm_device *, int, u32, u32);
 
 /* nv50_pm.c */
 int nv50_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *);
 void *nv50_pm_clocks_pre(struct drm_device *, struct nouveau_pm_level *);
 int nv50_pm_clocks_set(struct drm_device *, void *);
-int nv50_pm_pwm_get(struct drm_device *, struct dcb_gpio_entry *, u32*, u32*);
-int nv50_pm_pwm_set(struct drm_device *, struct dcb_gpio_entry *, u32, u32);
+int nv50_pm_pwm_get(struct drm_device *, int, u32 *, u32 *);
+int nv50_pm_pwm_set(struct drm_device *, int, u32, u32);
 
 /* nva3_pm.c */
 int nva3_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *);

drivers/gpu/drm/nouveau/nv40_pm.c

@@ -351,10 +351,9 @@ resume:
 }
 
 int
-nv40_pm_pwm_get(struct drm_device *dev, struct dcb_gpio_entry *gpio,
-		u32 *divs, u32 *duty)
+nv40_pm_pwm_get(struct drm_device *dev, int line, u32 *divs, u32 *duty)
 {
-	if (gpio->line == 2) {
+	if (line == 2) {
 		u32 reg = nv_rd32(dev, 0x0010f0);
 		if (reg & 0x80000000) {
 			*duty = (reg & 0x7fff0000) >> 16;
@@ -362,7 +361,7 @@ nv40_pm_pwm_get(struct drm_device *dev, struct dcb_gpio_entry *gpio,
 			return 0;
 		}
 	} else
-	if (gpio->line == 9) {
+	if (line == 9) {
 		u32 reg = nv_rd32(dev, 0x0015f4);
 		if (reg & 0x80000000) {
 			*divs = nv_rd32(dev, 0x0015f8);
@@ -370,7 +369,7 @@ nv40_pm_pwm_get(struct drm_device *dev, struct dcb_gpio_entry *gpio,
 			return 0;
 		}
 	} else {
-		NV_ERROR(dev, "unknown pwm ctrl for gpio %d\n", gpio->line);
+		NV_ERROR(dev, "unknown pwm ctrl for gpio %d\n", line);
 		return -ENODEV;
 	}
 
@@ -378,17 +377,16 @@ nv40_pm_pwm_get(struct drm_device *dev, struct dcb_gpio_entry *gpio,
 }
 
 int
-nv40_pm_pwm_set(struct drm_device *dev, struct dcb_gpio_entry *gpio,
-		u32 divs, u32 duty)
+nv40_pm_pwm_set(struct drm_device *dev, int line, u32 divs, u32 duty)
 {
-	if (gpio->line == 2) {
+	if (line == 2) {
 		nv_wr32(dev, 0x0010f0, 0x80000000 | (duty << 16) | divs);
 	} else
-	if (gpio->line == 9) {
+	if (line == 9) {
 		nv_wr32(dev, 0x0015f8, divs);
 		nv_wr32(dev, 0x0015f4, duty | 0x80000000);
 	} else {
-		NV_ERROR(dev, "unknown pwm ctrl for gpio %d\n", gpio->line);
+		NV_ERROR(dev, "unknown pwm ctrl for gpio %d\n", line);
 		return -ENODEV;
 	}
 

drivers/gpu/drm/nouveau/nv50_pm.c

@@ -715,25 +715,24 @@ resume:
 }
 
 static int
-pwm_info(struct drm_device *dev, struct dcb_gpio_entry *gpio,
-	 int *ctrl, int *line, int *indx)
+pwm_info(struct drm_device *dev, int *line, int *ctrl, int *indx)
 {
-	if (gpio->line == 0x04) {
+	if (*line == 0x04) {
 		*ctrl = 0x00e100;
 		*line = 4;
 		*indx = 0;
 	} else
-	if (gpio->line == 0x09) {
+	if (*line == 0x09) {
 		*ctrl = 0x00e100;
 		*line = 9;
 		*indx = 1;
 	} else
-	if (gpio->line == 0x10) {
+	if (*line == 0x10) {
 		*ctrl = 0x00e28c;
 		*line = 0;
 		*indx = 0;
 	} else {
-		NV_ERROR(dev, "unknown pwm ctrl for gpio %d\n", gpio->line);
+		NV_ERROR(dev, "unknown pwm ctrl for gpio %d\n", *line);
 		return -ENODEV;
 	}
 
@@ -741,10 +740,9 @@ pwm_info(struct drm_device *dev, struct dcb_gpio_entry *gpio,
 }
 
 int
-nv50_pm_pwm_get(struct drm_device *dev, struct dcb_gpio_entry *gpio,
-		u32 *divs, u32 *duty)
+nv50_pm_pwm_get(struct drm_device *dev, int line, u32 *divs, u32 *duty)
 {
-	int ctrl, line, id, ret = pwm_info(dev, gpio, &ctrl, &line, &id);
+	int ctrl, id, ret = pwm_info(dev, &line, &ctrl, &id);
 	if (ret)
 		return ret;
 
@@ -758,10 +756,9 @@ nv50_pm_pwm_get(struct drm_device *dev, struct dcb_gpio_entry *gpio,
 }
 
 int
-nv50_pm_pwm_set(struct drm_device *dev, struct dcb_gpio_entry *gpio,
-		u32 divs, u32 duty)
+nv50_pm_pwm_set(struct drm_device *dev, int line, u32 divs, u32 duty)
 {
-	int ctrl, line, id, ret = pwm_info(dev, gpio, &ctrl, &line, &id);
+	int ctrl, id, ret = pwm_info(dev, &line, &ctrl, &id);
 	if (ret)
 		return ret;