net: dsa: bcm_sf2: Implement FDB operations
Add support for the FDB add, delete, and dump operations. The add and delete operations are implemented using directed ARL operations using the specified MAC address and consist in a read operation, write and readback operation. The dump operation consists in using the ARL search and software filtering entries which are not for the desired port. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Florian Fainelli
David S. Miller
Родитель
d1611c3aba
Коммит
680060d3e0
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@ -25,6 +25,8 @@
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#include <linux/ethtool.h>
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#include <linux/if_bridge.h>
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#include <linux/brcmphy.h>
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#include <linux/etherdevice.h>
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#include <net/switchdev.h>
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#include "bcm_sf2.h"
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#include "bcm_sf2_regs.h"
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@ -555,6 +557,236 @@ static int bcm_sf2_sw_br_set_stp_state(struct dsa_switch *ds, int port,
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return 0;
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}
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/* Address Resolution Logic routines */
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static int bcm_sf2_arl_op_wait(struct bcm_sf2_priv *priv)
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{
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unsigned int timeout = 10;
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u32 reg;
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do {
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reg = core_readl(priv, CORE_ARLA_RWCTL);
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if (!(reg & ARL_STRTDN))
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return 0;
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usleep_range(1000, 2000);
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} while (timeout--);
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return -ETIMEDOUT;
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}
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static int bcm_sf2_arl_rw_op(struct bcm_sf2_priv *priv, unsigned int op)
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{
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u32 cmd;
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if (op > ARL_RW)
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return -EINVAL;
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cmd = core_readl(priv, CORE_ARLA_RWCTL);
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cmd &= ~IVL_SVL_SELECT;
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cmd |= ARL_STRTDN;
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if (op)
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cmd |= ARL_RW;
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else
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cmd &= ~ARL_RW;
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core_writel(priv, cmd, CORE_ARLA_RWCTL);
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return bcm_sf2_arl_op_wait(priv);
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}
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static int bcm_sf2_arl_read(struct bcm_sf2_priv *priv, u64 mac,
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u16 vid, struct bcm_sf2_arl_entry *ent, u8 *idx,
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bool is_valid)
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{
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unsigned int i;
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int ret;
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ret = bcm_sf2_arl_op_wait(priv);
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if (ret)
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return ret;
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/* Read the 4 bins */
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for (i = 0; i < 4; i++) {
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u64 mac_vid;
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u32 fwd_entry;
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mac_vid = core_readq(priv, CORE_ARLA_MACVID_ENTRY(i));
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fwd_entry = core_readl(priv, CORE_ARLA_FWD_ENTRY(i));
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bcm_sf2_arl_to_entry(ent, mac_vid, fwd_entry);
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if (ent->is_valid && is_valid) {
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*idx = i;
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return 0;
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}
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/* This is the MAC we just deleted */
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if (!is_valid && (mac_vid & mac))
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return 0;
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}
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return -ENOENT;
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}
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static int bcm_sf2_arl_op(struct bcm_sf2_priv *priv, int op, int port,
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const unsigned char *addr, u16 vid, bool is_valid)
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{
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struct bcm_sf2_arl_entry ent;
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u32 fwd_entry;
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u64 mac, mac_vid = 0;
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u8 idx = 0;
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int ret;
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/* Convert the array into a 64-bit MAC */
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mac = bcm_sf2_mac_to_u64(addr);
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/* Perform a read for the given MAC and VID */
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core_writeq(priv, mac, CORE_ARLA_MAC);
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core_writel(priv, vid, CORE_ARLA_VID);
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/* Issue a read operation for this MAC */
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ret = bcm_sf2_arl_rw_op(priv, 1);
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if (ret)
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return ret;
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ret = bcm_sf2_arl_read(priv, mac, vid, &ent, &idx, is_valid);
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/* If this is a read, just finish now */
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if (op)
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return ret;
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/* We could not find a matching MAC, so reset to a new entry */
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if (ret) {
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fwd_entry = 0;
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idx = 0;
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}
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memset(&ent, 0, sizeof(ent));
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ent.port = port;
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ent.is_valid = is_valid;
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ent.vid = vid;
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ent.is_static = true;
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memcpy(ent.mac, addr, ETH_ALEN);
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bcm_sf2_arl_from_entry(&mac_vid, &fwd_entry, &ent);
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core_writeq(priv, mac_vid, CORE_ARLA_MACVID_ENTRY(idx));
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core_writel(priv, fwd_entry, CORE_ARLA_FWD_ENTRY(idx));
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ret = bcm_sf2_arl_rw_op(priv, 0);
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if (ret)
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return ret;
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/* Re-read the entry to check */
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return bcm_sf2_arl_read(priv, mac, vid, &ent, &idx, is_valid);
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}
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static int bcm_sf2_sw_fdb_prepare(struct dsa_switch *ds, int port,
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const struct switchdev_obj_port_fdb *fdb,
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struct switchdev_trans *trans)
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{
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/* We do not need to do anything specific here yet */
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return 0;
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}
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static int bcm_sf2_sw_fdb_add(struct dsa_switch *ds, int port,
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const struct switchdev_obj_port_fdb *fdb,
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struct switchdev_trans *trans)
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{
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struct bcm_sf2_priv *priv = ds_to_priv(ds);
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return bcm_sf2_arl_op(priv, 0, port, fdb->addr, fdb->vid, true);
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}
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static int bcm_sf2_sw_fdb_del(struct dsa_switch *ds, int port,
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const struct switchdev_obj_port_fdb *fdb)
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{
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struct bcm_sf2_priv *priv = ds_to_priv(ds);
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return bcm_sf2_arl_op(priv, 0, port, fdb->addr, fdb->vid, false);
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}
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static int bcm_sf2_arl_search_wait(struct bcm_sf2_priv *priv)
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{
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unsigned timeout = 1000;
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u32 reg;
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do {
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reg = core_readl(priv, CORE_ARLA_SRCH_CTL);
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if (!(reg & ARLA_SRCH_STDN))
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return 0;
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if (reg & ARLA_SRCH_VLID)
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return 0;
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usleep_range(1000, 2000);
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} while (timeout--);
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return -ETIMEDOUT;
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}
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static void bcm_sf2_arl_search_rd(struct bcm_sf2_priv *priv, u8 idx,
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struct bcm_sf2_arl_entry *ent)
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{
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u64 mac_vid;
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u32 fwd_entry;
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mac_vid = core_readq(priv, CORE_ARLA_SRCH_RSLT_MACVID(idx));
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fwd_entry = core_readl(priv, CORE_ARLA_SRCH_RSLT(idx));
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bcm_sf2_arl_to_entry(ent, mac_vid, fwd_entry);
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}
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static int bcm_sf2_sw_fdb_copy(struct net_device *dev, int port,
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const struct bcm_sf2_arl_entry *ent,
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struct switchdev_obj_port_fdb *fdb,
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int (*cb)(struct switchdev_obj *obj))
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{
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if (!ent->is_valid)
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return 0;
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if (port != ent->port)
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return 0;
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ether_addr_copy(fdb->addr, ent->mac);
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fdb->vid = ent->vid;
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fdb->ndm_state = ent->is_static ? NUD_NOARP : NUD_REACHABLE;
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return cb(&fdb->obj);
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}
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static int bcm_sf2_sw_fdb_dump(struct dsa_switch *ds, int port,
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struct switchdev_obj_port_fdb *fdb,
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int (*cb)(struct switchdev_obj *obj))
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{
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struct bcm_sf2_priv *priv = ds_to_priv(ds);
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struct net_device *dev = ds->ports[port];
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struct bcm_sf2_arl_entry results[2];
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unsigned int count = 0;
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int ret;
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/* Start search operation */
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core_writel(priv, ARLA_SRCH_STDN, CORE_ARLA_SRCH_CTL);
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do {
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ret = bcm_sf2_arl_search_wait(priv);
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if (ret)
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return ret;
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/* Read both entries, then return their values back */
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bcm_sf2_arl_search_rd(priv, 0, &results[0]);
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ret = bcm_sf2_sw_fdb_copy(dev, port, &results[0], fdb, cb);
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if (ret)
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return ret;
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bcm_sf2_arl_search_rd(priv, 1, &results[1]);
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ret = bcm_sf2_sw_fdb_copy(dev, port, &results[1], fdb, cb);
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if (ret)
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return ret;
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if (!results[0].is_valid && !results[1].is_valid)
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break;
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} while (count++ < CORE_ARLA_NUM_ENTRIES);
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return 0;
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}
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static irqreturn_t bcm_sf2_switch_0_isr(int irq, void *dev_id)
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{
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struct bcm_sf2_priv *priv = dev_id;
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@ -1076,6 +1308,10 @@ static struct dsa_switch_driver bcm_sf2_switch_driver = {
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.port_join_bridge = bcm_sf2_sw_br_join,
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.port_leave_bridge = bcm_sf2_sw_br_leave,
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.port_stp_update = bcm_sf2_sw_br_set_stp_state,
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.port_fdb_prepare = bcm_sf2_sw_fdb_prepare,
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.port_fdb_add = bcm_sf2_sw_fdb_add,
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.port_fdb_del = bcm_sf2_sw_fdb_del,
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.port_fdb_dump = bcm_sf2_sw_fdb_dump,
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};
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static int __init bcm_sf2_init(void)
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@ -19,6 +19,8 @@
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#include <linux/mutex.h>
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#include <linux/mii.h>
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#include <linux/ethtool.h>
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#include <linux/types.h>
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#include <linux/bitops.h>
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#include <net/dsa.h>
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@ -50,6 +52,60 @@ struct bcm_sf2_port_status {
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u32 vlan_ctl_mask;
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};
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struct bcm_sf2_arl_entry {
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u8 port;
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u8 mac[ETH_ALEN];
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u16 vid;
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u8 is_valid:1;
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u8 is_age:1;
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u8 is_static:1;
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};
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static inline void bcm_sf2_mac_from_u64(u64 src, u8 *dst)
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{
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unsigned int i;
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for (i = 0; i < ETH_ALEN; i++)
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dst[ETH_ALEN - 1 - i] = (src >> (8 * i)) & 0xff;
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}
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static inline u64 bcm_sf2_mac_to_u64(const u8 *src)
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{
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unsigned int i;
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u64 dst = 0;
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for (i = 0; i < ETH_ALEN; i++)
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dst |= (u64)src[ETH_ALEN - 1 - i] << (8 * i);
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return dst;
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}
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static inline void bcm_sf2_arl_to_entry(struct bcm_sf2_arl_entry *ent,
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u64 mac_vid, u32 fwd_entry)
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{
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memset(ent, 0, sizeof(*ent));
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ent->port = fwd_entry & PORTID_MASK;
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ent->is_valid = !!(fwd_entry & ARL_VALID);
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ent->is_age = !!(fwd_entry & ARL_AGE);
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ent->is_static = !!(fwd_entry & ARL_STATIC);
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bcm_sf2_mac_from_u64(mac_vid, ent->mac);
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ent->vid = mac_vid >> VID_SHIFT;
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}
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static inline void bcm_sf2_arl_from_entry(u64 *mac_vid, u32 *fwd_entry,
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const struct bcm_sf2_arl_entry *ent)
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{
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*mac_vid = bcm_sf2_mac_to_u64(ent->mac);
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*mac_vid |= (u64)(ent->vid & VID_MASK) << VID_SHIFT;
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*fwd_entry = ent->port & PORTID_MASK;
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if (ent->is_valid)
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*fwd_entry |= ARL_VALID;
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if (ent->is_static)
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*fwd_entry |= ARL_STATIC;
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if (ent->is_age)
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*fwd_entry |= ARL_AGE;
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}
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struct bcm_sf2_priv {
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/* Base registers, keep those in order with BCM_SF2_REGS_NAME */
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void __iomem *core;
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@ -231,6 +231,49 @@
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#define CORE_BRCM_HDR_RX_DIS 0x0980
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#define CORE_BRCM_HDR_TX_DIS 0x0988
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#define CORE_ARLA_NUM_ENTRIES 1024
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#define CORE_ARLA_RWCTL 0x1400
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#define ARL_RW (1 << 0)
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#define IVL_SVL_SELECT (1 << 6)
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#define ARL_STRTDN (1 << 7)
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#define CORE_ARLA_MAC 0x1408
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#define CORE_ARLA_VID 0x1420
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#define ARLA_VIDTAB_INDX_MASK 0x1fff
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#define CORE_ARLA_MACVID0 0x1440
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#define MAC_MASK 0xffffffffff
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#define VID_SHIFT 48
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#define VID_MASK 0xfff
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#define CORE_ARLA_FWD_ENTRY0 0x1460
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#define PORTID_MASK 0x1ff
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#define ARL_CON_SHIFT 9
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#define ARL_CON_MASK 0x3
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#define ARL_PRI_SHIFT 11
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#define ARL_PRI_MASK 0x7
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#define ARL_AGE (1 << 14)
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#define ARL_STATIC (1 << 15)
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#define ARL_VALID (1 << 16)
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#define CORE_ARLA_MACVID_ENTRY(x) (CORE_ARLA_MACVID0 + ((x) * 0x40))
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#define CORE_ARLA_FWD_ENTRY(x) (CORE_ARLA_FWD_ENTRY0 + ((x) * 0x40))
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#define CORE_ARLA_SRCH_CTL 0x1540
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#define ARLA_SRCH_VLID (1 << 0)
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#define IVL_SVL_SELECT (1 << 6)
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#define ARLA_SRCH_STDN (1 << 7)
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#define CORE_ARLA_SRCH_ADR 0x1544
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#define ARLA_SRCH_ADR_VALID (1 << 15)
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#define CORE_ARLA_SRCH_RSLT_0_MACVID 0x1580
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#define CORE_ARLA_SRCH_RSLT_0 0x15a0
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#define CORE_ARLA_SRCH_RSLT_MACVID(x) (CORE_ARLA_SRCH_RSLT_0_MACVID + ((x) * 0x40))
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#define CORE_ARLA_SRCH_RSLT(x) (CORE_ARLA_SRCH_RSLT_0 + ((x) * 0x40))
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#define CORE_MEM_PSM_VDD_CTRL 0x2380
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#define P_TXQ_PSM_VDD_SHIFT 2
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#define P_TXQ_PSM_VDD_MASK 0x3
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